JPS6311629B2 - - Google Patents
Info
- Publication number
- JPS6311629B2 JPS6311629B2 JP14421178A JP14421178A JPS6311629B2 JP S6311629 B2 JPS6311629 B2 JP S6311629B2 JP 14421178 A JP14421178 A JP 14421178A JP 14421178 A JP14421178 A JP 14421178A JP S6311629 B2 JPS6311629 B2 JP S6311629B2
- Authority
- JP
- Japan
- Prior art keywords
- potential
- coaxial cable
- shield
- shield side
- waveform
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004020 conductor Substances 0.000 claims description 10
- 230000005540 biological transmission Effects 0.000 claims description 9
- 238000010586 diagram Methods 0.000 description 7
- 238000005259 measurement Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- 230000007423 decrease Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
Landscapes
- Arrangements For Transmission Of Measured Signals (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Testing Electric Properties And Detecting Electric Faults (AREA)
Description
【発明の詳細な説明】
この発明は同軸ケーブルを用いたパルス伝送回
路に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pulse transmission circuit using a coaxial cable.
デイジタルプログラム電源（DPS）よりのパ
ルス電圧を供試トランジスタ等の被測定系に印加
する際に結線として同軸ケーブルを使用するが、
その際の同軸ケーブル等の容量による影響が問題
となつている。なお、上記DPSとはＤ／Ａ変換
器とオペアンプ回路、バツフア又はブースタ回路
で構成し、デイジタル入力でもつて規定のアナロ
グ出力を得るものであり、トランジスタ・テスタ
等で一定電圧、一定電流を得るために用いられ、
例えば第１図のように同軸ケーブル１及び供試ト
ランジスタ２に結線される。その場合に、同軸ケ
ーブルの容量及びDPS中の配線等による浮遊容
量のためパルス波形が変化し、第２図ａに示すよ
うな入力波形に対して、実際に印加される波形
は、同図ｂの等価回路に示すような一種の共振回
路をつくり、ソンキングを発生し、b′のようなオ
ーバシユートの波形となるか、あるいは同図ｃの
等価回路をつくつて同図c′のように立上りが遅い
波形となる。このようにオーバシユートすると製
品に過電圧が印加され、破壊されることもあり、
また立上りが遅くなると測定系が安定するまでに
時間がかかり、高速な測定が不可能となる。 A coaxial cable is used as a connection when applying pulse voltage from a digital program power supply (DPS) to a system under test such as a test transistor.
In this case, the influence of the capacity of coaxial cables, etc. has become a problem. The DPS mentioned above consists of a D/A converter, an operational amplifier circuit, and a buffer or booster circuit, and is used to obtain a specified analog output even with digital input. used for
For example, as shown in FIG. 1, it is connected to a coaxial cable 1 and a transistor under test 2. In that case, the pulse waveform changes due to the capacitance of the coaxial cable and the stray capacitance due to the wiring in the DPS, and the actually applied waveform is Either you can create a kind of resonant circuit as shown in the equivalent circuit of Figure 1 and generate sonking, resulting in an overshoot waveform like b', or you can create the equivalent circuit of Figure c and have a rising waveform as shown in Figure c'. The waveform becomes slow. If you overshoot in this way, overvoltage will be applied to the product and it may be destroyed.
Furthermore, if the rise is slow, it takes time for the measurement system to stabilize, making high-speed measurement impossible.
本発明は上記した従来の問題点を解消するべく
なされたものであり、その目的は出力パルス波形
のオーバシユートや立上り時間の遅れをなくし、
安定にして高速の測定が得られ、かつ測定系を保
護し得るパルス伝送回路の提供にある。 The present invention has been made to solve the above-mentioned conventional problems, and its purpose is to eliminate the overshoot and rise time delay of the output pulse waveform,
The object of the present invention is to provide a pulse transmission circuit that can perform stable and high-speed measurements and protect the measurement system.
上記目的を達成するため本発明は、同軸ケーブ
ルのシールド側電位と導体側電位との差をできる
だけ小さくする手段を設けることを要旨とする。 In order to achieve the above object, the gist of the present invention is to provide means for minimizing the difference between the shield side potential and the conductor side potential of the coaxial cable.
一般に同軸ケーブルを用いる理由は伝送電流に
対する各種雑音の遮蔽であり、微小信号を扱つた
り、あるいは300Vというような高電圧を扱う場
合は外部とシールドしなければならない。そして
シールド側と内部の導体側に電位差が大きいとチ
ヤージ電流が増えて浮遊容量が大きくなりパルス
波形に影響する。そこで本発明においては第３図
に示すように、同軸ケーブルの導体側とシールド
側との間及びシールド側と接地部との間にそれぞ
れ抵抗R1，R2を入れ、このR1，R2の比を例えば
１：９とすることで、導体側電位（印加電位）と
シールド側の電位の差を小さいものとし、浮遊容
量の影響をなくすようにした。すなわち、導体側
電位（V1）とシールド側電位（V2）との電位差
V1−V2が小さくなると、それに相当するチヤー
ジ電流が少なくなり、伝送波形（出力波形）に与
える影響が軽減される。 Generally, coaxial cables are used to shield the transmission current from various noises, and when handling small signals or high voltages such as 300V, they must be shielded from the outside. If there is a large potential difference between the shield side and the internal conductor side, the charge current will increase and the stray capacitance will increase, which will affect the pulse waveform. Therefore, in the present invention, as shown in FIG. 3, resistors R 1 and R 2 are inserted between the conductor side and the shield side of the coaxial cable, and between the shield side and the grounding part, respectively. By setting the ratio to 1:9, for example, the difference between the potential on the conductor side (applied potential) and the potential on the shield side is made small, and the influence of stray capacitance is eliminated. In other words, the potential difference between the conductor side potential (V 1 ) and the shield side potential (V 2 )
When V 1 −V 2 becomes smaller, the corresponding charge current decreases, and the influence on the transmission waveform (output waveform) is reduced.
なお、印加電位（V1）とシールド側の電位
（V2）の差をできるだけ小さくし、V1−V2≒０
とした場合は、チヤージ電流がほとんど流れなく
なる。このような場合にも、導電型ではオペアン
プの出力インピーダンスは低く常に一定電圧を出
力する一方、シールド側では外来のノイズがシー
ルド線に重畳しても接地側の抵抗R2のインピー
ダンスを低くしておけばその方へノイズ成分が逃
げシールド効果は失なわれることがない。 In addition, the difference between the applied potential (V 1 ) and the potential on the shield side (V 2 ) should be made as small as possible so that V 1 −V 2 ≒0
In this case, almost no charge current flows. In such cases, the output impedance of the conductive type operational amplifier is low and it always outputs a constant voltage, while the impedance of the resistor R2 on the ground side is low on the shield side even if external noise is superimposed on the shield wire. If you do so, the noise component will escape in that direction and the shielding effect will not be lost.
以上実施例で述べた本発明によれば、浮遊容量
の軽減によつて出力波形においてオーバシユート
が減少し、被測定系のトランジスタを破壊するこ
とが少なくなるとともに、立上り時間が短かくな
り安定な測定を高速に行なうことができ、このこ
とによつても被測定系を保護し得る効果を奏す
る。 According to the present invention described in the above embodiments, by reducing stray capacitance, overshoot is reduced in the output waveform, reducing the chance of destroying transistors in the system under test, and shortening the rise time, resulting in stable measurement. can be performed at high speed, and this also has the effect of protecting the system under test.
本発明は前記実施例に限定されない。同軸ケー
ブルのシールド側と導体側の電位差を小さくする
手段として、第４図に示すようにＤ／Ａ変換器の
後にDPS1と並列にDPS2を接続し、DPS1を同軸
ケーブルの導体側に結線する一方、DPS2を同軸
ケーブルのシールド側に結線する。この場合、
DPS1とDPS2の各並列抵抗の値をわずか異ならせ
ることによつて、導体側の電位（V3）とシール
ド側の電位（V4）との差を小さいものとし、前
記実施例の場合と同等の効果が得られる。 The invention is not limited to the above embodiments. As a means to reduce the potential difference between the shield side and the conductor side of the coaxial cable, as shown in Figure 4, connect DPS 2 in parallel with DPS 1 after the D/A converter, and connect DPS 1 to the conductor side of the coaxial cable. While connecting, connect DPS 2 to the shield side of the coaxial cable. in this case,
By making the values of the respective parallel resistances of DPS 1 and DPS 2 slightly different, the difference between the potential on the conductor side (V 3 ) and the potential on the shield side (V 4 ) is made small, and in the case of the above example. The same effect can be obtained.
第１図は従来のパルス伝送回路の例を示す回路
図、第２図は従来例における波形の影響を示し、
ａは入力波形図、ｂはオーバシユートの場合の等
価回路図、b′は同波形図、ｃは立上り遅れの場合
の等価回路図、c′は同波形図である。第３図及び
第４図は本発明によるパルス伝送回路の各実施例
を示す回路図である。
１……同軸ケーブル、２……供試トランジス
タ。
Figure 1 is a circuit diagram showing an example of a conventional pulse transmission circuit, and Figure 2 shows the influence of waveforms in the conventional example.
a is an input waveform diagram, b is an equivalent circuit diagram in the case of overshoot, b' is the same waveform diagram, c is an equivalent circuit diagram in the case of delayed rise, and c' is the same waveform diagram. 3 and 4 are circuit diagrams showing respective embodiments of the pulse transmission circuit according to the present invention. 1... Coaxial cable, 2... Test transistor.
Claims (1)
ブルを介して被測定系に印加するパルス伝送回路
において、同軸ケーブルのシールド側電位と導体
側電位との差を小さく乃至なくする手段を設けた
ことを特徴とするパルス伝送回路。 ２ 上記電位差を小さくする手段として、同軸ケ
ーブルの導体側とシールド側の間及びシールド側
と接地部との間に適当な比の抵抗を挿入した特許
請求の範囲第１項記載のパルス伝送回路。[Scope of Claims] 1. In a pulse transmission circuit that applies a pulse voltage from a program power source to a system under test via a coaxial cable, means for reducing or eliminating the difference between the shield side potential and the conductor side potential of the coaxial cable is provided. A pulse transmission circuit characterized in that: 2. The pulse transmission circuit according to claim 1, wherein a resistor of an appropriate ratio is inserted between the conductor side and the shield side of the coaxial cable and between the shield side and the grounding part as means for reducing the potential difference.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14421178A JPS5572297A (en) | 1978-11-24 | 1978-11-24 | Analog pulse transmission circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14421178A JPS5572297A (en) | 1978-11-24 | 1978-11-24 | Analog pulse transmission circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5572297A JPS5572297A (en) | 1980-05-30 |
| JPS6311629B2 true JPS6311629B2 (en) | 1988-03-15 |
Family
ID=15356811
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14421178A Granted JPS5572297A (en) | 1978-11-24 | 1978-11-24 | Analog pulse transmission circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5572297A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55135995A (en) * | 1979-04-10 | 1980-10-23 | Tokyo Shibaura Electric Co | Signal supply circuit |
| JPS6278901A (en) * | 1985-10-01 | 1987-04-11 | Meisei Electric Co Ltd | Oscillation device |
| JPH0644193Y2 (en) * | 1986-09-12 | 1994-11-14 | 横河電機株式会社 | Coaxial line device |
-
1978
- 1978-11-24 JP JP14421178A patent/JPS5572297A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5572297A (en) | 1980-05-30 |
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