JPS63114302U - - Google Patents

Info

Publication number
JPS63114302U
JPS63114302U JP281287U JP281287U JPS63114302U JP S63114302 U JPS63114302 U JP S63114302U JP 281287 U JP281287 U JP 281287U JP 281287 U JP281287 U JP 281287U JP S63114302 U JPS63114302 U JP S63114302U
Authority
JP
Japan
Prior art keywords
data
section
alarm
check
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP281287U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP281287U priority Critical patent/JPS63114302U/ja
Publication of JPS63114302U publication Critical patent/JPS63114302U/ja
Pending legal-status Critical Current

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  • Numerical Control (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例のブロツク図、第
2図は上記実施例の動作を説明するフローチヤー
ト、第3図は入力プログラムデータの一例を示す
説明図である。 1……NC装置、3……キーボード、5……デ
ータバツフア、7……プログラムチエツク部、9
……プログラムメモリ、11……CRT、13…
…CPU。
FIG. 1 is a block diagram of an embodiment of this invention, FIG. 2 is a flowchart for explaining the operation of the embodiment, and FIG. 3 is an explanatory diagram showing an example of input program data. 1... NC device, 3... Keyboard, 5... Data buffer, 7... Program check section, 9
...Program memory, 11...CRT, 13...
...CPU.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] キー操作等によりデータ入力するデータ入力部
と、入力データを一時記憶するデータバツフアと
、このデータバツフアに格納されたデータのフオ
ーマツトをチエツクするチエツク部と、該チエツ
ク部でエラーが発見されたとき逐次エラーアラー
ムを与えるアラーム出力部とを備えて成るプログ
ラム入力チエツク装置。
A data input section for inputting data through key operations, etc., a data buffer for temporarily storing input data, a check section for checking the format of data stored in this data buffer, and a sequential error alarm when an error is discovered in the check section. A program input check device comprising: an alarm output section for giving an alarm;
JP281287U 1987-01-14 1987-01-14 Pending JPS63114302U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP281287U JPS63114302U (en) 1987-01-14 1987-01-14

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP281287U JPS63114302U (en) 1987-01-14 1987-01-14

Publications (1)

Publication Number Publication Date
JPS63114302U true JPS63114302U (en) 1988-07-23

Family

ID=30782001

Family Applications (1)

Application Number Title Priority Date Filing Date
JP281287U Pending JPS63114302U (en) 1987-01-14 1987-01-14

Country Status (1)

Country Link
JP (1) JPS63114302U (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58114106A (en) * 1981-12-26 1983-07-07 Yamazaki Mazak Corp Controlling method for program error display of numerical control machine tool
JPS59195709A (en) * 1983-04-21 1984-11-06 Fanuc Ltd Data input device of numerical controller
JPS59195708A (en) * 1983-04-21 1984-11-06 Fanuc Ltd Data input device of numerical controller

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58114106A (en) * 1981-12-26 1983-07-07 Yamazaki Mazak Corp Controlling method for program error display of numerical control machine tool
JPS59195709A (en) * 1983-04-21 1984-11-06 Fanuc Ltd Data input device of numerical controller
JPS59195708A (en) * 1983-04-21 1984-11-06 Fanuc Ltd Data input device of numerical controller

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