JPS63109402A - Preparation of optical phase operating plate - Google Patents

Preparation of optical phase operating plate

Info

Publication number
JPS63109402A
JPS63109402A JP25607286A JP25607286A JPS63109402A JP S63109402 A JPS63109402 A JP S63109402A JP 25607286 A JP25607286 A JP 25607286A JP 25607286 A JP25607286 A JP 25607286A JP S63109402 A JPS63109402 A JP S63109402A
Authority
JP
Japan
Prior art keywords
etching
optical phase
film
phase operating
stacked
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25607286A
Other languages
Japanese (ja)
Inventor
Mototaka Tanetani
元隆 種谷
Akihiro Matsumoto
松本 晃弘
Kaneki Matsui
完益 松井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP25607286A priority Critical patent/JPS63109402A/en
Priority to US07/113,003 priority patent/US4780175A/en
Priority to GB8725170A priority patent/GB2200765B/en
Publication of JPS63109402A publication Critical patent/JPS63109402A/en
Priority to GB9013070A priority patent/GB2232271B/en
Pending legal-status Critical Current

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  • Optical Elements Other Than Lenses (AREA)

Abstract

PURPOSE:To easily obtain an optical phase operating plate excellent in inside uniformity and reproducibility by superposing and stacking plural layers having different etching speeds respectively on a base and etching only the surface side layer having a high etching speed to form the optical phase operating part. CONSTITUTION:Two or more laminated layers having different etching speeds respectively are stacked on the base 1 and then the surface side layer having a high etching speed is etched, so that the phase operation part controlled at its phase operating variable not by etching depth but by layer thickness. Namely, an Si3N4 film 3 is stacked on an SiO2 film 2 stacked on the glass base 1 by using plasma CVD method. Then the Si3N4 film 3 is worked like stripes consisting of W width and P pitch by using photorithography technique and etching technique. When the etching time is optimized, the processing can be comparatively easily controlled so that the Si3N4 film 3 can be completely removed and the SiO2 film 2 is not almost removed.

Description

【発明の詳細な説明】 く技術分野〉 本発明は光学位相を空間的に精密に制御するための光学
位相操作板の作製方法に関する。
DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a method for manufacturing an optical phase manipulation plate for spatially precisely controlling an optical phase.

〈従来技術〉 空間的に位相をシフトさせる位相シフター(位相操作板
)は光学部品として非常Kg要であシ、光集積回路を構
成する上で必要となるものである。
<Prior Art> A phase shifter (phase operation plate) for spatially shifting the phase is an optical component that costs a considerable amount of kg, and is necessary in constructing an optical integrated circuit.

従来このような位相シフターとしては、一般に第2図に
示すような形状のものが用いられている。
Conventionally, as such a phase shifter, one having a shape as shown in FIG. 2 is generally used.

この位相シフターは以下のように作製される。ここでは
光学位相を空間的に180’反転させる場合について説
明する。まずガラス基板(201)上に所望のパターン
を通常のホトリングラフィ技術を用いて形成する。ここ
ではストライプ:W′=5μmおきに位相を反転させる
ためのパターンを考える。次にフッ酸とフッ化アンモニ
ウムと水を混合したエツチング液を用いてエツチングを
実施する。このときエツチングの深さ:d′については を満たすように制御設定する。その後レジストを有機洗
浄により除去し、位相シフターとする。
This phase shifter is manufactured as follows. Here, a case will be described in which the optical phase is spatially inverted by 180'. First, a desired pattern is formed on a glass substrate (201) using ordinary photolithography technology. Here, consider a stripe: a pattern for inverting the phase every W'=5 μm. Next, etching is performed using an etching solution containing a mixture of hydrofluoric acid, ammonium fluoride, and water. At this time, the etching depth: d' is controlled and set so as to satisfy. Thereafter, the resist is removed by organic cleaning to obtain a phase shifter.

〈発明が解決しようとする問題点〉 以上のような従来の位相シフターにおいて位相シフト量
の制御はエツチングの深さ:d′に依存しておシ、シフ
ト量のばらつきはd′のばらつきに対応する。しかし、
エツチングでの面内均一性や再現性を高めるのは非常に
難しく、高度かつ煩雑な工程が必要となる。他の従来素
子としてガラス基板にイオン交換を用いて屈折率を変化
させる方法が採用された素子があるが上述のエツチング
の場合と同様にイオン交換の深さの制御が困難である。
<Problems to be solved by the invention> In the conventional phase shifter as described above, control of the phase shift amount depends on the etching depth: d', and the variation in the shift amount corresponds to the variation in d'. do. but,
Improving in-plane uniformity and reproducibility in etching is extremely difficult and requires sophisticated and complicated processes. There is another conventional element that employs a method of changing the refractive index by using ion exchange on a glass substrate, but as in the case of etching described above, it is difficult to control the depth of ion exchange.

〈発明の目的〉 本発明は、上述の問題点を解決し比較的容易に面内均一
性及び再現性の良い光学位相操作板を得ることのできる
作製方法を提供することを目的と2層以上の積層体を基
板上に堆積した後エツチング速度の大なる表面側の層を
エツチング加工することにより、位相操作量をエツチン
グ深さではなく層厚で制御した位相操作部を形成するこ
とを特徴とする。
<Object of the invention> The present invention aims to solve the above-mentioned problems and provide a manufacturing method that can relatively easily obtain an optical phase operation plate with good in-plane uniformity and reproducibility. The layered structure is deposited on a substrate, and then the layer on the surface side where the etching rate is high is etched, thereby forming a phase manipulation part in which the amount of phase manipulation is controlled not by the etching depth but by the layer thickness. do.

〈実施例〉 第1図は本発明の1実施例の説明に供する位相シフター
の構造図である。以下、本素子の作製方法について説明
する。厚さ100〜200μm程度のガラス基板(1)
上に高周波スパッタ蒸着法を用い1板温度250℃にお
いてSiO□膜(2)を堆積させる。このSiO2膜(
2)の厚さSi2はエツチング剤に対してガラス基板(
1)を保護するに十分であれば良い。ここではd 2 
= 150 OA トL 7?。
<Embodiment> FIG. 1 is a structural diagram of a phase shifter for explaining one embodiment of the present invention. The method for manufacturing this device will be described below. Glass substrate (1) with a thickness of about 100 to 200 μm
A SiO□ film (2) is deposited thereon using a high frequency sputter deposition method at a single plate temperature of 250°C. This SiO2 film (
2) thickness Si2 is the thickness of the glass substrate (
It is sufficient as long as it is sufficient to protect 1). Here d 2
= 150 OA ToL 7? .

次に、このSiO2膜(2)上にプラズマCVD法を用
いてS i3N4膜(3)を堆積させる。この513N
4膜(3)の厚さSi3は を満たすように堆積時間及び堆積条件を制御する。
Next, a Si3N4 film (3) is deposited on this SiO2 film (2) using the plasma CVD method. This 513N
The deposition time and deposition conditions are controlled so that the thickness Si3 of the fourth film (3) is satisfied.

その後、ホトリソグラフィ技術とエツチング技術を用い
て5iaN4膜(3)を幅:W、ピッチ二Pのストライ
プ状に加工する。このとき、エツチング剤としてはフッ
酸:フッ化アンモニウム液= 1 : 40の溶液を用
い、室温でエツチングする。このエツチング剤に対する
スパッタ蒸着さfLfcsio□膜(2)のエツチング
レート: RE(S i 02)とプラズマCVD法に
よシ堆積されたSi3N4膜(3)のエツチングレート
: RE(Si3 N4 )の間にはRE(SiaN4
) 260 RE(S 102)・・・・(3)なる関
係がある。従ってエツチング時間を最適化することによ
シ、Si3N*膜(3)を元金に除去しかつSiO2膜
(2)をほとんど除去しないように制御することは比較
的容易になし得る。このようにして作製された位相シフ
ターの位相シフト量はフ。
Thereafter, the 5iaN4 film (3) is processed into a stripe shape with a width of W and a pitch of 2P using photolithography and etching techniques. At this time, a solution of hydrofluoric acid:ammonium fluoride solution=1:40 is used as an etching agent, and etching is performed at room temperature. For this etching agent, the etching rate of the sputter-deposited fLfcsio□ film (2) is between RE (S i 02) and the etching rate of the Si3N4 film (3) deposited by plasma CVD method: RE (Si3 N4). is RE(SiaN4
) 260 RE (S 102)...(3) There is a relationship. Therefore, by optimizing the etching time, it is relatively easy to control the etching process so that the Si3N* film (3) is removed into the original metal and the SiO2 film (2) is hardly removed. The phase shift amount of the phase shifter manufactured in this way is F.

ラズマCVD法により堆積させたS i3N4 膜(3
)の厚さSi3にのみ依存し前述の(2)式を満たす場
合は180°だけ位相を反転させることができる。従来
の第2図におけるエツチング深さ:d′の均一性に比べ
てプラズマCVD法による堆積膜厚:d3の均一性の方
が優nておシ、基板を回転させることによりd3の誤差
を±2〜3%に抑えることは可能である。またd3の再
現性に関してもプラズマCVD法での堆積膜をエツチン
グ加工前に光学的(非破壊)に測定することによシ検知
することができるため、最適膜厚になるまで堆積又は全
面エツチングを施すことで制御することができ歩留り良
く良品を得ることができる。
Si3N4 film (3
), the phase can be inverted by 180° if the above equation (2) is satisfied. The uniformity of the deposited film thickness: d3 by the plasma CVD method is better than the uniformity of the etching depth: d' in the conventional method shown in FIG. 2, and the error in d3 can be reduced by rotating the substrate. It is possible to suppress it to 2-3%. Furthermore, the reproducibility of d3 can be detected by optically (non-destructively) measuring the film deposited by the plasma CVD method before etching. By applying this method, it is possible to control the temperature and obtain good products with a high yield.

上述のように作製された位相シフターは半導体レーザア
レイ素子の1800位相モード発振光を00位相モード
に変換することができ、高出力レーザを得るために重要
な要素となる。また、位相シフターに限らずホログラム
などのような光波と位相操作部との相互作用長を波長オ
ーダで制御しなければならない光学位相操作板の作製に
おいても本発明を適用することにより歩留りを向上させ
ることができる。
The phase shifter manufactured as described above can convert the 1800 phase mode oscillation light of the semiconductor laser array element to the 00 phase mode, and is an important element for obtaining a high output laser. Furthermore, the present invention can be applied not only to phase shifters but also to the production of optical phase manipulation plates such as holograms in which the interaction length between a light wave and a phase manipulation unit must be controlled on the wavelength order, thereby improving yield. be able to.

本発明は上述の実施例に限らず以下に挙げた場合にも適
用可能であシ同様の効果が期待できる。
The present invention is applicable not only to the above embodiments but also to the cases listed below, and similar effects can be expected.

(1)光学位相操作板を構成する材料がSiO2やSi
3N4以外にA 1zOs 9Mg20s、ZrO2゜
”a20s r Mg F 2 、T r 02などで
ある場合、(2)  膜の作製方法がECRプラズマC
VD法、電子ビーム蒸着法、抵抗加熱蒸着法など他の方
法を用いた場合、 (3)  エツチング剤がフッ酸系と異なる湿式のエツ
チング剤又はCF、がヌやC12ガスなどのような乾式
のエツチング剤を用いた場合、(4)膜の組成が化学的
平衡状態からずれた場合(例えばSiO2やSi3N、
などがSiOx:0(X(2やS 13NY : 0<
y<4になった場合)
(1) The material composing the optical phase operation plate is SiO2 or Si.
In addition to 3N4, if A 1zOs 9Mg20s, ZrO2゜''a20s r Mg F 2 , T r 02, etc. are used, (2) the film preparation method is ECR plasma C
(3) When using other methods such as VD method, electron beam evaporation method, and resistance heating evaporation method, (4) When the composition of the film deviates from the chemical equilibrium state (for example, SiO2, Si3N,
etc. are SiOx: 0(X(2 and S 13NY: 0<
(If y<4)

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の1実施例の説明に供する位相シフター
の構造図である。 第2図は従来の位相シフターの構成を示す構成図である
。 1・・・ガラス基板  2・・・SiO2膜  3・・
・Si3N4膜 代理人 弁理士  杉 山 毅 至(他1名)第1図 第2図
FIG. 1 is a structural diagram of a phase shifter used to explain one embodiment of the present invention. FIG. 2 is a block diagram showing the structure of a conventional phase shifter. 1...Glass substrate 2...SiO2 film 3...
・Si3N4 membrane agent Patent attorney Takeshi Sugiyama (and 1 other person) Figure 1 Figure 2

Claims (1)

【特許請求の範囲】 1、基板上にエッチング速度の異なる複数の層を重畳し
て堆積した後、エッチングによりエッチング速度の大な
る表面側の層のみエッチング加工して光学位相操作部を
形成することを特徴とする光学位相操作板の作製方法。 2、エッチング速度の大なる層を光学位相操作量に対応
した厚さに堆積させる特許請求の範囲第1項記載の光学
位相操作板の作製方法。 3、互いのエッチング速度が約1対10である複数の層
を重畳した特許請求の範囲第1項記載の光学位相操作板
の作製方法。 4、複数の層をSiO_2層とSi_3N_4層で構成
した特許請求の範囲第1項記載の光学位相操作板の作製
方法。
[Claims] 1. After depositing a plurality of layers with different etching rates on a substrate in a superimposed manner, only the layer on the surface side having a higher etching rate is etched to form an optical phase manipulating section. A method for producing an optical phase operation plate characterized by: 2. A method for producing an optical phase shift plate according to claim 1, wherein a layer having a high etching rate is deposited to a thickness corresponding to the amount of optical phase shift. 3. A method for manufacturing an optical phase shift plate according to claim 1, in which a plurality of layers are superimposed, each having an etching rate of about 1:10. 4. The method for manufacturing an optical phase shift plate according to claim 1, wherein the plurality of layers are composed of a SiO_2 layer and a Si_3N_4 layer.
JP25607286A 1986-10-27 1986-10-27 Preparation of optical phase operating plate Pending JPS63109402A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP25607286A JPS63109402A (en) 1986-10-27 1986-10-27 Preparation of optical phase operating plate
US07/113,003 US4780175A (en) 1986-10-27 1987-10-26 Method for the production of an optical phase-shifting board
GB8725170A GB2200765B (en) 1986-10-27 1987-10-27 A method for the production of an optical phase-shifting board
GB9013070A GB2232271B (en) 1986-10-27 1990-06-12 A method of fixing an optical phase-shifting board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25607286A JPS63109402A (en) 1986-10-27 1986-10-27 Preparation of optical phase operating plate

Publications (1)

Publication Number Publication Date
JPS63109402A true JPS63109402A (en) 1988-05-14

Family

ID=17287505

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25607286A Pending JPS63109402A (en) 1986-10-27 1986-10-27 Preparation of optical phase operating plate

Country Status (1)

Country Link
JP (1) JPS63109402A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004074888A1 (en) * 2003-02-18 2004-09-02 Sumitomo Electric Industries, Ltd. Diffraction lattice element, production method for diffraction lattice element, and design method for diffraction lattice element
US7019904B2 (en) 2003-02-18 2006-03-28 Sumitomo Electric Industries, Ltd. Diffraction grating element, production method of diffraction grating element, and method of designing diffraction grating element

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53143242A (en) * 1977-05-19 1978-12-13 Matsushita Electric Ind Co Ltd Production of optical diffusing plate

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53143242A (en) * 1977-05-19 1978-12-13 Matsushita Electric Ind Co Ltd Production of optical diffusing plate

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004074888A1 (en) * 2003-02-18 2004-09-02 Sumitomo Electric Industries, Ltd. Diffraction lattice element, production method for diffraction lattice element, and design method for diffraction lattice element
US7019904B2 (en) 2003-02-18 2006-03-28 Sumitomo Electric Industries, Ltd. Diffraction grating element, production method of diffraction grating element, and method of designing diffraction grating element
JPWO2004074888A1 (en) * 2003-02-18 2006-06-01 住友電気工業株式会社 Diffraction grating element, diffraction grating element manufacturing method, and diffraction grating element design method
US7184214B2 (en) 2003-02-18 2007-02-27 Sumitomo Electric Industries, Ltd. Diffraction grating element, production method of diffraction grating element, and method of designing diffraction grating element
CN100338486C (en) * 2003-02-18 2007-09-19 住友电气工业株式会社 Diffraction lattice element, production method for diffraction lattice element, and design method for diffraction lattice element
US7502167B2 (en) 2003-02-18 2009-03-10 Sumitomo Electric Industries, Ltd. Diffraction grating element, production method of diffraction grating element, and method of designing diffraction grating element
JP2009187017A (en) * 2003-02-18 2009-08-20 Sumitomo Electric Ind Ltd Diffraction grating element

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