JPS631062A - Parallel optical-signal processing semiconductor element - Google Patents
Parallel optical-signal processing semiconductor elementInfo
- Publication number
- JPS631062A JPS631062A JP61145378A JP14537886A JPS631062A JP S631062 A JPS631062 A JP S631062A JP 61145378 A JP61145378 A JP 61145378A JP 14537886 A JP14537886 A JP 14537886A JP S631062 A JPS631062 A JP S631062A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- receiving element
- light
- signal processing
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 28
- 239000000758 substrate Substances 0.000 claims abstract description 29
- 230000004927 fusion Effects 0.000 claims abstract description 6
- 230000003287 optical effect Effects 0.000 claims description 14
- 230000005540 biological transmission Effects 0.000 abstract description 7
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000004642 Polyimide Substances 0.000 description 2
- 239000000835 fiber Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 239000013307 optical fiber Substances 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000010410 layer Substances 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000008929 regeneration Effects 0.000 description 1
- 238000011069 regeneration method Methods 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Optical Communication System (AREA)
Abstract
Description
【発明の詳細な説明】 （産業上の利用分野） 本発明はコンピュータ間の並列光データ伝送や。[Detailed description of the invention] (Industrial application field) The present invention relates to parallel optical data transmission between computers.
多重ルーズ構成の構内並列光伝送網において用いられ、
複合化光・電気集積素子の一種である並列光信号処理半
導体素子に関する。Used in local parallel optical transmission networks with multiple loose configurations,
This invention relates to a parallel optical signal processing semiconductor device, which is a type of composite optical/electrical integrated device.
（従来の技術）
複数本の光ファイバを伝送路として用いる並列光伝送は
大量の清報を高速に伝達するための通信方式として重要
なものである。その、端末や中継部に入るデバイスには
、信号の再生、増幅機能の他に、更に交換や記憶といっ
た各種の機能を付加することによって、−層高度で機能
性）て富んだシステムを実現することが可能となる。第
４図は従来の並列光信号処理半導体素子の一例を示す斜
視図である。この従来例は、コンピュータ間の並列デー
タ伝送に用いられる１行１２列のＰＩＮフォトダイオー
ドで構成される受光素子アレイであり、インターナショ
ナル・エレクトロデバイス・ミーティング（ＩＥＤＭ
８４、Ｓａｎ Ｆｒａｎｃｉｓｃｏ 。(Prior Art) Parallel optical transmission using multiple optical fibers as transmission lines is important as a communication method for transmitting a large amount of information at high speed. By adding various functions such as signal exchange and storage to the terminals and devices that enter the relay section, in addition to signal regeneration and amplification functions, a highly sophisticated and highly functional system can be realized. becomes possible. FIG. 4 is a perspective view showing an example of a conventional parallel optical signal processing semiconductor device. This conventional example is a light-receiving element array composed of 1 row and 12 columns of PIN photodiodes used for parallel data transmission between computers.
84, San Francisco.
ＵＳＡ、１９８４）のテクニカル・ダイジェストの７２
７頁に報告されているものである。同図に於いて２１は
受光素子アレイ、２２は信号光をアレイに導くファイバ
リボン、２３はシリコンのＶ溝から成る光ファイバの支
持台である。USA, 1984) Technical Digest 72
This is reported on page 7. In the figure, 21 is a light receiving element array, 22 is a fiber ribbon that guides signal light to the array, and 23 is an optical fiber support made of a silicon V-groove.
（発明が解決しようとする問題点）
第４図の溝底の欠点は、受光索子アレイ２１の後段に続
（ＣＰＩＪ等の電気回路までの配線を、各ＰＩＮフォト
ダイオード毎に行なわれなければならないことである。(Problems to be Solved by the Invention) The disadvantage of the groove bottom in FIG. It must not happen.
そのためにコンパクトな高密度実装ができず、配線によ
る浮遊容量によって高速応答特性が妨げられるという問
題が生じた。This posed a problem in that compact, high-density packaging was not possible, and high-speed response characteristics were hindered by stray capacitance caused by wiring.
本発明は、上記欠点に鑑みなされたものであり、高密度
実装が可能な並列光信号処理用半導体素子を提供するこ
とを目的とする。The present invention has been made in view of the above drawbacks, and an object of the present invention is to provide a semiconductor device for parallel optical signal processing that can be mounted at high density.
（問題点を解決するための手段）
前述の問題点を解決するために本発明が提供する並列光
信号処理半導体素子は、並列伝送される光信号を受ける
半導体受光素子アレイが表面側に形成しである第１の半
導体基板と、前記半導体受光素子アレイの出力信号を受
けて処理する電子回路が表面側に形成された第２の半導
体基板とがらなり、前記第１の半導体基板と前記第２の
半導体基板とは互いに表面側を対面して′＠層されて融
着によって一体化されており、前記ｊ独着は前記半導体
受光素子の端子と前記電子回路の端子との間で行なわれ
ており、前記半導体受光素子アレイの入射光は前記Ｍ１
の半導体基板の裏面側から照射されることを特徴とする
。(Means for Solving the Problems) In order to solve the above-mentioned problems, the present invention provides a parallel optical signal processing semiconductor device, in which a semiconductor photodetector array for receiving optical signals transmitted in parallel is formed on the front side. and a second semiconductor substrate having an electronic circuit formed on the surface side for receiving and processing output signals of the semiconductor light receiving element array; The semiconductor substrates are layered with their front surfaces facing each other and are integrated by fusion bonding, and the bonding is performed between the terminals of the semiconductor photodetector and the terminals of the electronic circuit. , the incident light of the semiconductor light receiving element array is the M1
It is characterized by being irradiated from the back side of the semiconductor substrate.
（作用）
上述の本発明の素子では、各受光素子と下側の半導体基
板との電気的接読が融着によって同時に成されるので、
手間のかかるワイヤ・ボンディング工程は不要となる。(Function) In the above-described device of the present invention, electrical reading between each light-receiving element and the lower semiconductor substrate is achieved simultaneously by fusion bonding.
The time-consuming wire bonding process is no longer necessary.
又、裏面から受光素子に光を入射する構造では、配線の
ための不要な畜生容量が生じないので高速比の観点から
も優れている。In addition, the structure in which light is incident on the light receiving element from the back side is superior from the viewpoint of high speed ratio since unnecessary capacitance for wiring is not generated.
（実施例）
第１図は本発明の−実り例を示す部分破断；斜視図であ
る。受光素子アレイ１２は、第４図の従来例と同じく、
１行１２列のＩｎＧａＡｓ Ｐ ／ ＩＨＰ Ｐ ＩＮ
フォトダイオードで構成されている。受光素子アレイ１
２は半絶縁性ＩｎＰ基板１３０表面に形成されている。(Example) FIG. 1 is a partially broken perspective view showing a practical example of the present invention. The light receiving element array 12 is similar to the conventional example shown in FIG.
1 row and 12 columns of InGaAs P/IHP P IN
It consists of a photodiode. Photodetector array 1
2 is formed on the surface of the semi-insulating InP substrate 130.
Ｇａ Ａｓ基板１１０表面には、受光素子アレイ１２の
フォトダイオードの後段につながる増幅回路やその他の
交換、演算を行なう電子回路が形成されている。受光素
子アレイ１２はそのＧａＡｓ基板１１の上に乗せられ融
着されている。On the surface of the GaAs substrate 110, an amplifier circuit connected to the rear stage of the photodiode of the light receiving element array 12 and other electronic circuits for performing exchange and calculation are formed. The light receiving element array 12 is placed on the GaAs substrate 11 and fused.
第２図（ａ）〜（ｃ）は第１図実施例の製造工程を示す
図である。FIGS. 2(a) to 2(c) are diagrams showing the manufacturing process of the embodiment shown in FIG.
まず、乗置配線となる融着部１４１及び１４２をＣ）ａ
Ａｓ基板１１及びＩｎＰ基板１３にそれぞれ形成する（
第２１図（ａ））。融着部１４１，１４２は層厚的２ｚ
ｚｍで３０／ｚｍ角のＡＩｌ ／ Ｔｉからなる。次に
、半絶縁性のＩｎＰ基板１３及びＣ）ａ Ａｓ基板１１
の”＆’Ｊｉ１をともに平担化して、融着な容易にし、
更に層間絶縁をとるためにポリイミド１４を約２／Ｉ＋
ｎの厚さでコーティングする（第２図（ｂ））。 再び
融着部１４１及び１４２にＡｕ／Ｔｉを被着させた後、
対向する融着部１４１及び１４２相互の目合わせをし、
２０Ｑ°Ｃ程度の温度に加熱した状態で圧力を加えてＩ
ｎＰ基板［３とＣ）ａ Ａｓ基板１１とを融着させる（
第２図（Ｃ））。この様にして形成される本実施例は、
フォトダイオード毎のワイヤ・ボンディングを要せず、
その分だけ製作の手間が省けるだけでなく、フォトダイ
オードと、それに続く電子回路までの配線長を非常に短
かくできるので応答速度、更には受光感度等の点で従来
方式に比べて優れている。First, the fused parts 141 and 142 that will become the mounted wiring are C)a
Formed on the As substrate 11 and the InP substrate 13 respectively (
Figure 21(a)). The fused parts 141 and 142 have a layer thickness of 2z
It consists of Al/Ti of 30/zm square. Next, a semi-insulating InP substrate 13 and C)a As substrate 11
``&'Ji1 are both flattened to make it easier to fuse,
Furthermore, in order to provide interlayer insulation, the polyimide 14 is approximately 2/I+
coating to a thickness of n (FIG. 2(b)). After applying Au/Ti to the fused parts 141 and 142 again,
Align the facing fused parts 141 and 142 with each other,
Apply pressure while heating to a temperature of about 20Q°C.
Fusing the nP substrate [3 and C) a As substrate 11 (
Figure 2 (C)). This example formed in this way is
No need for wire bonding for each photodiode,
This not only saves time in manufacturing, but also allows the length of wiring from the photodiode to the electronic circuit that follows it to be extremely short, making it superior to conventional methods in terms of response speed, light-receiving sensitivity, etc. .
第３図は本発明の他の実施例を示す部分破断斜視図であ
る。受光素子アレイ１５とそれにつながるＦＥＴγンプ
１６とをＩｎＰ基板１７の上に形成し、ＩｎＰ基板１７
をＧａ Ａｓ基板１８に融着することによって作った並
列光信号処理用の半導体素子である。第１図の実施例に
比べて電子回路の一部がＩｎＰ基板１７の上に形成され
ているので全てを一方の半導体基板側に作る場合に比べ
てより一層電子回路を詰め込むことが可能となり、実装
密度が向上する。FIG. 3 is a partially cutaway perspective view showing another embodiment of the present invention. A light receiving element array 15 and a FET γ amplifier 16 connected thereto are formed on an InP substrate 17.
This is a semiconductor device for parallel optical signal processing made by fusing the above to a GaAs substrate 18. Compared to the embodiment shown in FIG. 1, a part of the electronic circuit is formed on the InP substrate 17, so it is possible to pack in more electronic circuits than if they were all formed on one semiconductor substrate. Improves packaging density.
なお、上記実施例では受光素子アレイについて述べたが
発光素子アレイに関しても、本発明を用いれば同様にコ
ンパクトで高速な並列処理用半導体素子の作製が可能と
なる。In the above embodiments, a light-receiving element array has been described, but if the present invention is applied to a light-emitting element array, it is also possible to fabricate a compact and high-speed semiconductor element for parallel processing.
（発明の効果）
以上に説明したように、本発明によれば、高密度実装が
容易に行え、高速伝送が可能な並列光信号処理半導体素
子が提供できる。(Effects of the Invention) As described above, according to the present invention, it is possible to provide a parallel optical signal processing semiconductor element that can be easily mounted at high density and capable of high-speed transmission.
第１図及び第３図は本発明の実施例を示す部分破断斜視
図、第２図（ａ）〜（Ｃ）は第１図実施例の製造工程を
示す図、第４図は従来の並列光信号処理半導体素子の例
を示す斜視図である。
これら図において、１２．１５及び２１は受光素子アレ
イ、１１及び１８はＧａＡｓ基板、１３はＩｎＰ基板、
１４１及び１４２は融着部、１４はポリイミド、１６は
ＦＥＴアンプ、２２はファイパリメン、２３は支持台で
ある。
代理人 弁理士 本 庄 伸 介
（ａ）
（ｂ）
＋４１
（ｃ）
第２図1 and 3 are partially cutaway perspective views showing an embodiment of the present invention, FIGS. 2(a) to (C) are views showing the manufacturing process of the embodiment of FIG. 1, and FIG. 4 is a conventional parallel 1 is a perspective view showing an example of an optical signal processing semiconductor element. In these figures, 12.15 and 21 are photodetector arrays, 11 and 18 are GaAs substrates, 13 is an InP substrate,
141 and 142 are fusion parts, 14 is polyimide, 16 is a FET amplifier, 22 is a fiber ream, and 23 is a support stand. Agent Patent Attorney Shinsuke Honjo (a) (b) +41 (c) Figure 2
Claims (1)
表面側に形成してある第１の半導体基板と、前記半導体
受光素子アレイの出力信号を受けて処理する電子回路が
表面側に形成された第２の半導体基板とからなり、前記
第１の半導体基板と前記第２半導体基板とは互いに表面
側を対面させて積層されて融着によつて一体化されてお
り、前記融着は前記半導体受光素子の端子と前記電子回
路の端子との間で行なわれており、前記半導体受光素子
アレイの入射光は前記第１の半導体基板の裏面側から照
射されることを特徴とする並列光信号処理半導体素子。a first semiconductor substrate having a semiconductor light-receiving element array formed on the front side for receiving optical signals transmitted in parallel; and a first semiconductor substrate having an electronic circuit formed on the front side for receiving and processing output signals of the semiconductor light-receiving element array. The first semiconductor substrate and the second semiconductor substrate are laminated with their surfaces facing each other and are integrated by fusion bonding, and the fusion bonding is performed by the semiconductor light receiving substrate. Parallel optical signal processing is performed between a terminal of an element and a terminal of the electronic circuit, and the incident light of the semiconductor light receiving element array is irradiated from the back side of the first semiconductor substrate. element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61145378A JPS631062A (en) | 1986-06-20 | 1986-06-20 | Parallel optical-signal processing semiconductor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61145378A JPS631062A (en) | 1986-06-20 | 1986-06-20 | Parallel optical-signal processing semiconductor element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS631062A true JPS631062A (en) | 1988-01-06 |
Family
ID=15383850
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61145378A Pending JPS631062A (en) | 1986-06-20 | 1986-06-20 | Parallel optical-signal processing semiconductor element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS631062A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02194558A (en) * | 1989-01-21 | 1990-08-01 | Nippondenso Co Ltd | Semiconductor device and manufacture thereof |
| JPH11354762A (en) * | 1998-06-03 | 1999-12-24 | Nippon Telegr & Teleph Corp <Ntt> | Image sensor |
| WO2020213436A1 (en) * | 2019-04-18 | 2020-10-22 | 日本電信電話株式会社 | Light-receiving device and light receiver |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5965474A (en) * | 1982-09-08 | 1984-04-13 | テキサス・インスツルメンツ・インコ−ポレイテツド | Focal surface array structure and method of producing same |
| JPS60224265A (en) * | 1984-04-20 | 1985-11-08 | Fujitsu Ltd | Manufacture of semiconductor element |
-
1986
- 1986-06-20 JP JP61145378A patent/JPS631062A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5965474A (en) * | 1982-09-08 | 1984-04-13 | テキサス・インスツルメンツ・インコ−ポレイテツド | Focal surface array structure and method of producing same |
| JPS60224265A (en) * | 1984-04-20 | 1985-11-08 | Fujitsu Ltd | Manufacture of semiconductor element |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02194558A (en) * | 1989-01-21 | 1990-08-01 | Nippondenso Co Ltd | Semiconductor device and manufacture thereof |
| JPH11354762A (en) * | 1998-06-03 | 1999-12-24 | Nippon Telegr & Teleph Corp <Ntt> | Image sensor |
| WO2020213436A1 (en) * | 2019-04-18 | 2020-10-22 | 日本電信電話株式会社 | Light-receiving device and light receiver |
| JP2020178028A (en) * | 2019-04-18 | 2020-10-29 | 日本電信電話株式会社 | Photoreceiver and optical receiver |
| US11862739B2 (en) | 2019-04-18 | 2024-01-02 | Nippon Telegraph And Telephone Corporation | Photoreceiver and optical receiver having an inclined surface |
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