JPS63105409A - Semiconductor manufacturing apparatus - Google Patents

Semiconductor manufacturing apparatus

Info

Publication number
JPS63105409A
JPS63105409A JP24905586A JP24905586A JPS63105409A JP S63105409 A JPS63105409 A JP S63105409A JP 24905586 A JP24905586 A JP 24905586A JP 24905586 A JP24905586 A JP 24905586A JP S63105409 A JPS63105409 A JP S63105409A
Authority
JP
Japan
Prior art keywords
substrate
transparent conductive
conductive film
semiconductor manufacturing
jig
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24905586A
Other languages
Japanese (ja)
Inventor
岩本 浩一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP24905586A priority Critical patent/JPS63105409A/en
Publication of JPS63105409A publication Critical patent/JPS63105409A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、2!仮1上へ透明導電性膜を形成する半導体
製造装置に閃し、基板1と基板取り付は治具3との間に
絶縁膜をはさむことによって絶縁性を図ることに関する
ものである。
[Detailed Description of the Invention] [Industrial Field of Application] The present invention provides 2! Inspired by semiconductor manufacturing equipment in which a transparent conductive film is formed on a temporary substrate 1, the substrate 1 and substrate mounting is concerned with achieving insulation by sandwiching an insulating film between the substrate 1 and a jig 3.

〔従来の技(47) 従来の透明導電性膜を形成する半導体製造装置は、反応
室内を具空にし、不活性ガスを導入し、直流電源または
高周波電源を用いて、透明導電性膜の原材rt周辺にガ
スプラズマを発生させ、基板」−に透明導電性膜を形成
させる装置で、第2図に示すように、基板1を基板ホル
ダー2にセットをし、1人板地り付は治具3に地り付け
ていた。第2図は、基板1を基板ホルダー2にセットし
、基板取り付は治具3に取り付けた伏態を示した図。
[Conventional Technique (47) Conventional semiconductor manufacturing equipment for forming transparent conductive films involves emptying the reaction chamber, introducing an inert gas, and using a DC power supply or high-frequency power supply to transform the raw material of the transparent conductive film. This is a device that generates gas plasma around the material rt to form a transparent conductive film on the substrate.As shown in Figure 2, the substrate 1 is set on the substrate holder 2, and one person attaches the board. It was attached to jig 3. FIG. 2 is a diagram showing the substrate 1 set in the substrate holder 2 and attached to the jig 3 for substrate mounting.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかし、前述の従来技術では透明導電性膜の形成時に、
透明導電性膜の原材fi) 5から照q(されるイオ/
、2次電子が基板1ならびに、基板ホルダー2にR’i
積され、基板取り付は治具3に向かって電流が流れる。
However, in the above-mentioned conventional technology, when forming a transparent conductive film,
Raw materials for transparent conductive film fi)
, secondary electrons are R'i on the substrate 1 and the substrate holder 2.
When mounting the board, a current flows toward the jig 3.

そのt−果、基板1の表面がダメージを受けてしまう。As a result, the surface of the substrate 1 is damaged.

しかも、小さい規模のものではなく、基板1表面全体に
受け、また、多(の基板、表面に受けてしまうため大き
な問題点となってしまう。
Moreover, it is not a small scale, and it is received on the entire surface of the substrate 1, and it is received on the surface of many (substrates), resulting in a big problem.

そこで、本発明はこのような問題点を解決するためのも
ので、その目的とするところは、いかに簡単に、しかも
確実に安く、基板1と基板取り付は治J13との絶縁を
行なうものである。
Therefore, the present invention is intended to solve these problems, and its purpose is to provide insulation between the board 1 and the board mounting fixture 13 in a simple, reliable and inexpensive manner. be.

(問題点を解決するための手段〕 本発明の半導体製造装置は、反応室内を真空にし、不活
性ガスを4人し、直流電源または高周波電源を用いて、
透明導電性膜の原材料周辺にガスプラズマを発生させ、
基板上に透明Wffl性膜を形成する装置において、基
板1と基板取り付は治具3との間に絶縁膜をはさんだ事
を特徴とする。
(Means for Solving the Problems) The semiconductor manufacturing apparatus of the present invention makes a reaction chamber vacuum, inert gas is supplied to four people, and a DC power source or a high frequency power source is used.
Generates gas plasma around the raw material of transparent conductive film,
The apparatus for forming a transparent Wffl film on a substrate is characterized in that an insulating film is sandwiched between the substrate 1 and a jig 3 for mounting the substrate.

〔実施例〕〔Example〕

以下、本発明について実施例に基づいて詳細に説明する
Hereinafter, the present invention will be described in detail based on examples.

第1B1は、本発明の半導体製造装置の構造図である。1B1 is a structural diagram of the semiconductor manufacturing apparatus of the present invention.

1は半導体製造のための基板、2は基板1を基板取り付
は治具3へ取り付けるための基板ホルダー、3は基板ホ
ルダー2を固定するための基板取り付は治具、4は基板
1に透明導電性膜の形成を均一にするためのシャッター
、5は透明導電性膜を形成するための原材料、6は反応
室、7は前記反応室の外壁、8は基板反一応室内を真空
にし、不活性ガスを導入し、直流電源または高周波電源
を用いて、透明導電性膜の扇材料周辺にガスプラズマを
発生させ、基板1上に透明導電性膜を形成する際に透明
導電性膜の原材料5から照射されるイオン、2次電子が
基板1ならびに基板ホルダー2にMi +4’(され、
基板取り付は治具3に向かって流れる電流を遮断するた
めに、基板ホルダー2とノス仮1シり付は治具3との間
に絶縁lI28を挿入する。これにより、基板1の表面
のダメージを解消させることを、簡単に、しかも確実に
安く行なえることを可11ヒとした。また、上記実施例
の絶縁膜8は、ポリイミド製の股を選択した。尚、前記
絶縁膜は、あらかじめ基板ホルダー2の幅より多少大き
く、2分しても前記基板取り付は治具に固定をしても、
確実に絶縁が行なえる大きさのものである。
1 is a substrate for semiconductor manufacturing, 2 is a substrate holder for attaching the substrate 1 to a jig 3, 3 is a jig for fixing the substrate holder 2, and 4 is a substrate holder for attaching the substrate 1 to a jig 3. A shutter for uniformly forming the transparent conductive film; 5 a raw material for forming the transparent conductive film; 6 a reaction chamber; 7 an outer wall of the reaction chamber; 8 a substrate; When forming a transparent conductive film on the substrate 1 by introducing an inert gas and generating gas plasma around the fan material of the transparent conductive film using a DC power source or a high frequency power source, the raw material of the transparent conductive film is The ions and secondary electrons irradiated from the substrate 1 and the substrate holder 2 are Mi +4' (
In order to interrupt the current flowing toward the jig 3 for mounting the board, an insulating lI 28 is inserted between the board holder 2 and the jig 3 for attaching the nozzle. This makes it possible to eliminate damage to the surface of the substrate 1 simply, reliably and at low cost. Further, the insulating film 8 in the above embodiment was selected to have a polyimide crotch. Note that even if the insulating film is slightly larger than the width of the substrate holder 2 in advance, and the substrate is fixed to a jig even if it is divided into two,
It is large enough to provide reliable insulation.

〔発明の効采〕[Efficacy of invention]

以上述べたように、本発明は反応室内を真空にし、不活
性ガスを4人し、直流電源または高周波電源を用いて、
透明J!i電性膜の原材料周辺にガスプラズマを発生さ
せ、基板上に透明導電性膜を形成する装置において、基
板ホルダー2と基板取り付は治具3との間に絶縁膜8を
はさむ事を特徴として構成したので、基板1と基板ホル
ダー2に蓄も11されたイオンや2次電子の電流が基板
取り付は冶!13に向かって流れることがなく、シかも
蓄積されたイオンや2次電子は、透明C電性膜形成後に
自然放電される、と仮定する。したがって、基板1の表
面にダメージを受けることなく、ダメージをffl+ 
!11に、しかも確実に安く行なうことを可能にした。
As described above, the present invention creates a vacuum in the reaction chamber, fills the reaction chamber with inert gas, and uses a DC power source or a high frequency power source.
Transparent J! An apparatus for forming a transparent conductive film on a substrate by generating gas plasma around the raw material of an i-conductive film, characterized in that an insulating film 8 is sandwiched between a substrate holder 2 and a jig 3 for mounting the substrate. Since the structure is configured as follows, the current of ions and secondary electrons stored in the substrate 1 and the substrate holder 2 can be easily used when mounting the substrate. It is assumed that the ions and secondary electrons that do not flow toward 13 and are accumulated are spontaneously discharged after the transparent C conductive film is formed. Therefore, the surface of the substrate 1 is not damaged and the damage is ffl+
! 11, and made it possible to do it reliably and cheaply.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明の半導体製造装置の構造平面図。 第2図は、従来の半導体製造装置の構造平面図。 1・・・基板 2・・・基板ホルダー 3・・・基板取り付は治具 4・・・シャッター 5・・・透明導電性veFrt材料 6・・・反応室 7・・・反応室外壁 8・・・絶縁膜 以  上 出騨1人 セイコーエプソン株式会社 2  ′i?J2図 FIG. 1 is a structural plan view of a semiconductor manufacturing apparatus according to the present invention. FIG. 2 is a structural plan view of a conventional semiconductor manufacturing apparatus. 1... Board 2... Board holder 3...Jig for mounting the board 4...Shutter 5...Transparent conductive veFrt material 6...Reaction chamber 7...Reaction chamber outer wall 8...Insulating film that's all 1 person Seiko Epson Corporation 2′i? J2 diagram

Claims (1)

【特許請求の範囲】[Claims]  反応室内を真空にし、不活性ガスを導入し、直流電源
または高周波電源を用いて、透明導電性膜の原材料周辺
にガスプラズマを発生させ、基板上に透明導電性膜を形
成する装置において、前記基板と基板取り付け治具との
間に絶縁膜をはさんだ事を特徴とする半導体製造装置。
In the apparatus for forming a transparent conductive film on a substrate by evacuating the reaction chamber, introducing an inert gas, and generating gas plasma around the raw material of the transparent conductive film using a DC power supply or a high frequency power supply, A semiconductor manufacturing device characterized by sandwiching an insulating film between a substrate and a substrate mounting jig.
JP24905586A 1986-10-20 1986-10-20 Semiconductor manufacturing apparatus Pending JPS63105409A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24905586A JPS63105409A (en) 1986-10-20 1986-10-20 Semiconductor manufacturing apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24905586A JPS63105409A (en) 1986-10-20 1986-10-20 Semiconductor manufacturing apparatus

Publications (1)

Publication Number Publication Date
JPS63105409A true JPS63105409A (en) 1988-05-10

Family

ID=17187338

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24905586A Pending JPS63105409A (en) 1986-10-20 1986-10-20 Semiconductor manufacturing apparatus

Country Status (1)

Country Link
JP (1) JPS63105409A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61214306A (en) * 1985-03-18 1986-09-24 大阪特殊合金株式会社 Method and apparatus for transparent conducting film

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61214306A (en) * 1985-03-18 1986-09-24 大阪特殊合金株式会社 Method and apparatus for transparent conducting film

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