JPS6310518A - Manufacture of amorphous silicon film - Google Patents

Manufacture of amorphous silicon film

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Publication number
JPS6310518A
JPS6310518A JP61154185A JP15418586A JPS6310518A JP S6310518 A JPS6310518 A JP S6310518A JP 61154185 A JP61154185 A JP 61154185A JP 15418586 A JP15418586 A JP 15418586A JP S6310518 A JPS6310518 A JP S6310518A
Authority
JP
Japan
Prior art keywords
film
substrate
layer
buffer layer
internal stress
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61154185A
Other languages
Japanese (ja)
Inventor
Hiroyuki Okamoto
弘之 岡本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP61154185A priority Critical patent/JPS6310518A/en
Publication of JPS6310518A publication Critical patent/JPS6310518A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To improve reliability of a device having an a-Si:H film as a photoconductive layer, by interposing a buffer layer between a substrate and the a-Si:H film, a device grade, so that internal stress owned by the a-Si:H film is moderated to prevent peeling, cracking, floating, and the like of the film due to the internal stress from occurring. CONSTITUTION:A buffer layer 5 made of a-Si:H and interposed between a glass substrate 1 and a device-grade (i) layer 2 is made to own internal stress smaller than the (i) layer 2. Therefore the buffer layer 5 is hard to be peeled from the substrate 1. Another role of the buffer layer 5 is that this film is hard to be peeled due to thermal stress because the value of its thermal expansion factor is near to that of the glass substrate 1 rather than that of the (i) layer 2. The buffer layer 5 is formed in the following conditions; the substrate temperature increases, or SiH4-gas pressure decreases respectively at the time of film formation as the positions of layers become more distant from the substrate.

Description

【発明の詳細な説明】 (技術分野) 本発明は、膜が有する内部応力を緩和するようにしたア
モルファスシリコン(以下a−8iと記す)膜の製造方
法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a method for manufacturing an amorphous silicon (hereinafter referred to as a-8i) film that relieves the internal stress of the film.

(従来技術) 第2図は、石英、パイ1・yクス等のガラス基板1上に
、光導電層としてノンドープのa−Si:H[111C
以下単にi層ともいう)2を形成し、さらに電極取出部
にリン(P)がドープされたn0オ一ミツクコンタクト
層3.A1.Cr等の金属電極4を順次積層してなる典
型的なコプレナー型フォトセルの構造を示したものであ
る。この従来例のような高い光導電層を有する(デバイ
スグレードの)ノンドープa−Si:H膜は、その膜中
に10@〜1G”ダイン/dの大きさの圧縮型内部応力
を持っている(J、J、A、P、22,5.167(1
9113) K、QZAIAら参照)。
(Prior art) Fig. 2 shows a photoconductive layer formed on a glass substrate 1 made of quartz, Pi1.
(hereinafter also simply referred to as an i-layer) 2, and an n0 omic contact layer 3. in which the electrode lead portion is doped with phosphorus (P). A1. This figure shows the structure of a typical coplanar photocell in which metal electrodes 4 made of Cr or the like are sequentially laminated. A (device grade) non-doped a-Si:H film with a high photoconductivity layer like this conventional example has a compressive internal stress in the film of the magnitude of 10@~1 G'' dynes/d. (J, J, A, P, 22, 5.167 (1
9113) K., QZAIA et al.).

例えば第3図に示したように、光導重度が1O−6(Ω
−’ Ql −’ )以上を持つ膜の内部応力は2〜4
XIO’ダイン/dと大きい、ここで圧縮型とは、膜が
伸びようとする状態を言う、膜の内部応力が大きいと、
膜と基板との付着力が弱い場合には、膜が基板から剥離
したり、しわが寄ったりする。
For example, as shown in Figure 3, the light guiding strength is 1O-6 (Ω
-' Ql -' ) or more, the internal stress of the film is 2 to 4.
XIO' dyne/d is large.Here, compression type refers to a state in which the film tries to stretch.If the internal stress of the film is large,
If the adhesion between the film and the substrate is weak, the film may peel off from the substrate or wrinkle.

a−5i:Hの膜中応力を減少させる試みとしては、原
料ガスとしてのSiH4ガスと5i2H,ガスの混合比
により応力をコントロールしたものや。
As an attempt to reduce the stress in the a-5i:H film, the stress was controlled by the mixing ratio of SiH4 gas as a raw material gas and 5i2H gas.

SL、H,系の膜(低応力)とSiH4系の膜(高応力
)との積層構成が報告されている(′85秋応物予稿集
、 p721.3p−ZA−16参照)、シカシ前者ニ
オイては、SL、H,ガスによるa−8il[lの光導
電特性の劣化という欠点を有し、また後者においては。
A laminated structure of an SL, H, film (low stress) and a SiH4 film (high stress) has been reported (see '85 Autumn Science Proceedings, p721.3p-ZA-16), and the former has a strong odor. The latter has the drawback of deterioration of the photoconductive properties of a-8il[l by SL, H, and gas;

ガス種の切り替えによるガスの混成に基づく特性劣化、
再現性に問題を有している。
Characteristic deterioration due to gas mixture due to switching of gas types,
There are problems with reproducibility.

(発明の目的) 本発明は、上記従来技術の問題点を解決するもので、基
板とa−Si: H膜(i層)との間にバッファ層を設
けることにより、i層が有する内部応力を緩和するよう
にしたa−3L膜の製造方法を提供するものである。
(Objective of the Invention) The present invention solves the problems of the prior art described above, and by providing a buffer layer between the substrate and the a-Si:H film (i-layer), the internal stress of the i-layer can be reduced. The purpose of the present invention is to provide a method for manufacturing an a-3L film in which the

(発明の構成) 上記目的を達成するために、プラズマCVD法により、
ガラス基板上に少なくとも2層のa −S i:H膜を
積層し、その成膜条件として、成膜時の基板温度を基板
に近い層から遠い層にいくに従って順次高くなるように
して形成するか、あるいは成膜時のSiH,ガス圧力を
基板に近い層から遠い層にいくに従って順次低くなるよ
うにして形成するか、若しくはその両方を併用して形成
するものである。
(Structure of the invention) In order to achieve the above object, by plasma CVD method,
At least two layers of a-S i:H films are laminated on a glass substrate, and the film formation conditions are such that the substrate temperature during film formation increases sequentially from layers closer to the substrate to layers farther from the substrate. Alternatively, the pressure of SiH and gas during film formation may be gradually lowered from the layer closer to the substrate to the layer farther from the substrate, or both may be used in combination.

この構成によれば、基板とデバイスグレードのi層との
間にバッファ層が介在することになり、i層が持つ内部
応力が緩和され、膜の剥離やクラック、浮きを防止する
ことができる。
According to this configuration, a buffer layer is interposed between the substrate and the device-grade i-layer, which relieves the internal stress of the i-layer and prevents peeling, cracking, and lifting of the film.

(実施例) 以下、図面に基づき実施例を詳細に説明する。(Example) Hereinafter, embodiments will be described in detail based on the drawings.

第1図は1本発明の一実施例を示したもので、第2図と
同一符号のものは同一のものを示しており、また5は、
ガラス基板1とデバイスグレードの1層2との間に設け
られた。a−5i:Hからなるバッファ層である。
FIG. 1 shows one embodiment of the present invention, and the same reference numerals as in FIG.
It was provided between a glass substrate 1 and a device grade layer 2. a-5i: A buffer layer made of H.

このバッファ層5は、1層2に比べて小さい内部応力を
持つ、従って、基板1とバッファ層5との剥離は起きに
くい、また、バッファ層5のもう一つの役割は、その熱
膨張率の値が1層2に比べてガラス基板1の熱膨張率に
近いため、熱応力による膜の剥がれも起きにくいという
ことである。
This buffer layer 5 has a smaller internal stress than the first layer 2. Therefore, peeling between the substrate 1 and the buffer layer 5 is difficult to occur. Another role of the buffer layer 5 is to control its coefficient of thermal expansion. Since the coefficient of thermal expansion is closer to that of the glass substrate 1 than that of the single layer 2, peeling of the film due to thermal stress is less likely to occur.

パイレックス基板の熱膨張係数は3.3X10−’/’
C、ノンドープのa−Si:H膜の熱膨張係数は1.2
X10−’/’Cであり、これに対し、バッファ層のそ
れを、1.9〜2.8 X 10−@/ ”Cとするこ
とができる(成膜条件により異なる)。
The thermal expansion coefficient of Pyrex board is 3.3X10-'/'
C, the thermal expansion coefficient of non-doped a-Si:H film is 1.2
X10-'/'C, whereas that of the buffer layer can be 1.9 to 2.8 X10-'/'C (depending on film formation conditions).

バッファ層5の成膜条件の特徴は、■デバイスグレード
の1層2に比べてS i H,ガス圧力を高くすること
、あるいは、■ 1層2に比べて基板温度を低くするこ
と、である、第4図は、SiH。
The characteristics of the film formation conditions for the buffer layer 5 are: (1) increasing the S i H gas pressure compared to the device grade 1 layer 2, or (2) lowering the substrate temperature compared to the 1 layer 2. , FIG. 4 shows SiH.

ガス圧力と膜の内部応力との関係を示したものであり、
また第5図は、基板温度と膜の内部応力との関係を示し
たものである。これらの図から、ガス圧が高い程、また
基板温度が低い程、圧縮型の内部応力は小さくなること
が判る。
This shows the relationship between gas pressure and the internal stress of the membrane.
Further, FIG. 5 shows the relationship between the substrate temperature and the internal stress of the film. From these figures, it can be seen that the higher the gas pressure and the lower the substrate temperature, the smaller the internal stress of the compression mold.

a−Si:H膜とガラス基板との付着力の評価は。What is the evaluation of the adhesion between the a-Si:H film and the glass substrate?

a−Si: H膜に金属針で傷をつけ、その傷の幅によ
り判定する方法がある。この傷の幅が小さい程、付着力
は大きい、従来の単層の場合のa−Si:H膜は、この
傷の幅が10〜50mmとかなり大きいが、本発明構成
のものでは、Loom以下である。(幅の値は、使用す
る金属針の太さによるが、これを用いて相対的な付着力
を評価することができる)。
There is a method of scratching the a-Si:H film with a metal needle and determining the width of the scratch. The smaller the width of this scratch, the greater the adhesion force.In the case of a conventional single layer a-Si:H film, the width of this scratch is quite large at 10 to 50 mm, but with the structure of the present invention, the width of the scratch is less than Loom. It is. (The width value depends on the thickness of the metal needle used, but can be used to assess relative adhesion).

デバイス化湿式プロセスにおいて、プロセス途中でa−
Si:H膜の剥離という故障が生じるのは、傷の幅が3
5mm以上の場合であった。従って従来法においてはプ
ロセス途中でa−Si: H膜の剥離という故障が発生
することもあったが、本発明の構成により、それは皆無
となった。
In the device manufacturing wet process, a-
The failure of Si:H film peeling occurs when the width of the scratch is 3
This was the case when the diameter was 5 mm or more. Therefore, in the conventional method, failures such as peeling of the a-Si:H film sometimes occurred during the process, but with the structure of the present invention, such problems have been completely eliminated.

次に、1層2とバッファ層5との具体的な作製条件を説
明する。まず、a−Si: Hは、容量結合型RFグロ
ー放電法によってアース側のガラス基板上に堆積させる
Next, specific manufacturing conditions for the first layer 2 and the buffer layer 5 will be explained. First, a-Si:H is deposited on a glass substrate on the ground side by a capacitively coupled RF glow discharge method.

デバイスグレードの1層2の成膜条件は、基板温度;2
60〜300℃、RFパワー;10〜40W。
The device grade film formation conditions for layer 1 and 2 are substrate temperature;
60-300°C, RF power: 10-40W.

SiH,ガス圧力; 0.07〜0.2Torr、ガス
流量;5〜303ccIm、電極間隔;36mmである
。膜厚は8000〜12000人が望ましい。
SiH, gas pressure: 0.07 to 0.2 Torr, gas flow rate: 5 to 303 ccIm, and electrode spacing: 36 mm. The film thickness is preferably 8,000 to 12,000 people.

バッファ層5の成膜条件は、基板温度;140〜200
℃、RFパワー;10〜40W、SiH,ガス圧力;0
.2S〜0.4Torr、ガス流量;5〜303cc1
1であり、膜厚は100〜2000人が望ましい。
The film-forming conditions for the buffer layer 5 are: substrate temperature; 140-200;
°C, RF power: 10-40W, SiH, gas pressure: 0
.. 2S~0.4Torr, gas flow rate; 5~303cc1
1, and the film thickness is preferably 100 to 2000 people.

上記バッファ層の成膜条件のうち、基板温度とSiH4
ガス圧力は、そのどちらかがこの条件であればよく、他
は1層2の条件と同一で構わない。
Among the conditions for forming the buffer layer above, the substrate temperature and SiH4
The gas pressure only needs to meet this condition for one of them, and the other conditions may be the same as those for layer 1 and layer 2.

例えば、基板温度のみを変えてバッファ層を形成する場
合、まず、基板温度を200℃、RFパワーを20W、
5i)I4圧力を0.ITorr、ガス流量を30sc
c麿とし、約2000人のバッファ層をプラズマ放電に
より形成する。その後、プラズマ放電を止め。
For example, when forming a buffer layer by changing only the substrate temperature, first, the substrate temperature is 200°C, the RF power is 20W,
5i) Reduce I4 pressure to 0. ITorr, gas flow rate 30sc
A buffer layer of about 2,000 layers is formed by plasma discharge. Then, stop the plasma discharge.

SiH,ガスを流したまま圧力を0.IT’orrに保
ち。
While the SiH gas is flowing, the pressure is reduced to 0. Keep IT'orr.

基板温度を290℃まで上げる。そこで再びプラズマ放
電を開始し、膜厚にして約aooo人のi層を形成する
Raise the substrate temperature to 290°C. Then, plasma discharge is started again to form an i-layer with a thickness of approximately 100 mm.

(発明の効果) 以上説明したように1本発明によれば、基板とデバイス
グレードのa−Si: H膜との間にバッファ層を設け
ることにより、a−Si:H膜が有する内部応力が緩和
され、内部応力に起因する膜の剥離やクラック、浮き等
の発生を防止することができ、従ってa−8L:H膜を
光導電層とするデバイスの信頼性を高めることができる
(Effects of the Invention) As explained above, according to the present invention, by providing a buffer layer between the substrate and the device-grade a-Si:H film, the internal stress of the a-Si:H film can be reduced. It is possible to prevent the film from peeling off, cracking, floating, etc. due to internal stress, thereby increasing the reliability of devices using the a-8L:H film as a photoconductive layer.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明の一実施例の断面図、第2図は、従来
例の断面図、第3図は、a−Si: H膜の光導電層と
内部応力との関係を示す図、第4図は、SiH4ガス圧
力と内部応力との関係を示す図、第5図は、基板温度と
内部応力との関係を示す図である。 1 ・・・ガラス基板、 2 ・・・ノンドープのa−
Si:H膜(i層)、 3 ・・・オーミックコンタク
ト層、 4・・・金属電極、 5・・・バッファ層。 特許出願人  株式会社 リ コー 第1図    第2図 1・力1ラス茶振 2−a−SiHMl(i層臂) 3・・・オーミックコンタクト層 4・・&−5I4LyII 5 ・バッファ ・1 第3図 第4図 号 第5図 基組−X及−
FIG. 1 is a sectional view of an embodiment of the present invention, FIG. 2 is a sectional view of a conventional example, and FIG. 3 is a diagram showing the relationship between the photoconductive layer and internal stress of an a-Si:H film. , FIG. 4 is a diagram showing the relationship between SiH4 gas pressure and internal stress, and FIG. 5 is a diagram showing the relationship between substrate temperature and internal stress. 1...Glass substrate, 2...Non-doped a-
Si:H film (i layer), 3... Ohmic contact layer, 4... Metal electrode, 5... Buffer layer. Patent applicant Ricoh Co., Ltd. Fig. 1 Fig. 2 1. Force 1 Laser shake 2-a-SiHMl (I-layer arm) 3...Ohmic contact layer 4...&-5I4LyII 5 ・Buffer ・1 3rd Figure 4 Figure 5 Basic set-X and-

Claims (1)

【特許請求の範囲】 プラズマCVD法により、ガラス等の絶縁基板上に少な
くとも2層のa−Si:H膜を積層し、その成膜条件が
、下記に示す条件のうちのいずれか一つに該当すること
を特徴とするアモルファスシリコン膜の製造方法。 条件1 前記少なくとも2層のa−Si:H膜の成膜時の基板温
度が、基板に近い層から遠い層にいくに従って順次高く
なるようにして形成すること。 条件2 前記少なくとも2層のa−Si:H膜の成膜時のSiH
_4ガス圧力が、基板に近い層から遠い層にいくに従っ
て順次低くなるようにして形成すること。 条件3 前記少なくとも2層のa−Si:H膜の成膜時の基板温
度が、基板に近い層から遠い層にいくに従って順次高く
なり、かつSiH_4ガス圧力が順次低くなるようにし
て形成すること。
[Claims] At least two layers of a-Si:H film are laminated on an insulating substrate such as glass by a plasma CVD method, and the film forming conditions are set to any one of the conditions shown below. A method for producing an amorphous silicon film characterized by the following characteristics. Condition 1: The at least two a-Si:H films are formed such that the substrate temperature during film formation increases sequentially from layers closer to the substrate to layers farther from the substrate. Condition 2 SiH when forming the at least two layers of a-Si:H film
_4 To form a layer in which the gas pressure gradually decreases from the layer closer to the substrate to the layer farther from the substrate. Condition 3: The at least two layers of a-Si:H films are formed such that the substrate temperature increases sequentially from the layer closer to the substrate to the layer farther from the substrate, and the SiH_4 gas pressure decreases sequentially. .
JP61154185A 1986-07-02 1986-07-02 Manufacture of amorphous silicon film Pending JPS6310518A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61154185A JPS6310518A (en) 1986-07-02 1986-07-02 Manufacture of amorphous silicon film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61154185A JPS6310518A (en) 1986-07-02 1986-07-02 Manufacture of amorphous silicon film

Publications (1)

Publication Number Publication Date
JPS6310518A true JPS6310518A (en) 1988-01-18

Family

ID=15578694

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61154185A Pending JPS6310518A (en) 1986-07-02 1986-07-02 Manufacture of amorphous silicon film

Country Status (1)

Country Link
JP (1) JPS6310518A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06291044A (en) * 1993-01-28 1994-10-18 Applied Materials Inc Piling of amorphous silicon thin film at high piling speed on glass substrate of large area by cvd

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06291044A (en) * 1993-01-28 1994-10-18 Applied Materials Inc Piling of amorphous silicon thin film at high piling speed on glass substrate of large area by cvd

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