JPS63102247U - - Google Patents
Info
- Publication number
- JPS63102247U JPS63102247U JP19684686U JP19684686U JPS63102247U JP S63102247 U JPS63102247 U JP S63102247U JP 19684686 U JP19684686 U JP 19684686U JP 19684686 U JP19684686 U JP 19684686U JP S63102247 U JPS63102247 U JP S63102247U
- Authority
- JP
- Japan
- Prior art keywords
- top surface
- pga type
- arrangement pitch
- guide holes
- positioning member
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Testing Electric Properties And Detecting Electric Faults (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19684686U JPS63102247U (en:Method) | 1986-12-23 | 1986-12-23 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19684686U JPS63102247U (en:Method) | 1986-12-23 | 1986-12-23 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63102247U true JPS63102247U (en:Method) | 1988-07-02 |
Family
ID=31156027
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19684686U Pending JPS63102247U (en:Method) | 1986-12-23 | 1986-12-23 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63102247U (en:Method) |
-
1986
- 1986-12-23 JP JP19684686U patent/JPS63102247U/ja active Pending
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