JPS6292012A - Information setting device - Google Patents

Abstract

PURPOSE:To improve the data processing accuracy by counting once the ON and OFF signals produced by a switch means by a counter and reading said count value by a computer. CONSTITUTION:The pulses are supplied to a counter 16 from a decoder 24 in response to the operating frequencies of both dials 6 and 7 as the up- or down-signals according to the dial operating directions every time both dials 6 and 7 are shifted to the next click positions respectively. The data on the counter 16 is supplied to a shift register 17 (parallel input) in the form of the parallel data. Thus the parallel data on the register 17, i.e., the data obtained in accordance with the operating frequencies of both dials are supplied serially to a CPU1 from an input port PI0 via a buffer 18 and stored in an accumulator. Then zero is sent out of an output port PO0 and the buffer 18 is closed to complete the input of data.

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention allows a microcomputer to detect an on/off signal of a switch means linked to the operation of an operating member, and updates and sets data based on the on/off signal of the switch means. The present invention relates to an information setting device that performs.

<Prior Art> Conventionally, information setting devices of the above type are known in which input data is set on a computer by turning on/off a switch means.

In this type of device, for example, the operating member is composed of a rotating body such as a dial, and when the switch is turned on and off multiple times in conjunction with one revolution of the rotating body, the dial is rotated at high speed. When operated, an extremely large number of on/off signals are generated in a short period of time, and if these are directly input and processed by a computer, there is a risk that the computer will not be able to respond to changes in the on/off signals.

Purpose of the present invention The present invention has been made in view of the above-mentioned matters, and includes forming a digital value based on an on/off signal of a switch means interlocked with an operating member, causing a microcomputer to read the digital value, and converting the digital value into input data. In an information setting device for setting information as a counter, a counter is provided which performs a counting operation by detecting an on/off signal of the switch means, and a microcomputer is operated in response to the on/off signal of the switch means to record the contents of the counter. By having the computer read the data, the counter can be used as a buffer and the data can be accurately read by the computer even when the operating member is operated at high speed.

<Embodiments> An information setting device according to the present invention will be described below based on the embodiments shown in the drawings.

Figure 1 is a circuit diagram showing the main part configuration of a camera to which the information setting device according to the present invention is applied. 1 in Figure 1 is a microcomputer (hereinafter referred to as CPU) that performs all operations necessary for photographing in the camera. 1 display and others are controlled by a program built into the microcomputer (CPU), and each part of the camera operates based on future commands. 2
3 is a decoder that converts photographic information into a display signal; 3 is a display device; display is performed using, for example, a 4-digit, 7-segment liquid crystal display element. Reference numeral 4 denotes a photometry section, in which a light receiving element SPC is connected to the input of an operational amplifier OP, and a compression diode D is connected to a feedback circuit. This output is input to AD converter 5, converted into a digital value, and input to the CPU. 6 and 7 show switch circuits in which two switches are shown isometrically in the dial pattern described below, and include switches SWI, SW2 and pull-up resistors R1, R2, respectively.
, inverters INI and IN2, and switch s
w1. The output becomes 1 (/\I level) only when SW2 is turned on (when the dial pattern is conductive). 8 is for switching the shooting mode (program, shutter speed priority, aperture priority mode). The mode change switch is linked to a mode change button (not shown). 9 is an ISO information change switch that is linked to an ISO button (not shown). 10 is a photometry start switch, and 11 is a release switch. When these switches are off, they are also pulled up by resistors. The switch IO is turned on in a first operating state of a release operating member (not shown).

The switch 11 is turned on in the second operating state of the release operating member. 12 is a known shutter and aperture control mechanism. 13 is an information input circuit that decodes and counts dial information.

FIG. 2 shows the switch sw1. shown in FIG. 2 is a configuration diagram showing a dial pattern of sw2. In FIG. 2, DL1 is an electrode pattern section fixed to the camera, and DL2 is a rotating section that rotates in conjunction with the rotation of a setting dial (not shown).

DL3 is an electrode provided on the electrode pattern portion DLI, and constitutes the switch SWI together with the brush DL6 that slides on the electrode DL3 in conjunction with the rotating portion DI, 2 and the common electrode pattern DL5.

Further, DL4 is an electrode provided on the electrode pattern portion DLl, and the electrode DL3 similarly constitutes the switch SW2 together with the brush DLi3 and the common electrode DL5.

DL7 is four parts provided inside the pattern part DL1, and together with the leaf spring DL9 provided in the rotating part DI, 2, constitutes a click. The recess is the electrode DL3. The position where both DL4 and brush DL6 do not come into contact with each other, that is, the switch SW1. s
w2 is placed at a position where both are turned off, and this click position becomes the setting position.

FIG. 9 is a waveform diagram showing the relationship between the set position of the dial pattern and the output state of the switch circuits 6 and 7. When the click position is O, both the switch circuits 6 and 7 are set to O (low).
is output, and when it is in position l, the switch circuit 6 is 1 (high)
, the switch circuit 7 outputs low, and the position? , 3, the switch circuit 6.7 exhibits the output state shown in the table below.

FIG. 3 is a circuit diagram showing the configuration of an information input circuit in which the switch circuits 6 and 7 mentioned above are connected to inputs. In the figure,
14.15 is a D flip-flop and the flip-flop 1
4.15 are connected to switch circuits 6 and 7, respectively. The flip-flops 14 and 15 constitute a latch for holding the state before the change for l clock time when the setting state of the dial pattern shown in the second figure changes.

24 is a decoder, and the input p1n of the decoder 24,
D(In is directly connected to the switch circuit 6.7, and inputs Den-1, D□n-1 are connected to the D flip-flop 14.
15 to the switch circuits 6 and 7, the current state of the dial pattern is also input to the inputs Dln and DOn of the decoder 24.
The previous state of the dial pattern is input to .

The decoder 24 determines the input state to the input terminal, and each time the dial is rotated beyond the click interval, it generates an up signal (pulse) or a down signal (pulse) depending on the direction of rotation, and generates an up/down counter. Tell 16. 1
6 is the above-mentioned up-down counter, which is composed of an 8-bit counter. For example, when the content represents +2, (0
. 17 is a shift register that inputs the contents of the counter 16 in parallel and outputs them serially;
l9c is a D flip-flop which receives the up and down signals from the lever 24 as clock inputs and generates an output 1 in response to the signals.
The output of is input to the input port PI of the CPUI.

The shift register 17 starts shifting input data in response to a read signal from the output port POO of the CPUI, which will be described later, and serially transfers the data to the input port PIO of the CPUI via the buffer 18.

The buffer 18 opens in response to a three-state buffer signal.

20 is a D flip-flop that inputs the read signal from the output port POO of the CPUI, and its q output is connected to one input terminal of the AND gate 23, and the other input of the gate inputs the read signal directly. ing.

For example, when a read signal is generated as shown in FIG. 8 (2) in the configuration described above, the Q output of the flip-flop 2o becomes as shown in FIG.
), and the AND gate 23 sends out a one-shot pulse as shown in FIG. 8(4). Note that the clock pulse shown in FIG. 8 (1) is applied to the D flip-flop 7'14.1.
5°20, is input to shift register 17,
In response to the rising edge signal of the pulse, the flip-flop 20
performs the above-mentioned operation, and the shift drain star 17 sequentially shifts the parallel input data in synchronization with the pulse.
It is sent to the input port PIo of cPUl as described above.

The output of the AND gate 23 is connected to the clear terminal CLH of the counter 16 and the flip-flop 19 via the OR gate 22, and the output of the AND gate 23 (FIG. 8 (4)) is connected to the counter 16 and the flip-flop 19. Reset 19.

FIG. 4 is a circuit diagram showing details of the decoder 24 shown in FIG.
．． 24-18 is an inverter, 24-13 to 24-16
．． 24-19゜24-20.24-25.24-26 is an AND gate, 24-21.24-22 is an OR gate,
24-23 and 24-24 are D flip-flops to which the clock shown in FIG. 8(1) is input.

The above AND gate 24-13 is connected to the input D of the decoder.
ln is 1, Dln-1, DOn.

The AND gate 24-13 is configured to send out 1 when DQn-1 is O, so that the AND gate 24-13 sends out 1 when the dial moves from click position O to position 1 in FIG.

Also, the AND gate 24-14 is connected to the input Dln- of the decoder.
1 is l, Dln, D□n, D (configured to send l when +n-1 is O, and sends l when the dial moves from position 1 to the click position. Also, anime) 24-15.
24-16 send out 1 when the dial moves from position 3 to click position and when the dial moves from click position to position 3, respectively.

Also, the D input of flip-flops 24-23 is O7 game) 2
It is connected to the output of the AND gate 24-13 via the gate 24-21, and is configured to set the output Q to 1 in response to the output l of the gate 24-23. The flip-flop 2
The output of 4-23 is fed back to one of the gates 24-19, and the other input of the gate 24-19 is fed back to the gate 24-14.2 via an inverter 24-17.24-18.
4-15, and the output of gate 24-19 is connected to flip-flop 2 through OR gate 24-21.
It is input to the D input of 4-23. Because of this configuration, the dial moves from the click position to position 1, and the D flip-flops 24-23 are once set g (Q=
1), the set state is maintained until the dial returns from position 1 to the click position again, or advances from position 1 to positions 2 and 3 and moves to the next click position. Also, the input of the anime game) 24-25 is the flip-flop 24-2.
3 and the output of the gate 24-15, and the gate 24-15 is connected to the Q output 1 of the flip-flop 24-23.
In response to 1 from gate 24-15, it sends l.

With this configuration, from 24-25, a pulse is sent out as an up signal every time the dial is operated in the up force direction shown in Figure 2 and the dial moves from the click position to the next click position beyond 1°2.3. be done.

Also, the D input of the flip-flop 24-24 is the OR gate 2.
4-22 to the output of gate 24-16 and gate 2
Connected to the output of 4-20, and further connected to the output of 24-2
The input of 0 is connected via an inverter 24-18, 24-17 to the output of the gate 24-14, 24-15 and to the output of the flip-flop 24-24. In this connection configuration, the flip-flop 24-24 is connected to the gate 24-16.
The set state is set in response to the 1 of 1, and the set state is maintained until the gate 24-14. The set state is maintained until the next click position is operated. Also gate 24-26
The input of is connected to the Q output of the flip-flop 24-24 and the gate 24-14, so that the input of the gate 24-
26, the dial moves from the clicked position to the arrow DOW in Figure 2.
A pulse as a down signal is sent out each time the device is operated in the N direction and moves to the next click position.

Incidentally, as mentioned above, the flip-flops 24-23 are connected to the gate 2.
4-14 and also flip-flop 24-
24 is reset in response to 1 from gate 24-15, so positions 3 and 2 center around the dial click position.
．． Up and down signals are not sent even if operated in one direction and within the range of positions 1, 2, and 3 force directions.

Next, the operation of the embodiment of FIG. 1 according to the above configuration is illustrated in FIGS.
This will be explained using the flowchart shown up to FIG. 7(b). The flowcharts in FIGS. 5 to 7(b) are as follows.
2 is a flowchart showing a micro instruction and a micro instruction that shows a program written in a ROM built into the CPUI shown in the figure, and the micro instruction is a step number shown in the drawing.
Instructions are sequentially executed on the CPUI.

Here, power is always supplied to the CPUI, decoder 2, display device 3, information input circuit 3 and switch circuits 6.7, and the photometry circuit 4° AD converter 5, control circuit 12, etc. It is assumed that power is supplied by the main switch.

Main switch (not shown) by operating an operation member (not shown)
By turning on, a sequence operation is started by a program built in the CPUI, and initial values or stored values are first set in each register in the CPUI as shown in the flowchart shown in FIG. After this, the sequence shifts to a sequence of sensing the switches and dials, setting, changing, and displaying information, and continues sensing this sequence until the photometry switch is turned on, that is, until the switch 10 is turned on. The operation of this sequence will be explained using the microflow chart shown in FIG.

After the initial values are set in each register in the CPUI as described above, the CPU first starts by setting the ISO button sense (baud) P according to the program.
I3 is O or not), mode button sense (baud) for setting the mode (PI2 is O or not), and
The dial senses whether the setting information has changed (whether the baud PI is 1 (high level) or not).

Command IN in step 1 when the So button is sensed
The input status of the CPUI input port PI3 at FPI3 (
The state of the switch 9) is detected, and the detection result is determined in step 2.

Assuming that the ISO button is currently being pressed, the switch 9 is on, and O is detected in the above instruction 1NPPI3, so the step branches to 1'' in step 2.

In step 1'', the input state of the input port PI1 of the CPUI is detected by INPP II, and the determination is made in step 2''. When the input state of the input port P11 is O, the process moves to step 3'', and the information in the ISO information setting register Rs is sent to the decoder 2 via the output ports PH0 to PH3 and displayed on the display device 3. This step moves to step 1 again, and now $kr s
While the o button continues to be pressed, the above-mentioned operations are repeated and the information of the register Rs continues to be displayed on the display device. In this case, the information in the register Rs does not change, so the same ISO information continues to be displayed.

If the dial is operated in the above sequence process, the process moves to step 4''. That is, when the dial is operated, an up or down signal is sent from the decoder 24 every time the dial moves from one click position to the next click position as described above. Since this is transmitted to the clock terminal of the flip-flop 19 via the OR gate 24, the Q output of the flip-flop 19 becomes 1, and the above step l''
, 2'', this is detected and determined, and the process moves to step 4''. The command DATAINPUT in step 4'' sends the data from the input port PIO to the 7 cumulator A.
The details are shown in FIG. 7(a). That is, the DATA INPUT first sends 1 to the output port P00. The 1 from the boat P00 is transmitted to the 7-lip flop 20, gate 23, register 17, and buffer 18 shown in the third diagram, and the parallel input data of the register is serially input to the input port PIo in synchronization with the clock via the buffer 18. .

As mentioned above, the number of pulses corresponding to the operation of the dial is input from the decoder 24 to the counter 16 as an up or down signal depending on the direction of the operation.
6 is input to the register 17 as parallel data of the register 17, this parallel data, that is, the data corresponding to the dial operation, is serially transmitted from the input port PIO to the CP via the buffer 18.
This is input to the UI and stored in 7 storage unit A. After this, 0 is sent from the output port POo, the eight buffer 18 is closed, and the above data processing is completed.

When the dial is operated in this way, data corresponding to the amount of operation is stored in accumulator A in step 4'', and addition of this data and the data in register Rs is executed in step 5'', and the ISO Information is updated by dialing. The added data is processed in steps 6″ and 7.
In step 3, it is determined whether the added data is between 0 and 10, and when the added data is within the above range, in step 3, the above-mentioned added data, that is, the data updated by dial operation, is determined. A display is made. Also step 6″.

As a result of 7'', when the above added value is 0> added value and 10 times added value, 10 or 0 is set in the register Rs in steps 8'' and 9'' and this is displayed.
7'', 8'', and 9'' are commands to prevent the set value from exceeding the upper limit of 10 and from becoming less than the lower limit of 0.

Note that each of O to 10 set in register Rs is 1.
0-level ISO sensitivity information is shown.

Next, the case where the mode button is pressed will be explained. In this case, the switch 8 is turned on, so 0 is input to the input port PI2 of the CPUI, which is used in steps 3 and 4.
is detected and the process moves to step 10''. If the dial is not operated in this state, step ti'' is executed.

12'', the data in the mode information register RP is transmitted to the display device 3 via the output port PGO-PGI, and the mode is displayed based on the data set in the register RP.In this state, operate the dial. Then, the process moves to step 13'', where the pulse number information (
Operation data) is input to accumulator A, and in step 14'' this operation data is added to the contents of register RP. In step 15'', if the contents of register RP is less than zero, step 1
At step 6'', the contents of the register Rp are incremented by +3, and the process returns to step 15''. This step l5'',
Even if the dial operation is performed in the downward direction at step 16'', the contents of register Rp can be set to a value greater than zero, and data less than zero is prevented from being set in register Rp.In step 17'', It is determined whether the contents of the register RP are greater than 2, and if RP>2, the contents of the register are incremented by -3 in step 18'' and the process returns to step 17''. It does not seem that the contents of register R are not set to 2 or higher even if the dial is operated in the upward direction.
The content of p is set in the range of O to 2.

After step 17'', the process moves to step 12'', and the contents of the register Rp changed by the dial operation are displayed on the display device 3. It is assumed that when the content of the register Rp is O, it represents the program mode, when it is 1, it represents the shutter priority mode, and when it is 2, it represents the aperture priority mode.

Next, a case will be described in which neither the ISO button nor the mode button is pressed. In this case, it is determined in steps 5 and 6 whether or not the dial operation has been performed, and if the dial operation has been performed, the data set by the dial operation is input to the 7 cumulator A in step 19''. After this, the data in the register Rp is determined in steps 20 and 21'', and when the content of the register RP is 1, that is, in the shutter priority mode, the process moves to step 22''.In this step 22'', the data in the accumulator A is The contents are added to the contents of register R-1-. The register RT is a shutter time register, and the set shutter time is updated based on the data set with the dial in step 22''. After this, steps 23'' to 26'' are executed. . These steps are the same instructions as steps 6″ to 9″ above, and the set value of register RT is set to O to 9.
It is regulated to be within the range of 10. The data 0 to 10 in the register RT each indicate a shutter time that differs by one step, and it is possible to set the shutter time in 10 steps. Further, when the content of Sister Rp is set to 2, that is, when the aperture priority mode is selected, the process proceeds from step 21'' to step 27''.

Step 7' From step 27'' to 31'', follow step 22 above.
These commands are similar to ``26'', and in these steps, data in the range of 0 to 10 is set in the aperture register RA by dial operation. Furthermore, register RA is 0.
The data from ~1o indicates aperture values in 10 steps, each one step different.

In this way, in steps 19'' to 31'', desired shutter speed data and aperture data are set by dial operation when shutter priority or aperture priority is selected. Further, if PIl=1 is not detected in step 5.6, that is, no dial operation is performed, or if the contents of register Pp are 0, that is, the program mode is set, step 7 is executed. Ru.

In this step, the contents of the register Rp are sent out via the output ports PGO-1 of the CPUI, and a mode is displayed on the display device 3 in accordance with the contents of the register Rp.

After this step 8, 9, 32 . 33'', according to the contents of register Rp, the shutter speed data set in register RT is output when shutter priority is selected, and the aperture data set in register RA is output when priority is aperture. This is transmitted to the display device 3, where the preset shutter speed or aperture value is displayed.

After setting various information in this manner, the program executes photometry switch sensing as shown in FIG. This sense detects the on/off of the switch 10 linked to the release button, and when the switch IO is off, the sixth
The process moves to step 1 in the figure, and the above-mentioned information setting operation is performed. When the switch 10 is on, the program shifts to the photometry/calculation program. The program is executed according to the microflow chart shown in FIG. 7(b).

The program will be explained.

This program first uses the CPU in steps 70 and 71.
The data of the input port PDO~3 is input to the photometry register R3 via the accumulator A. The above input capo) PoO~3 is connected to the output of the A/D converter 5, so that the digital value corresponding to the luminance information detected by the photometry circuit 4 in TTL open photometry is stored in the register R.
entered on the day. In steps 72 and 73, the data in the register Rp is detected, and if the preset mode is shutter priority mode, the process moves to step 70', and if the preset mode is the aperture priority mode, the process moves to step 75'.

In the case of the shutter priority mode, the contents of R-1- are subtracted from the added value of the contents of register Rs and R day in step 70', and this is input to register RA. Each register Rs.

R3 and R-1- have an apex value file 1 degree (i
Su, brightness value By, and shutter time value Tv are set to 1.
．． The apex value Av of the aperture calculated by the above calculation is set in the register RA.

This calculated Av value is compared with the lower limit value MIN and upper limit value MAX of the controllable aperture in steps 71' to 74'. The calculated Av value is held as is, and when M A X < A v, MAX is also MIN>A
When the voltage is V, MIN is input to register RA. As a result, the calculated Au value is set in the register RA within a controllable range.

When priority is given to aperture, the same processing as in steps 70' to 74' is performed in steps 75' to 79', and the calculated Tv value is set in the register RT within a controllable range.

Also, in the program mode, step 74 is executed.

In this step, the contents of registers Rs and R13 are added.
(By+5v=Ev) is performed to obtain the apex value v, and this Ev value is input to, for example, RT.

Steps 75, 76, 80', and 81' determine whether the Ev value is between a predetermined upper limit value MAX and lower limit value MIN, and when MIN<EV<MAX (7), the register RT, Keeping the contents of RA as they are, E v > MAX, MIN. In these steps, the registers RT and RA are set to Tv and Av values based on the brightness within a controllable range.

After performing the apex @ calculation in each mode in this way, the program moves to the release switch sense shown in Fig. 5, and in this program, the on/off detection of the switch 11 following the release button is performed, and the switch 11 is turned off. Occasionally, switch to photometry switch sense again, switch 11
When is on, the program moves to the shutter and aperture control program, and the above register RT is entered.

Shutter and aperture control are performed based on the contents of the RA, and then the information setting operation is performed again.

The photographing operation is executed through the above-described operations, and when the dial is operated, information setting is executed as the dial moves from one click position to the next click position as described above. Therefore, the dial is normally held at the click position, and in this position the brush DL6 is pressed as described above.
and electrode DL3. DL4 is in a non-contact state. Therefore, switch SW1. sw2 is normally in the oven state,
The configuration is such that power is prevented from being wasted through the pull-up resistors of the switch circuits 6 and 7.

Effect> As detailed above, in the present invention, the on/off signal formed by the switch means by operating the operating member is once counted by the counter, and the counted value of the counter is read by the computer. Since the counter functions as a buffer, accurate data can be processed by the computer even if the operating member is operated at high speed.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a camera using the information setting device of the present invention, FIG. 2 is a block diagram showing the mechanical configuration of the switch circuit shown in FIG. 1, and FIG. FIG. 4 is a circuit diagram showing an embodiment of the information input circuit; FIG. 4 is a circuit diagram showing an embodiment of the decoder shown in FIG. 3; FIGS. 5 and 6;
79(a) and 79(b) are flowcharts showing an example of the operation of the CPU shown in FIG. 1, and FIGS. 8 and 9 explain the operation of the circuit shown in FIGS. 3 and 4. FIG.

Claims (1)

[Scope of Claims] In the information setting device, a digital value is formed by an on/off signal of a switch means interlocked with an operating member, the digital value is read by a microcomputer, and information is set using the digital value as input data, comprising: Information characterized in that a counter is provided to perform a counting operation by detecting an on/off signal of the switch means, and a microcomputer is activated in response to the on/off signal of the switch means to cause the computer to read the contents of the counter. Setting device.