JPS6289120A - Control device - Google Patents

Abstract

PURPOSE:To decrease the variation of the control condition quantity of the control object due to the disturbance by making the error signal of a comparing means into an input signal of a normal feedback loop, adding and synthesizing the value removed from a part in the normal feedback loop and the error signal of the comparing means and generating the control signal. CONSTITUTION:A compensating means makes two integers or above for Nx, four integers or above for L and Wn (n=1, 2,..., Nx) for O<Wn<2/Nx, into the prescribed normal ratio which comes to be a formula 1 and when (z) is the advancing element of one sampling time of the compensating means, the means has the normal feedback loop including the transfer function element serially, in the loop, which is the formula 2. The error signal of the comparing means is made into the input signal of the normal feedback loop, the value removed from a part in the normal feedback loop and the error signal of the comparing means are added and synthesized, the control signal is generated and Wn=1/Nx (n=1, 2,..., Nx) is obtained.

Description

[Detailed description of the invention]

INDUSTRIAL APPLICATION FIELD The present invention relates to a control device for a controlled object in an environment where disturbances are present. Conventional technology A control device that detects the control state quantity of a controlled object and uses the detection signal to control the power supplied to the controlled object (drive signal) is used, for example, to control the pressure of a plant, control the temperature of a thermostat, or control the temperature of a motor. This is a form widely used for rotational speed control, etc. However, such conventional control devices only perform proportional, integral, and differential control, and cannot sufficiently suppress fluctuations in the control amount due to disturbance fluctuations. This will be explained below with reference to the drawings. The configuration of a conventional control device is shown in FIG. The control state quantity a of the controlled object l is detected by a detector 2, and the detector 2 outputs a detection signal S proportional to the control state la. Detector 2
The detection signal S is compared with a reference signal 5ref in a comparator 3, and an error signal e proportional to the difference is obtained. The error signal e is input to a proportional compensator 10, which produces a control signal C amplified by a predetermined factor. The control signal C is input to the amplifier driver 9, and a drive signal g proportional to the control signal C is applied to the controlled object I.
is given to control and maintain the control state i1a of the controlled object 1 at a predetermined value. Note that a disturbance d (input conversion) consisting of various frequency components is also added to the controlled object 1. Problems to be Solved by the Invention A control block diagram of this conventional control device is shown in FIG. In FIG. 8, a disturbance d is caused in the drive signal g of the amplifier driver 9.
The value (g+d) obtained by adding (input conversion value) becomes the net input amount given to the controlled object 1 (addition point 41). Letting the transfer function of the controlled object l be Q (s) (block 42)
, the value obtained by multiplying the input (g+d) by Q (s) becomes the control state quantity a. Note that S in block 42 is a Laplace operator. The control state quantity a is multiplied by A by the detector 2 (block 43), and the detected signal S is compared with the reference signal 5ref (addition point 44) to obtain an error signal e. The error signal e is amplified by a factor of R by the proportional compensator 10 and becomes the control signal C.
(block 45), and is further converted into a drive signal g multiplied by 8 by the amplifier driver 9 (block 46).
The transfer function from the disturbance d to the control signal a is G(s)=-1+ARB-Q(s). A Bode gain diagram of the frequency transfer function G(jω) is shown in FIG. Within the control range below the corner frequency fc, G=(jω)#1/(ARB)...
It can be approximated as (2). From equation (2), it can be seen that if the gain R of the proportional compensator 10 is increased, the fluctuations in the control state i1a of the controlled object I due to fluctuations in the disturbance d are reduced. However, in reality, since the detection operation of the detector 2 has a time delay (phase delay), if the gain R of the proportional compensator 100 is made too large, the control system becomes unstable. That is, There is a limit to the gain R of the proportional compensator 10. As a result, the controlled state quantity a of the controlled object 1 varies greatly due to the disturbance d. The present invention is designed to significantly reduce fluctuations in the controlled state quantity of the controlled object. a comparison means for obtaining an error signal by comparing the detection signal of the reference signal with the reference signal; and a comparison means for sampling the error signal of the comparison means at predetermined timing intervals, calculating and storing the error signal based on the sampled value, and generating a control signal. and an amplification drive means for supplying a drive signal corresponding to a control signal of the compensation means to the controlled object, and the compensation means is configured such that Nx is an integer of 2 or more, L is an integer of 4 or more, and W n (n = 'l, 2, -- N x
) is a positive ratio of -nL, and 2 is an advance element of one sampling time of the compensation means, then a positive feedback loop including a transfer function element of Nx -nL Σ Wn-z -nL in series in the loop is formed. The error signal of the comparing means is used as the input signal of the positive feedback loop, and the value extracted from a part of the positive feedback loop and the error signal of the comparing means are added and synthesized to obtain the control signal. 1) The above problems are solved by creating a signal. Operation In the present invention, by adopting the above configuration, the frequency transfer function from the disturbance input to the fluctuation of the control-like B amount becomes 0 or extremely small at a specific frequency, and the characteristics at other frequencies are almost the same as the conventional characteristics. It turns out that it becomes. In other words, the influence of fluctuations in a specific frequency of the disturbance was significantly reduced, and the effect of suppressing fluctuations in other frequencies compared to the conventional method could be obtained. the result,
The composite value of the fluctuations in the control state quantity was significantly reduced, and a high-performance control device was realized. Embodiment FIG. 2 shows a configuration diagram representing an embodiment of the present invention. In FIG. 2, a control state quantity a of a controlled object 1 mixed with a periodic disturbance d (input conversion) is detected by a detector 2, and a detection signal S corresponding to the control state quantity a is obtained. The comparator 3 subtracts and compares the detection signal (1) and the reference signal (5refC constant), and obtains an error signal (e) corresponding to the difference. The error signal e is
A/D converter 4, arithmetic unit 5, memory 6, and D/A converter 7
The signal is input to a compensator 8 (shown by the broken line in the figure) configured by the following. When the reset signal r becomes "H" (high potential state), the A/D converter 4 clears its internal state and resets the reset signal r.
After a predetermined time delay after the signal becomes "L" (low potential state), the A/D conversion operation is started, the A/D conversion conversion signal (digital signal) corresponding to the error signal e is obtained, and the conversion is performed. Set the end signal q to "H". When the conversion end signal q becomes "H", the arithmetic unit 5 outputs the A/D conversion signal, sets the reset signal r to "H" for a predetermined short time, and changes the internal state of the A/D converter 4. q=゛L”), and the next A/D conversion operation is started. That is, the A/D converter 4 and the arithmetic unit 5 convert the error signal e into the A/D conversion operation at predetermined time intervals (Tx).
Conversion sampling. In addition, the computing unit 5 calculates and stores the A/D conversion signal ratio according to the program described later to create a control signal value Y (digital value), outputs the control signal value Y to the D/A converter 7, and outputs the control signal value Y to the D/A converter 7, which converts the DC A control signal C is obtained. The control signal C is manually input to the amplifier driver 9, and a drive signal g corresponding to the control signal C is obtained and supplied to the controlled object l. - Therefore, the controlled object 1, the detector 2, the comparator 3 and the compensator 8
and the amplification driver 9 constitute a control loop that keeps the controlled state quantity a of the controlled object 1 constant. The memory 6 of the compensator 8 is divided into a ROM area (ROM: read-only memory) in which predetermined programs and constants are stored, and a RAM area (RAM: random access memory) in which necessary values are stored from time to time. The device 5 performs predetermined operations and calculations according to the program in the ROM area.
A specific example of the program is shown in the figure.Next, its operation will be explained in detail. (1) First, the arithmetic unit 5 inputs the conversion end signal q from the A/D converter 4 and waits for the signal q to become "H". That is, the A/D converter 4 monitors the output of a new A/D conversion signal corresponding to the error signal e. (2) When q becomes "H", the A/D conversion signal of the A/D converter 4 is taken into account, the error value E (digital value) corresponding to the A/D conversion signal is converted, and the reset is performed. signal r
is set to 'H' for a predetermined short time to clear the internal state of the A/D converter 4 and move on to the next A/D conversion operation (error detection means). [3] Nx-L (here, Nx is an integer greater than or equal to 2,
L is an integer greater than or equal to 4) as a modulus, and each time a new error value E is obtained, the variable I is counted up (counting means), that is, 1 = 1 + 1 (1 + 1 becomes a new ■). Later, if I=NxL, set I=o. If you do this kind of calculation, I will go from 0 to NxL
It will be an integer between -1. Note that the initial value of I is NxL-1
shall be. (4) Obtain a value Y0 that is obtained by adding and combining the composite value V obtained by the composite value calculation means described later and the current error value E (Y0=E+V
), calculate the control signal value Y which is the value Y0 multiplied by R (
control signal generation means). That is, Y=R-Yo. (5) Output the control signal value Y to the D/A converter 7, and
Converts to a DC voltage (control signal) corresponding to the value of . (6) Calculate the updated value by adding and combining the composite value ■ by the composite value calculation means described later and the current error value E, and calculate the digital value M in the RAM area corresponding to the count value I of the counting means.
(1) is updated M(ri=E+V) and stored until the next update (update storage means). +7) Calculate the integer 4J by adding 1 to I with NxL as mod. J = I + 1 (mod NxL)), a group of Nx digital values M spaced apart by L intervals in the ram area.
(J-nL (mod NxL)) (-nL.2.・
. . . Nx), the composite value V is calculated by the following equation (composite value calculation means), and then the operation returns to (1). (3) Here, the value of the ratio Wn is Q<Wn<2. /Nx (n, 1.2.-, Nx)・
...(4) n・1 shall be satisfied. Specifically, W-nL/Nx (-nL.2.-..., Nx)...
...(6), it is easy to obtain preferable characteristics. Note that this composite value ■ is obtained after the new error value E is obtained by the next A/D conversion sampling and the counting means increments the count value I. (After I and J become substantially equal), it is used in the control signal generation means and update storage means. If configured in this way, it will be extremely resistant to the disturbance d shown in FIG. This will be explained. A control block diagram of this embodiment is shown in FIG. In addition, the 8th
Elements that are the same as those shown in the figure are given the same numbers and symbols.
The explanation will be omitted. The operation of the compensator 8 is shown in the dashed line 50.
corresponds to A value Y that is obtained by adding and combining the composite value ■ and the error value E. is multiplied by R to obtain the control signal value Y (addition point 53 and block 45). Also, the composite value V and the error value E are added and combined to obtain an updated value, which is updated and saved as a new digital value M (+) (addition point 51). Since the next new composite value V is calculated according to the formula, the relationship between the digital value M (1) and the composite value V is represented as block 52. Here, block 5
2 in 2 is z-exp (sTx) - (71, and Tx corresponds to one sampling period of the A/D converter 4. From the disturbance d of the control block in Fig. 3 to the control state quantity a Calculating the transfer function of 1 + (ARB - Q (s) ) /H(s)...
...(8) -nL. Within the control range below the corner frequency fc, Gx (jω)# f1/ (ARB)l ・
H(j ω)=G N ω) ・H(j ω)・
...It can be approximated as αω. Equation 01 shows that the control characteristic Gx (jω) of this embodiment is H to the conventional control characteristic G (jω).
This means that it is equal to the product multiplied by (jω). FIG. 4 shows an example of the amplitude characteristics of the frequency transfer function H(jω). ■ in Figure 4 indicates Nx=2. W1=1/2. W2-1/
2, and ■ is the case when Nx=3. W=1/3. W2
=1/3. This is the case where W3=1/3. Also, fr
is f r=1/ (L-Tx) −-Qυ
, and H(jω) is a periodic function of fr. As shown in ■ and ■ in FIG. 4 (generally, if Nx≧2), the frequencies fr and 2fr. At 3fr,..., the frequency transfer function is IH (
It was found that IH(jω)1=0 and that IH(jω)1 is approximately equal to 1 also at other frequencies. That is, the frequency transfer function Gx(jω) of this embodiment has frequencies fr and 2fr. 3fr, . . . becomes 1Gx(jω)l-0, and at other frequencies, it becomes approximately equal to the conventional frequency transmission number G(jω). As a result, a very good control characteristic Gx (jω) can be obtained, and the composite value of fluctuations in the controlled state quantity a of the controlled object 1 due to the disturbance d can be reliably made smaller than the conventional control performance value. It became. As shown in this embodiment, the compensator 8 has a positive feedback loop including -nL transfer function elements in series, and uses the error value E as an input signal of the positive feedback loop, and also outputs the error value E from a part of the loop. If the control signal is created by adding and combining the extracted value V and the error value E, the above-mentioned good control characteristics can be obtained. Such an effect cannot be obtained by increasing the gain of the proportional compensator 10 of the conventional control device shown in FIG. 7 or by adding an integral or differential compensator after the proportional compensator 10. FIG. 5 shows an example of a program for the compensator 8 that takes into consideration the stability of the entire control system. Here, the method of calculating the update value in the update storage means, the number of prepared composite values in the composite value calculating means, and the method of using the composite value of the composite value calculating means in the control signal generating means are improved. Next, its operation will be explained in detail (the overall configuration is the same as that in FIG. 2, so the explanation will be omitted). on First, the arithmetic unit 5 inputs the conversion end signal q of the A/D converter 4 and waits for the signal q to become H''.In other words, the A/D converter 4 corresponds to the error signal e. It monitors the new A/D conversion signal. (b) When q becomes "H", the A/D converter 4's A/D
The conversion signal is read and converted into an error value E (digital value) corresponding to the A/D conversion conversion signal, and the reset signal r is set to "H" for a predetermined short time to change the internal state of the A/D converter 4. Clear and move to the next A/D conversion operation (error detection means). (To) Set Nx - L (here, Nx is an integer of 2 or more, and L is an integer of 4 or more) as nod, and count up the variable 1 every time you obtain a new error value E. (
Note that the initial value of (2) is NxL-1. αa A value Y0 is obtained by adding and combining the latest composite value V (Px) calculated by the composite value calculation means described later and the current error value E (Yo=E+V (Px)), and the control value Y0 is multiplied by 8. Calculate signal value Y (control signal generation means). That is, Y=R-Yo. (2) Output the control signal value Y to the D/A converter 7 and convert it into a DC voltage (control signal) corresponding to the value of Y. Ql Old composite value v calculated by composite value calculation means described later

[0] and the current error value E are added together to find the added value MO (MO=E+V(0), NxL is no
Calculate the integer K by subtracting Qf (Qf is an integer greater than or equal to 2, preferably Qf-3) from the count variable I as d (K-1-Qf (mod NxL)), and calculate the integer K of the register variable X (m+1). Transfer the contents to X (m) in order, m=Q, 1. 2. --, 2Qf-1),
Put MO into X (2Qf). That is, X (2Q
f) to X (0) consecutive 2Qf+1 additional values (
The sum of the composite value and error value) is obtained. Next, a new updated value is obtained by adding and combining the value of X (m) multiplied by a predetermined positive ratio Cm (mxQ. 1,...2Qf), and the digital value M ( K
) until the next update (update storage method)
, where the ratio Cm has the following relationship. Cm-C2Qf -m (m=0.1.=,Qf)...
...(2) -O Qf) 1+Px to count variable I with NxL as nod
(Px is an integer greater than or equal to 1 and less than or equal to 5, preferably Px = 3) (J = 1 + 1 + Px
(mod NxL)), after sequentially transferring the contents of register variable v(m+1) to V(m) (m=0.1.
--..., Px-1), digital value group M in the RAM area
(J-nL (mod NxL)) (-nL.2.=-
--., Nx) to enter the latest composite value calculated by the following formula into V(Px) (composite value calculation means), and then return to the operation of αυ. -nL (m o d N

Obtain the composite value of PX+1 consecutive to [0]. At this time, V(P
When calculating x), the integer J in formula 141 is Jl, and V
If the integer J in the formula 00 when calculating (0) is J2, then there is a relationship of Jl-J2+Px. In other words, V(Px) and ■

There is a gap between [0] corresponding to the integer Px. As already explained, the next A/D
After obtaining a new error value E by the conversion sampling operation and incrementing the count value I of the counting means,
V(Px) is used in the control signal generation means, and ■[
0] is used in the update storage means. As in this embodiment, an operation for taking a weighted average may be inserted into the update storage means, and the first composite value of the composite value calculation means used in the control signal generation means and the composite value calculation means used in the update storage means may be inserted. It was confirmed that if a predetermined deviation is provided between the second composite value, good control characteristics as described above can be obtained within the control range, and the operation of the entire control system becomes stable (Nyquist stability condition ). In particular, in order to simplify calculations while ensuring stability of the control system, Qf=3. I also learned that it is better to set Px=3゜L>Qf+Px. In this embodiment as well, as represented by α, the compensator 8 has a positive feedback loop 1 including −nL transfer function elements in series, and the error value E is used as the input signal of the positive feedback loop. , and by adding and synthesizing the value V(Px) extracted from a part of the loop and the error value E to create a control signal, the above-mentioned good control characteristics are obtained. FIG. 6 shows another example of a program for the compensator 8 that takes into consideration the stability of the entire control system. Here, the method of calculating the composite value in the composite value calculating means and the number of preparations, and the method of using the composite value of the composite value calculating means in the control signal generating means are improved. Next, its operation will be explained in detail (the overall configuration is the same as that in FIG. 2, so the explanation will be omitted). (21) First, the arithmetic unit 5 inputs the conversion end signal q of the A/D converter 4 and waits for the signal q to become "H". That is, the A/D converter 4 inputs the error signal e (22) When q becomes "H", A/D converter 4's A
The internal state of the A/D converter 4 is changed by setting the reset signal r to ``H'' for a predetermined short time. Clear and move on to the next A/D conversion operation (
error detection means). (23) Using Nx-L (here, Nx is an integer of 2 or more, and ■ is an integer of 4 or more) as a modulus, count up the variable 1 every time a new error value E is obtained.
(Counting means). Note that the initial value of ■ is NxL-1. (24) A value Y obtained by adding and combining the latest composite value V (Px) calculated by a composite value calculation means to be described later and the current error value E. (Yo=E+V(Px)), and calculates the control signal value Y by multiplying the value Y0 by R (control signal generation means). That is, Y=R-Yo. (25) Output the control signal value Y to the D/A converter 7,
Convert to a DC voltage (control signal) corresponding to the value of Y. (26) Old composite value V calculated by composite value calculation means described later

[0] and the current error value E are added together to calculate an update value, and the digital value M (1) in the RAM area corresponding to the count value I of the counting means is updated.
(I)=E+v (0)), is stored and saved until the next update (update storage means). (27) Calculate the integer J by adding 1+Px+Qf (Px is an integer greater than or equal to 1 and less than or equal to 5, and Qf is an integer greater than or equal to 2) to the count variable ■ with NXL as m o d (J=I+1 +Px+Qx ( modNxL))
. Transfer the contents of register variable X(m+1) to X(m) in order.m=0. 1, 2. −. 2Qf-1), Nx digital value group M (J-nL (mod NxL)) (-nL゜2
, . . . , Nx) calculated by the following formula is entered into X (2Qf). −nL (mod N x L) ) ·−=O5 Here, the value of Wn satisfies the expressions +4), +5) and (6). That is, from X (2Qf) to X[0
], 2Qf+1 consecutive addition values (addition values obtained from Nx digital values separated by L intervals) are obtained. Next, after sequentially transferring the contents of register variable V(m+1) to V(m) (m=o, 1°--, Px-1),
X (m) (m=0.1.-・=. 2Qf) with a predetermined positive ratio Cm (m=0.1.-・・・
- Obtain the latest composite value by adding and combining the values multiplied by 2Qf) and enter it into V (Px) (composite value calculation means). That is, from V (Px)

Px+ consecutive to [0]
One composite value is obtained. Here, the ratio Cm is expressed by α
There is a relationship of 1 equation. After that, the operation returns to (21). At this time, the integer J in the α formula when calculating V (Px) is set to Jl, and the actual value of V (Px) is

If the integer J in the α9 formula when calculating [0] is J2, then Jl-J2+Px
There is a relationship between That is, there is a difference between V(Px) and V (0) corresponding to the integer Px. As already explained, after obtaining a new error value E by the next A/D conversion sampling operation and incrementing the count value ■ of the counting means, V(Px) is used in the control signal generating means, and

[0] is used in the update storage means. As in this embodiment, an operation for taking a weighted average and an operation for preparing a plurality of composite values are inserted into the composite value calculation means, and updated with the first composite value of the composite value calculation means used in the control signal generation means. By providing a predetermined deviation between the second composite values of the composite value calculation means used in the storage means, good control characteristics as described above can be obtained and the operation of the entire control system can be stabilized. (Satisfies Nyquist stability condition). In this case as well, in order to simplify the calculation while ensuring the stability of the control system, Qf=3. Px=3゜L>Qf+P
It is better to set it to x. Note that, as expressed by the α equation in this embodiment as well, the compensator 8 has a positive feedback loop including -nL transfer function elements in series, and uses the error value E as an input signal of the positive feedback loop. In addition, by adding and combining the value V (Px) extracted from a part of the loop and the error value E to create a control signal, good control characteristics as described above are obtained. Note that the calculation using the ratio Cm is not limited to the above form, but may be any form that realizes the contents of the above program, and it goes without saying that various equivalent expression transformations are possible. When an error value is obtained, the control signal generation means first outputs a new control signal, and then the composite value calculation means calculates the composite value to be used at the next sampling point. Since the computation time of the composite value calculation means can be lengthened and the time delay until the control signal is output can be shortened, the stability of the control system can be easily ensured. In each of the embodiments described above, the compensator was configured using arithmetic units that operated according to a software program, but the present invention is not limited to such a case, and the compensator is configured completely by hardware, The same operations as those performed by the program described above may be performed. In addition, various modifications can be made without changing the gist of the present invention. Effects of the Invention The control device of the present invention has extremely good control characteristics at a specific frequency, and is almost the same as the conventional control characteristics at other frequencies, and overall the controlled Li amount due to disturbance is reduced. fluctuations have been significantly reduced. Therefore, if a pressure control device for a plant, a temperature control device for a constant temperature bath, or a speed control device for a motor is constructed based on the present invention, a high-performance control device with excellent control characteristics can be obtained.

[Brief explanation of drawings]

Fig. 1 is a flow diagram showing an example of the built-in program of the compensator shown in Fig. 2, Fig. 2 is a block diagram showing the overall structure of the embodiment of the present invention, and Fig. 3 is a control block of the embodiment of the present invention. FIG. 4 is a characteristic diagram representing an example of the characteristics of the frequency transfer function IH(jω)1, FIG. 5 is a flow diagram representing another example of the built-in program of the compensator of the present invention, and FIG. A flow diagram showing another example of the built-in program of the compensator of the present invention, FIG. 7 is a block diagram showing the configuration of the conventional example, FIG. 8 is a block diagram showing the control block of the conventional example, and FIG. 9 is the conventional example. Control characteristics I
It is a characteristic diagram showing G(jω)1. 1...Controlled object, 2...Detector, 3.
... Comparator, 4 ... A/D converter, 5.
...Arithmetic unit, 6...Memory, 7...
...D/A converter, 8...Compensator, 9...
...Amplification driver. Name of agent: Patent attorney Toshio Nakao (1 person) Figure 4 Figure F

Claims (2)

[Claims] (1) A detection means for detecting a controlled state quantity of a controlled object, a comparison means for comparing a detection signal of the detection means with a reference signal to obtain an error signal, and a comparison means for obtaining an error signal from the comparison means at predetermined timing intervals. Compensating means for sampling, calculating and storing based on the sampled value to generate a control signal, and amplifying driving means for supplying the controlled object with a driving signal according to the control signal of the compensating means, The compensation means sets Nx as an integer of 2 or more, L as an integer of 4 or more, and Wn(n
= 1, 2, ......, Nx) as 0<Wn<2/Nx
A predetermined positive ratio such that Σ^N^x_n_=1Wn=1,
When z is an advance element of one sampling time of the compensation means, a positive feedback loop including a transfer function element of Σ^N^x_n_=1Wn·z^−^n^L in series in the loop, The error signal of the comparison means is used as an input signal of the positive feedback loop, and the control signal is generated by adding and synthesizing the value taken out from a part of the positive feedback loop and the error signal of the comparison means. A control device characterized by: (2) Wn=1/Nx (n=1, 2,..., N
The control device according to claim (1), characterized in that x).