JPS6286745U - - Google Patents
Info
- Publication number
- JPS6286745U JPS6286745U JP17974985U JP17974985U JPS6286745U JP S6286745 U JPS6286745 U JP S6286745U JP 17974985 U JP17974985 U JP 17974985U JP 17974985 U JP17974985 U JP 17974985U JP S6286745 U JPS6286745 U JP S6286745U
- Authority
- JP
- Japan
- Prior art keywords
- transmitting
- receiving switching
- audio signal
- delaying
- switching circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005236 sound signal Effects 0.000 claims 3
- 230000003111 delayed effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
- 230000005540 biological transmission Effects 0.000 description 1
Landscapes
- Transceivers (AREA)
Description
第１図は本考案の送受信切換回路の一実施例を
示すブロツク図。第２図はリレー駆動回路の動作
を示す説明図。第３図はリレー駆動回路への入力
信号を示す説明図。第４図及び第５図は他実施例
を示すブロツク図。第６図は従来例を示すブロツ
ク図。
３……送受信切換手段、５……遅延手段。
FIG. 1 is a block diagram showing an embodiment of the transmitting/receiving switching circuit of the present invention. FIG. 2 is an explanatory diagram showing the operation of the relay drive circuit. FIG. 3 is an explanatory diagram showing input signals to the relay drive circuit. FIGS. 4 and 5 are block diagrams showing other embodiments. FIG. 6 is a block diagram showing a conventional example. 3... Transmission/reception switching means, 5... Delaying means.
Claims (1)
状態に切換える送受信切換手段３を有する送受信
切換回路に於いて、前記入力音声信号を遅延して
出力させるための遅延手段５を備えてなることを
特徴とする送受信切換回路。 ２ 前記遅延手段５からの遅延音声信号を前記送
受信切換手段３に入力させるようにした実用新案
登録請求の範囲第１項記載の送受信切換回路。[Claims for Utility Model Registration] 1. In a transmitting/receiving switching circuit having a transmitting/receiving switching means 3 for switching a transceiver or the like to a transmitting state upon input of an audio signal, a delaying means 5 for delaying and outputting the input audio signal is provided. A transmitting/receiving switching circuit characterized by comprising: 2. The transmitting/receiving switching circuit according to claim 1, wherein the delayed audio signal from the delaying means 5 is inputted to the transmitting/receiving switching means 3.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17974985U JPS6286745U (en) | 1985-11-20 | 1985-11-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17974985U JPS6286745U (en) | 1985-11-20 | 1985-11-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6286745U true JPS6286745U (en) | 1987-06-03 |
Family
ID=31123084
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17974985U Pending JPS6286745U (en) | 1985-11-20 | 1985-11-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6286745U (en) |
-
1985
- 1985-11-20 JP JP17974985U patent/JPS6286745U/ja active Pending
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