JPS628589Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION This invention relates to a display circuit in a preset tuner which allows the reception frequency of a desired station to be preset, and which displays channels for which writing is permitted when writing the reception frequency.

The preset tuner can preset the reception frequencies of a plurality of desired reception stations.
However, in conventional preset tuners, there is no means to display free channels in the memory, so when writing, it is difficult to determine which channels have already been written and which channels are empty. . Since preset contents can be backed up and retained for a long period of time, the user's memory of the previous preset will tend to fade, especially if a long period of time has passed between the preset of one channel and the next. , it could not possibly be reliable. This has caused the inconvenience of erasing the stored contents of channels that have already been written.

This idea was made in view of the above points,
It is an object of the present invention to provide a channel display circuit for a preset tuner that displays channels on which writing is permitted when performing a preset operation. This invention focuses on the fact that a preset operation consists of the operation of turning on a write control switch and then the operation of turning on a channel designation switch.The device memorizes the channels that have already been preset, and then writes them in the next preset operation. By displaying the stored channel or other channels based on the stored information from the time when the control switch is turned on until it is released, the channel on which writing is permitted can be easily determined.

This invention will be explained in detail below based on the embodiments shown in the accompanying drawings.

FIG. 1 schematically shows a synthesizer type preset tuner to which this invention is applied. In FIG. 1, a received signal received via an antenna 1 is amplified by a high frequency amplifier 2. As shown in FIG.
The local oscillation signal generation circuit 3 generates a local oscillation frequency l corresponding to the reception frequency r, and simultaneously outputs a numerical value N (multiplication setting value of a synthesizer type tuner) corresponding to the local oscillation frequency l. The frequency mixer 4 has a reception frequency r and a local oscillation frequency l.
Take out the beat frequency Δ. This beat frequency Δ is amplified by an intermediate frequency amplifier 5 and guided to a low frequency amplifier (not shown) via a detector (not shown).

The preset memory 6 is a memory for presetting a desired station to receive, and stores the receiving frequency r of that station at the multiplication factor setting value N. This preset memory 6 has storage locations corresponding to the number of channels that can be preset. The write control switch 7 is turned on when storing the magnification setting value N from the local oscillator signal generating circuit 3 in the preset memory 6, and switches the preset memory 6 to a write mode. Channel designation switch 8 designates the write channel or read channel of preset memory 6. In other words, when performing a write operation, put the desired preset station into the receiving state and then turn the write control switch 7.
Turn on, then turn channel designation switch 8
By turning on one of the switches, the magnification setting value N from the local oscillator signal generating circuit 3 is stored in the corresponding channel of the preset memory 6. When performing a read operation, leave the write control switch 7 in the OFF state and turn on the channel designation switch 8 corresponding to the desired station to receive the desired station from the corresponding channel in the preset memory 6. The magnification setting value N is read out, and the local oscillation frequency l corresponding to the magnification setting value N is generated from the local oscillation signal generation circuit 3.

The channel display circuit 10 is a part related to this invention, and displays the channels on which writing is permitted from when the write control switch 7 is turned on until when the channel designation switch 8 is turned on. There are two display methods: one that displays channels that have already been preset, and one that displays channels that have not yet been preset. An embodiment of the channel display circuit 10 configured in the former manner is shown in FIG. 2, and an embodiment in the latter configuration is shown in FIG. 3. In the embodiments shown in FIGS. 2 and 3, attention is paid to the fact that preset operations are normally performed in the order of channels, and in FIG. Only the channel following the channel that was preset last time is displayed. That is, in the embodiment of FIG. 2, the channel next to the displayed channel is the channel to be preset next time, and in the embodiment of FIG. 3, the displayed channel is the channel to be preset next time.

First, the embodiment shown in FIG. 2 will be explained.

In FIG. 2, the channel designation switch 8
has switches 8-1 to 8-5 for specifying each channel (here, five channels CH1 to CH5) at the time of writing and reading. The channel designation signals S1 to S5 from the channel designation switches _8-1 to 8-5 are led to the preset memory ₆ and used as address commands for the channels CH1 to CH5, respectively. On the other hand, it is guided to the channel display circuit 10 and used for channel display.

The channel display circuit 10 consists of a channel storage circuit 11 and a channel display 12. Here, the channel storage circuit 11 is a circuit that stores the previously preset channel. That is, channel designation signals S ₁ to S ₅ sent from channel designation switches 8-1 to 8-5 are applied to one input terminal of each of AND gates G1 to G5 of channel storage circuit 11, respectively. Further, the channel designation signals S ₁ to _{S 5} are combined by an OR gate G10 and applied to the reset terminal of the flip-flop circuit 13. The flip-flop circuit 13 controls the conduction of the AND gates G1 to G5, and the write signal from the write switch 7 is applied to its set input, and the Q output is applied to the AND gates G1 to G5.
5 to each other input terminal. Therefore, the flip-flop circuit 13 is set when the write switch 7 is turned on, making the AND gates G1 to G5 operable, and is reset when any of the channel designation switches 8-1 to 8-5 is turned on. Been and Gate G1~
Make G5 inoperable.

The outputs of AND gates G1-G5 are applied to flip-flop circuits 14-1 to 14-5. Flip-flop circuits 14-1 to 14-5 store the last channel designation switch (any one of 8-1 to 8-5) turned on. That is, the flip-flop circuits 14-1 to 14-
5 corresponds to channels CH1 to CH5, respectively, and the signals from the AND gates G1, G2, ..., G5 of each corresponding channel are applied to the set input, and the signal from the channel one ahead is applied to the reset input. AND gates G2, G3, and G corresponding to
Signals from 4, G5, and G1 are added, respectively. Therefore, for example, if the channel designation switch 8-2 of the second channel CH2 is turned on with the flip-flop circuit 14-1 of the first channel CH1 set, the first channel CH1
The flip-flop circuit 14-1 of the first channel CH2 is reset, and the flip-flop circuit 14-2 of the second channel CH2 is set, so that only the flip-flop circuit of the channel specified most recently (that is, last time) is always in the set state. Become.

The channel display 12 indicates each channel CH1~
Light emitting elements 12-1 to 12-5 compatible with CH5
It is equipped with These light emitting elements 12-1 to 12-
5 is the flip-flop circuit 14-1 to 14;
-5 Q outputs are added via AND gates G11 to G15 to turn on the light. Here, the AND gates G11 to G15 are the light emitting elements 12-1 to 12-.
This controls the lighting of 5. That is, the Q output of the flip-flop circuit 13 is applied to the AND gates G11 to G15, and when the flip-flop circuit 13 is set (that is, when the write switch 7 is turned on), the light emitting elements 12-1 to 12-5 are connected to the AND gates G11 to G15. to a state where it can be lit.
Incidentally, the lighting of the light emitting elements 12-1 to 12-5 indicates that the next channel is the channel to be written.

A write operation in the case of the configuration shown in FIG. 2 is performed as follows.

For example, assume that the flip-flop circuit 14-2 is in a set state. At this time, when write switch 7 is turned on, flip-flop circuit 1
3 is set and the flip-flop circuit 14-2
The Q output of is applied to the light emitting element 12-2 via the AND gate G12, and lights up the light emitting element 12-2. The lighting of the light emitting element 12-2 indicates that writing has already been completed up to the second channel CH2. Therefore, it can be seen that the third channel CH3 is the channel to be written next. After setting the station you want to preset to reception status, turn the channel designation switch 8-3 of the third channel CH3.
When the station is inputted, the magnification setting value N corresponding to that station is written into the third channel CH3 of the preset memory 6. At this time, in the channel display circuit 10, the flip-flop circuit 14-2 is reset and the flip-flop circuit 14-3 is set. Further, the flip-flop circuit 13 is reset at the same time, rendering the AND circuits G11 to G15 inoperable, thereby rendering the light emitting element 12-1
12-5 are all turned off. Therefore, after writing is completed, the channel
The information that the writing up to CH3 has been completed is held in the flip-flop circuit 14-3. Therefore, the next time the write switch 7 is turned on, the light emitting element 12- of the third channel 12-3
3 is lit to indicate that the fourth channel is the one to write to.

Next, the embodiment shown in FIG. 3 will be explained. Third
In the figure, parts common to those in FIG. 2 are given the same reference numerals.

The embodiment of FIG. 3 is a combination of the AND gates G1 to G5 and the flip-flop circuit 14 in the embodiment of FIG.
-1 to 14-5 are changed to directly display the channel to be written this time. That is, the outputs of AND gates G1 to G5 are connected to the reset inputs of flip-flop circuits 14-1 to 14-5 corresponding to channels CH1 to CH5 and the next channels CH2, CH3, CH.
Connect to the set inputs of 4, CH5, and CH1, respectively.
With this configuration, when any channel is turned on in the channel designation switch 8, the flip-flop circuit (any one of 14-1 to 14-5) corresponding to the next channel is set.

For example, assume that the flip-flop circuit 14-3 is in a set state. At this time, when the write control switch 7 is turned on, the Q output of the flip-flop circuit 14-3 is applied to the light emitting element 12-3 via the AND gate G13,
Turn on 3. The lighting of this light emitting element 12-3 indicates that the corresponding third channel is the channel to be written next. Therefore, when the channel designation switch 8-3 of the third channel is turned on after the station to be preset is in the receiving state, the magnification setting value N corresponding to that station is written in the third channel CH3 of the preset memory 6. be included. At this time, in the channel display circuit 10, the flip-flop circuit 14-3 is reset and the flip-flop circuit 14-4 is set. At the same time, the flip-flop circuit 13 is reset, rendering the AND circuits G11 to G15 inoperable, and thereby all the light emitting elements 12-1 to 12-5 are turned off. Therefore, after the write is completed, the information that the next write channel is the fourth channel CH4 is held in the flip-flop circuit 14-4. Therefore, the next time the write switch 7 is turned on, the light emitting element 12 of the fourth channel 12-4
-4 is lit to indicate that the fourth channel is the one to be written to.

In the above embodiment, considering that preset operations are normally performed in the order of channels, only the channels that were previously preset or the channels that should be preset next time are displayed. If the reset inputs of the flip-flop circuits 14-1 to 14-5 are cut off at this point, all channels that have already been preset can be displayed. In addition, in this state, if one input end of AND gates G11 to G15 is connected to the output of flip-flop circuits 14-1 to 14-5 instead of the Q output, all channels that have not been preset can be displayed. can.

As explained above, according to this invention, the activation of the channel designation switch is memorized, and the memorized channel or the Since channels other than the preset are displayed, it is possible to easily determine which channel should be preset without performing any new operations. Furthermore, since the display goes out when the channel designation switch is turned on, the display (light-emitting element) can also be used to display the read channel when a preset station is being read out from the memory. Furthermore, it is possible to know that the writing mode has been selected by seeing the display change when the write control switch is turned on, so that there is no need for a separate display to indicate that the write mode is in effect, and the number of displays can be reduced.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an outline of a synthesizer type tuner to which this invention is applied, Fig. 2 is a circuit diagram showing an embodiment of this invention in which the previously preset channel is displayed, and Fig. 3 is a block diagram showing an outline of a synthesizer type tuner to which this invention is applied. FIG. 6 is a circuit diagram showing another embodiment of this invention in which a channel to be preset next time is displayed. 6...Preset memory, 7...Write control switch, 8...Channel designation switch, 10...
... Channel display circuit, 11 ... Channel storage circuit, 12 ... Channel display device, 12-1 to 12-5 ... Light emitting element.

Claims (1)

[Scope of utility model registration request] In a preset tuner capable of presetting the receiving frequency of a desired station to a corresponding channel by turning on one channel specifying switch while a write control switch is turned on, means for storing a preset channel; After that, when the write control switch is newly turned on, the stored channel or another channel is displayed based on the storage information from the storage means, and when the state in which the write control switch is turned on is released. and means for terminating this display.