JPS6281153U - - Google Patents
Info
- Publication number
- JPS6281153U JPS6281153U JP16924785U JP16924785U JPS6281153U JP S6281153 U JPS6281153 U JP S6281153U JP 16924785 U JP16924785 U JP 16924785U JP 16924785 U JP16924785 U JP 16924785U JP S6281153 U JPS6281153 U JP S6281153U
- Authority
- JP
- Japan
- Prior art keywords
- external memory
- small electronic
- electronic calculator
- detecting
- means detects
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000000903 blocking effect Effects 0.000 claims 1
- 238000001514 detection method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
- Calculators And Similar Devices (AREA)
Description
第１図はこの考案の一実施例の小型電子式計算
機のメモリパツク収納体１の平面図、第２図は第
１図の―断面図、第３図は回路図、第４図は
タイムチヤートである。
１……メモリパツク収納体、２……メモリパツ
ク押え、４……パツク収納部、５……メモリパツ
ク、７……凹部、８……スイツチ、１４……ＮＯ
Ｒゲート、１５……フリツプフロツプ、１６……
ＮＡＮＤゲート、３Ａ，３Ｂ，３Ｃ……接点。
Fig. 1 is a plan view of a memory pack storage unit 1 of a small electronic calculator according to an embodiment of this invention, Fig. 2 is a sectional view of Fig. 1, Fig. 3 is a circuit diagram, and Fig. 4 is a time chart. be. 1...Memory pack storage body, 2...Memory pack presser, 4...Pack storage section, 5...Memory pack, 7...Recess, 8...Switch, 14...NO
R gate, 15...Flip-flop, 16...
NAND gate, 3A, 3B, 3C... contacts.
Claims (1)
おいて、 上記小型電子式計算機のパワーオン中において
上記外部メモリが完全に装着されたことを検出す
る検出手段と、 この検出手段により外部メモリが装着されたこ
とを検出されるまでの間外部メモリに対する信号
の入出力を阻止する手段と、 上記検出手段が外部メモリの装置を検出した場
合、外部メモリをイニシヤライズする制御手段と
を有することを特徴とする小型電子式計算機。[Scope of Claim for Utility Model Registration] In a small electronic calculator in which an external memory is removable, a detection means for detecting that the external memory is completely installed while the small electronic calculator is powered on; means for blocking input/output of signals to/from the external memory until the means detects that the external memory is installed; and control means for initializing the external memory when the detecting means detects an external memory device. A small electronic calculator characterized by having.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16924785U JPS6281153U (en) | 1985-11-05 | 1985-11-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16924785U JPS6281153U (en) | 1985-11-05 | 1985-11-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6281153U true JPS6281153U (en) | 1987-05-23 |
Family
ID=31102876
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16924785U Pending JPS6281153U (en) | 1985-11-05 | 1985-11-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6281153U (en) |
-
1985
- 1985-11-05 JP JP16924785U patent/JPS6281153U/ja active Pending
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