JPS6281036A - Pattern recognizing method - Google Patents

Abstract

PURPOSE:To measure the microscopic objective pattern arranged in close vicinity of other patterns in a highly precise manner and to accurately recognize the pattern by a method wherein the edge signal only of the objective pattern is extracted by comparing the edge-to-edge measurement of the pattern with the edge-to-edge measurement of the reference pattern set in advance. CONSTITUTION:The main body 1 of a device is positioned at the position as shown by the chained line A-A in the diagram opposing to CCD6x in X-direction and the output of its reflected light is outputted to a processing circuit 9. As a result, the edge signal Se of each pattern can be obtained on the processing circuit 9, and said signal is outputted to a comparison circuit 12. On the comparison circuit 12, the edge signal Se is compared with the positional signal Sp sent from an X-Y driving part 4, an arithmetic operation is conducted by an arithmetic unit 13, the measurements of peak positions l1-l9 of the edge signal Se are measured, and the peak-to-peak measurement is worked out. Said peak-to-peak measurement is compared with the reference pattern measurement inputted from the reference data part 11 using the comparison circuit 12. The edge signal of the first process pattern and the second process pattern are extracted from a number of edge signals Se above-mentioned by comparing the reference pattern measurement with said peak-to-peak measurement and by matching the two measurements.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a method for recognizing fine patterns, and particularly to a pattern recognition method that can recognize pattern elements such as pattern dimensions and positions with high accuracy.

[Background technology]

In the field of semiconductor integrated circuit manufacturing technology, photolithography technology is used to form fine patterns on objects such as semiconductor wafers, but in order to suitably control each process that forms these fine patterns, each It is necessary to accurately measure pattern elements such as the size and position of a pattern formed in a process to recognize the pattern.

For this reason, in the conventional manufacturing process, patterns for dimension measurement and patterns for position measurement are transferred onto the target object at the same time as the circuit element pattern is formed, and the dimensions and position measurement patterns are A method has been proposed in which the suitability of each process is determined by measuring the position. However, since this type of measurement pattern is no longer needed after the semiconductor integrated circuit is completed, the pattern size should be as small as possible (preferably small), and the transfer position of this measurement pattern should also be within the circuit pattern. It is necessary to place it in a blank area that does not exist. However,
In recent years, as semiconductor integrated circuits have become more highly integrated, circuit patterns have become increasingly finer, and the margins between circuit patterns have become extremely small, and measurement patterns must also be extremely small in order to fit within these margins. Moreover, it is required to be placed close to the circuit pattern.

By the way, as a method for recognizing this type of pattern, as described in Japanese Patent Application Laid-Open No. 55-34490, light is scanned along the pattern and a so-called edge signal is detected from the light reflected at the edges. A method for recognizing patterns based on edge signals has been proposed. However, this method is effective for patterns with a width dimension of several micrometers, but as mentioned above, the measurement pattern is miniaturized to the order of 1 micrometer or 7", and other When the edge signal is placed in close proximity to the pattern, it becomes difficult to use the conventional method of detecting edge signals and recognizing the pattern as is.

That is, in this conventional method, edge signals of the measurement pattern and edge signals of other circuit patterns are detected close to each other, so these adjacent signals are mixed up, making it difficult to confirm the edges of the target pattern. This makes pattern recognition difficult. Therefore, in order to use this conventional method, it is necessary to provide a blank area around the measurement pattern at least on the width plate of the measurement pattern, which is usually about 2 to 3 times the width, and the above-mentioned height In practice, it becomes almost impossible to apply this method to objects of varying degrees of integration.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a method that can accurately measure a fine target pattern that is placed close to other patterns and perform pattern recognition accurately.

Another object of the present invention is to provide a method that can accurately and accurately recognize a target measurement pattern formed together with a circuit pattern in a semiconductor integrated circuit.

The above and other objects and novel features of the present invention include:
It will become clear from the description of this specification and the accompanying drawings.

[Summary of the invention]

A brief overview of typical inventions disclosed in this application is as follows.

That is, the edge signals of a pattern including the target pattern are detected, the mutual distance between these edge signals is measured to calculate the edge-to-edge dimension, and this edge-to-edge dimension is compared with the edge-to-edge dimension of a preset reference pattern. This is a method to recognize the target pattern by extracting only the edge signals of the target pattern using the microprocessor, and it is possible to recognize the target pattern with high precision and accuracy even when the target pattern is miniaturized and placed close to other patterns. It can be recognized, and it can sufficiently correspond to pattern recognition in highly integrated semiconductor integrated circuits.

〔Example〕

FIG. 1 is a block diagram of an apparatus for carrying out the pattern recognition method of the present invention, and this will be explained first.

In the figure, 1 is an apparatus main body, and 2 is a semiconductor wafer as an object on which a target pattern is formed.

This wafer 2 is placed on an XY table 3, and its planar position is moved and set by an XY drive unit 4.

The device main body 1 is installed above the XY table 3 as an inspection device in a predetermined pattern forming process, and has an objective lens 5. Pattern detection element 6. Light source7. Equipped with half mirror 8 etc.

The pattern detection element 6 is arranged in the X direction 1. It consists of a one-dimensional array of CCDs 6x and 6y (both form a two-dimensional array) each oriented in the Y direction, and the pattern on the surface of the wafer 2 imaged by the objective lens 5 is directed in the Y direction.

Detection is possible within the required size range in the X direction.

On the other hand, the pattern detection element 6 includes each of the CCDs 6x,
The pattern detection element 6 and the processing circuit 9 constitute a pattern detection section 10, which outputs each pattern signal in the X direction and Y direction of the wafer 2. do. This pattern detection section 10 is connected to a comparison circuit 12. A position signal is inputted to this comparison circuit 12 from the XY driving section 4 of the XY table 3, and a dimension signal of a reference pattern, etc. is inputted from the reference data section 11. Further, the comparator circuit 12 is provided with a calculation section 13, which performs a predetermined calculation based on the detection signal, position signal, and reference signal.

This calculation result is displayed on the display section 14.

Next, a pattern recognition method using the recognition device having the above configuration will be explained.

First, a target chip formed on a wafer 2 by the XY table 3 is placed facing the apparatus main body 1, and a target pattern is detected by the apparatus main body 1. In this case, the target pattern is the second
As shown in the figure, the first process pattern P1 has a rectangular frame shape.
A second rectangular frame with larger vertical and horizontal dimensions is placed on the outside of the
It is assumed that patterns are arranged so as to surround the process pattern P2, and other patterns, for example, circuit patterns Pe, are arranged close to each other on both sides of these patterns.

For these patterns, the device main body 1 is
The X-direction CCD 6x is positioned opposite to the position indicated by -A, and this portion is imaged on the CCD 6x by the objective lens 5 or the like, and the reflected light output is output to the processing circuit 9. Therefore, the processing circuit can obtain edge signals Se of each pattern as shown in the lower part of the figure, and output them to the comparison circuit 12. The comparison circuit 12 mutually compares this edge signal Se with the position signal Sp from the xy drive unit 4, and the calculation unit 13 performs calculations, thereby determining each peak position dimension 11 of the edge signal Se as shown in the figure. ~19, and further calculate the inter-peak dimension by determining the mutual difference between these values.

Further, the comparison circuit 12 compares this peak-to-peak dimension with the reference pattern dimension input from the reference data section 11. The reference pattern dimensions set in this reference data section 11 are the external dimension Lal and width dimension La2 of the design pattern Pla of the first process pattern P1, as shown in FIGS. 3(A) and 3(B). Similarly, these are the external dimension Lbl and the width dimension Lb2 of the design pattern P2a of the second process pattern P2.

Then, by comparing these reference pattern dimensions and the peak-to-peak dimension and matching them, the edge signals of the first process pattern and the edge signals of the second process pattern are respectively obtained from the large number of edge signals Se. can be extracted. Thereafter, the dimensions and positions of the first and second patterns on the wafer 2 are measured based on these edge signals, and by comparing these with predetermined tolerance values, etc., each pattern in the first and second steps is determined. It is possible to judge whether a process is appropriate or not, and to control it appropriately. Further, by mutually comparing each pattern of the first step and the second step, the relative positional relationship between the two can be recognized and the relative positional deviation can also be measured. These results can be displayed on the display unit 14 if necessary.

Therefore, this recognition method detects the edge signal of the target pattern and determines its size, position, etc. even when the target pattern has minute dimensions or when this pattern is placed close to other patterns. It is possible to measure and recognize the measurement with high precision and accuracy. This makes it possible to arrange measurement patterns and perform measurements even in semiconductor integrated circuits with a high degree of integration and very little blank space, which is extremely effective in obtaining semiconductor integrated circuits with high reliability. Become.

〔effect〕

(1) Detect the edge signals of the pattern including the target pattern, measure the distance between these edge signals to calculate the edge-to-edge dimension, and compare this edge-to-edge dimension with the edge-to-edge dimension of a preset reference pattern. Since the target pattern is recognized by extracting only the edge signals of the target pattern, even if the target pattern is minute, the edge signals can be easily detected and the target pattern can be measured and recognized with high precision and accuracy. be able to.

(2) Similarly, even if another pattern is placed close to the target pattern, only the edge signal of the target pattern can be detected, and the target pattern can be recognized with high precision and accuracy.

(3) Even if the target pattern is minute and close to other patterns, it can be recognized with high precision and accuracy, making it possible to easily place the measurement pattern even in semiconductor integrated circuits with high integration density and few blank spaces. The reliability of integrated circuits and the suitability of processes can be easily tested.

Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the above Examples and can be modified in various ways without departing from the gist thereof. Nor. For example, the pattern detection section may perform pattern detection by scanning with a laser beam. Furthermore, measurement or recognition may be performed by detecting edge signals in the Y direction as well as in the X direction, or measurement or recognition may be performed by detecting edge signals in both directions.

[Application field]

In the above explanation, the invention made by the present inventor was mainly applied to a method for recognizing measurement patterns of semiconductor integrated circuits, which is the background field of application, but it is not limited to this, and for example, It can also be applied to cases where circuit patterns are directly recognized.

[Brief explanation of drawings]

Figure 1 is an overall configuration diagram of an apparatus for carrying out the method of the present invention, Figure 2 is a diagram showing the target pattern and its detection signal, and Figures 3 (A) and (B) are diagrams showing the first and second steps. FIG. 3 is a diagram showing each reference pattern. DESCRIPTION OF SYMBOLS 1... Apparatus body, 2... Wafer, 3... XY table, 4... XY drive unit, 6... Pattern detection element, 6x. 6y...CCD, 9...Processing circuit, 10...Pattern detection section, 11...Reference data section, 12...Comparison circuit, 13...Calculating section, 14...Display section. Figure 2 Figure 3 CB)

Claims (1)

[Claims] 1. Detect the edge signals of a pattern including the target pattern, measure the distance between these edge signals to calculate the edge-to-edge dimension, and calculate the edge-to-edge dimension of a preset reference pattern. A pattern recognition method characterized by extracting only an edge signal of a target pattern by comparing it with an inter-edge dimension, and recognizing the target pattern from the extracted signal. 2. The pattern recognition method according to claim 1, wherein the target pattern is a measurement pattern placed in the margin of the circuit patterns of the semiconductor integrated circuit at the same time as these circuit patterns are formed. 3. The pattern recognition method according to claim 2, wherein a plurality of target patterns are respectively recognized and a relative position difference between each target pattern is detected.