JPS6276841A - Loop type inter-multi-earthing digital communication equipment - Google Patents

Abstract

PURPOSE:To attain inter-multi-earth digital communication with a nearly half lines in comparison with conventional lines by providing a storage circuit giving an output at a required time and a switch switching a test signal inputted to the reception side input from an output of the transmission side. CONSTITUTION:When an overflow take place, an overflow detection circuit 60 closes the PORTA of a switch 40 to open a PORTB so as to clear a storage circuit 50. The storage circuit 50 stores the input signals XA2 of a transmission side input (Sin)1 at a time 2 as 0. Since the switch 40, overflow detection circuit 60 and storage circuit 50 of stations B-F are operated similarly as those of the station A, the input signal of the sender input (Sin)1 of the stations B-F is outputted from the reception side output (Rout)4 of the station A. In the stations B-F, the input signal of the sender side input (Sin)1 of all the stations except its own station is outputted from the reception side output (Rout)4 of each station. Thus 2(N-1) lines are required for a conventional system, while the communication is attained by using N lines.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a loop type multi-to-ground digital communication device,
In particular, the present invention relates to a loop-type digital communication device having N communication paths in communication between N points.

[Conventional technology]

Conventionally, multi-to-ground digital communication has been carried out using a star-shaped communication system in which slave stations B-I are arranged in a star-shape with respect to a master station Δ, as shown in FIG. In the figure, S is the transmitted signal, R
indicates the received signal. In this star-shaped communication system, two lines are required between the master station and each slave station, so 2 (N-1) lines of communication paths are required for communication between N stations.

[Problem that the invention seeks to solve]

In multi-ground digital communication using the conventional star-shaped communication method described above, 2 (Ni) circuits are required to communicate between N points, so the line cost increases as the number of points increases. It has the disadvantage of becoming.

The present invention has been made to solve the above-mentioned drawbacks, and provides a loop-type multi-ground digital communication device that can perform multi-ground digital communication with approximately half the number of lines conventionally required. The purpose is to

[Means for solving problems]

The loop type digital communication device of the present invention has a receiving side input R.
A test signal detection circuit detects a test signal input to 1n, a power supply monitoring circuit monitors turning on of the device power, and outputs the test signal to the transmitting side S. A test signal generator to send to U, and a transmitter input 8. A storage circuit that stores the signal input to , and outputs it at the required time, and a switch that can be switched to transmit the test signal input to the receiving side input from the transmitting side output 8゜U. A device consisting of a device is connected in a loop and used.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention.

This embodiment includes a test signal detection circuit 10 that detects a test signal input to a receiving side input (Ri,) 3, a power supply monitoring circuit 20 that detects whether or not the device power is turned on, and a power supply monitoring circuit 20 that transmits a test signal. Test signal generator 3 sending to side output (S,, t) 2
Switcher 4 with ports 0, PORTA, and PORTB
0 and the transmitting side input (St,) I, and an output error storage circuit 50 and an overflow detection circuit 60. Note that 70.80 is an adder, and 4 is a receiving side output (Ro, 1.).

FIG. 2 is a diagram showing the connection state of communication paths when six devices shown in FIG. 1 are connected in a loop to perform six-to-ground communications. Hereinafter, the operation of the embodiment of the present invention will be explained using six-to-ground communications as an example.

In FIG. 2, among the six stations A to F, station A is the master station, and stations B to F are the slave stations. The sending signal S is sent from station A to station 13, from station B to station 0, and from station F to station Δ. As shown in FIG. 2, there are six communication channels in six-to-ground communications.

When the parent station Δ station turns on the power, the power supply monitoring circuit 20 in FIG. At the same time, the switch 40 is disabled to prevent the signal from the transmitting side input (St, . . . ) 1 from being sent to the transmitting side output (s, , t) 2. and,
The memory circuit 50 is put into a clear state. At this time, the slave station B
It is assumed that the power of stations to stations F is cut off. And B
When a station other than the station (for example, station C) is powered on, the power supply monitoring circuit 20 in FIG. Detect the signal. In this case, the test signal T is not sent to the adjacent station because the power is cut off. Therefore, the test signal detection circuit 10 continues to send out the test signal Z from the test signal generator 30 and disables the switch 40. This test signal detection circuit 10 receives a test signal T from a receiving side input (Rih) 3 for a specified time R7.
1- If the test signal T is sent, the test signal generator 30 is activated to continue sending the test signal T to the transmitting side output (S, ut) 2, and the switch 40 is disabled. Then, the memory circuit 50 is cleared. Here, the test signal detection circuit 10 of the Δ station, which is the master station, performs a control operation different from that described in -1-.

Next, when the power of station B is turned on, the power supply monitoring circuit 20 in FIG.
h) Detect the signal sent to 3. At this time, since the test signal T is continuously being sent from the master station Δ station, the test signal detection circuit 10 of the B station receives the receiving side input (Ri
, ,) 3 has been sent after the specified time Ri, the test signal generator 30 outputs the transmitting side output (
Sout) 2 continues to send the test signal T to disable the switch 40. Then, the memory circuit 50 is cleared.

When the power of all stations from A to F is turned on in this way, the power supply monitoring circuit 20, test signal detection circuit IO, and test signal generator 30 of each station finally output the transmitting side output (S
0ut)2, the receiving side input (Ri-
>3, the test signal T will continue to be sent.

When the test signal detection circuit 10 of the A station determines that the test signal T has been sent for a specified time Rt or more, the test signal Y is sent from the test signal generator 30 to the transmitting side output (So,...) 2 for a specified time st. (>Rt), and then enables the switch 40 and sends the signal X input from the transmitting side input (Si)l to the transmitting side output (s, ut)2. Next, the test signal detection circuit 10 of the B station receives the receiving side input (R
When it is determined that the test signal Y has been sent to i-) 3 for more than the specified time R, the test signal Y is similarly sent from the test signal generator 30 to the sending side output (So, t) 2 for the specified time si (
>r<t), and then the switch 404 is enabled at 17 to send the signal X input from the transmitting side input (8,.)1 to the transmitting side output (Sou,)2. Then, the clear state of the memory circuit 50 is released. Similarly, the test signal detection circuit 10 and test signal generator 30 of each station finally output A from the transmitting side output (s, t) 2 of F station.
A test signal Y is sent to the receiving side input (Ri, . . .) 3 of the station for a specified time S. Then, test signal detection circuit 1 of station A
0 releases the clear state of the memory circuit 50 when it is determined that the test signal Y has been sent to the receiving side input (Ri, . . . ) 3 for a specified time R5. At this point, all the memory circuits 50 of stations A to F are in operation, and the input signal The signal is then sent to the receiving side input (Ri, ,) 3 of the adjacent station. Let time t at this point be O.

Here, the transmitting side input of station A at time 1 (8,.) 1
Let XAt be the input signal that has been modified from , and similarly, B
Input signals from station to F station are respectively XBtl XCtl
Btl XBtl XFt. Also, at that time, the output from the sending side output (So, , ) 2 is XEL,
11.

Also, the receiving side input (Ri,,)3 of station A at time t
Let the input signal input to the station be Yxt, and similarly from station B to
The input signal of F station is VBt, Yct+Ynt, respectively.
, YHt, and Ypt. At that time, the output signals output from the receiving side output (Rout) 4 are respectively YAt+ YEL+ YCt+ Ynt+ YHt.
+yFt.

In addition, the sending signal S sent from A station passes through each station to A
The propagation time of the loop communication channel until input to the station is i
1oop (-f A-〇, propagation time from M station to N station is t.-N (for example, tA-B), time is 10 to j
Time after Loop (seconds) is 1, time t, = Q to n
Let η be the time after tloop (seconds).

Then, the receiving side input of station A at time 2 (Riゎ) 3
The input signal of the input signal YA2 is assumed to be YA2, and the memory circuit 50 in FIG.
+, and at the same time as outputting the minus signal, we also store the input signal XA2 of the transmitting side input (Si,) 1 at time 2, then the receiving side output of station A (Si,)
Rout) 4 output signal YA2 is as follows: YA2=YA2-XAI... (1) Also, A
The output signal XA2 of the transmitting side output (s, ut) 2 of the station is:
Since PORTΔ of the switch 40 is open, XA2 =
YA2 + XA2 (2). Here, when an overflow occurs due to the calculation of XA2 = YA2 + XA2 in equation (2) in 1-, the overflow detection circuit 60 closes PORTΔ of the switch 40, opens PORTB, and clears the memory circuit 50. Make it. With this control, the memory circuit 50 stores the transmitting side inputs (S, , . . .
) 1 input signal XA2 is set to 0 and stored.

Therefore, in formula (2) of ``1, XA□-0, so XA2 = YA2 +XA2 = YA2...
(3) becomes.

Also, at time 1, the switch 40, overflow detection circuit 60, and memory circuit 50 of stations B to F operate in the same way as in station A, so the above formula (1) % formula % is obtained. Therefore, (1) The formula is ';'A2=Lu+, tl+Xc+++t)
+Xn++-v, , +A-B
A-CA-DXE N+t l +Xp Tl
+t^-F)-E, and the transmitting side input (St,,) at stations B to F
1 input signal is output from the receiving side output (RQut) 4 of the A station.

Below, for stations B to F, the receiving side output of each station (
Rout) 4, transmitting side input (
Sih) 1 input signal is output.

Therefore, communication between six destinations can be performed using the loop type communication channel.

〔Effect of the invention〕

As mentioned above, in the present invention, multi-ground digital communication is performed in a loop type system, so the star-shaped communication system generally used for communication between N points is 2 (N-1) communication. However, the loop type communication system of the present invention has the advantage that communication can be performed using N communication paths.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is a diagram showing the connection of communication channels when performing communication between 6 points according to the embodiment shown in Fig. 1, and Fig. FIG. 2 is a diagram showing a conventional star-shaped communication system. ■ ...... Sender side input (S+9) 2 ...
... Sending side output (Sout) 3 ...... Receiving side input (R+-) 4 ...... Receiving side output (Ro
ut)10... Test signal detection circuit 20
...... Power supply monitoring circuit 30 ...... Test signal generator 40 ...
... Switch 50 ... Memory circuit 60 ... Overflow detection circuit 70
・・・・・・ Adder 80 ・・・・・・ Adder agent Patent attorney Yoshiyuki Iwasa Figure 3

Claims (1)

[Claims] (1) A test signal detection circuit that detects the test signal input to the receiving side input R_i_n, a power supply monitoring circuit that monitors the turning on of the device power, and a test signal output S_o_u_t on the transmitting side.
a memory circuit that stores the signal input to the transmitting side input S_i_n and outputs it at the required time, and a memory circuit that transmits the test signal input to the receiving side input R_i_n from the transmitting side output S_o_u_t. A loop-type multi-to-ground digital communication device in which a device consisting of a switching device and a switch that can be switched is connected in a loop.