JPS6274293U - - Google Patents
Info
- Publication number
- JPS6274293U JPS6274293U JP16429085U JP16429085U JPS6274293U JP S6274293 U JPS6274293 U JP S6274293U JP 16429085 U JP16429085 U JP 16429085U JP 16429085 U JP16429085 U JP 16429085U JP S6274293 U JPS6274293 U JP S6274293U
- Authority
- JP
- Japan
- Prior art keywords
- color
- matrix panel
- driver circuit
- display device
- column driver
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011159 matrix material Substances 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 2
Description
第1図は本考案の駆動回路を採用したカラーマ
トリツクスパネル表示装置の一実施例を示すブロ
ツク図、第2図及び第3図はその動作タイミング
を示す図である。
1:カラーLCDパネル、2:行ドライバ回路
、3:列ドライバ回路。
FIG. 1 is a block diagram showing an embodiment of a color matrix panel display device employing the drive circuit of the present invention, and FIGS. 2 and 3 are diagrams showing its operation timing. 1: Color LCD panel, 2: Row driver circuit, 3: Column driver circuit.
Claims (1)
り返し揃列配置されたカラーマトリツクスパネル
を備え、その各表示素子に対応するR、G、B三
原色信号の各々を列ドライバ回路により順次サン
プリングして印加して行くようにしたカラーマト
リツクスパネル表示装置に於いて、同一画素を構
成する一組のR、G、B各表示素子に同一タイミ
ングに位置する三原色信号がサンプリングされて
印加されるよう、1サンプル周期相当の遅延時間
差を互いに有するR、G、B各信号を1サンプル
周期毎に切換えて前記列ドライバ回路にシリアル
に入力して行くようにしたことを特徴とするカラ
ーマトリツクスパネル表示装置の駆動回路。 It is equipped with a color matrix panel in which R, G, and B color display elements are repeatedly arranged in rows in the horizontal direction, and each of the R, G, and B primary color signals corresponding to each display element is sequentially sampled by a column driver circuit. In a color matrix panel display device, three primary color signals located at the same timing are sampled and applied to a set of R, G, and B display elements constituting the same pixel. A color matrix panel characterized in that R, G, and B signals, each having a delay time difference equivalent to one sample period, are switched every sample period and are serially input to the column driver circuit. Display device drive circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16429085U JPS6274293U (en) | 1985-10-25 | 1985-10-25 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16429085U JPS6274293U (en) | 1985-10-25 | 1985-10-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6274293U true JPS6274293U (en) | 1987-05-12 |
Family
ID=31093271
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16429085U Pending JPS6274293U (en) | 1985-10-25 | 1985-10-25 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6274293U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2020071538A1 (en) | 2018-10-05 | 2020-04-09 | Ajinomoto Co., Inc. | Method for producing target substance by bacterial fermentation |
-
1985
- 1985-10-25 JP JP16429085U patent/JPS6274293U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2020071538A1 (en) | 2018-10-05 | 2020-04-09 | Ajinomoto Co., Inc. | Method for producing target substance by bacterial fermentation |
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