JPS6274116A - Priority key processing system - Google Patents

Abstract

PURPOSE:To eliminate the need for re-inputting a key data by storing in advance a key data to be inputted preferentially, and outputting this key data if it is inputted, prior to the preceding key data in a key buffer. CONSTITUTION:A priority processing circuit of a specified key data is constituted so that a key data which is inputted by each key operation of a keyboard is preset to a key data latch 1, and preset successively to a key buffer therefrom. The key data in this buffer 2 is given to a CPU through a selector 3, and brought to a data processing. In this case, the key data to be inputted first preferentially than other preceding key data is preset in advance to a priority key data latch 4. In this way, the priority key data is given to a comparing circuit 5 in addition to a CPU, and whether it coincides with an input key data which his inputted each time from the key data latch 1 or not is discriminated. As a result, when they coincide with each other, the priority key data is outputted by taking precedence over others.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a priority key processing method for inputting only specific key data in advance of key data that has already been input.

[Prior art] Conventionally, this is the priority key processing method.

After clearing all the key buffers in which input key data is temporarily stored, input the key data that should be prioritized, or add an interrupt code to the key data that should be prioritized and input it to the key buffer. A system was realized that would later search for key data containing an interrupt code and output it preferentially.

[Problems with the prior art] However, with the method that clears the key buffer once, the key data that has been input is cleared and the key data must be input again, and with the method that adds an interrupt code, Even in order to input one key data, there are problems such as requiring various circuits, such as providing two types of keys, one with an interrupt code and one without.

[Object of the Invention] Therefore, the present invention makes it possible to give priority to specific key data over other key data without clearing already input key data or providing two keys for one key data. The purpose is to provide a priority key handling scheme.

[Key points of the invention] This invention aims to achieve the above-mentioned objects.

Priority 17 The key data that should be input first is memorized in advance, and it is determined whether this key data is input. If the key data is input, this key data is used as the preceding key data in the key buffer. The main point is that it is outputted in advance.

[Configuration of Example] An embodiment of the present invention will be described in detail below with reference to the drawings.

Figure 1 shows a circuit that processes specific key data with priority; 1 in the figure is a key data latch, and input is input to this key data latch l by operating each key on a keyboard (not shown). The key data to be used is preset,
Key data is sequentially preset when a strobe signal driven at a low level is applied from the key data latch 1 to the key buffer 2. This key buffer 2 has multiple stages of 8-bit registers connected, and each time 8-bit key data is captured, the previously captured key data is sequentially shifted, and the previously input key data is temporarily stored. be remembered. The key data in the key buffer 2 is provided to a CPU (not shown) via a selector 3 for data processing.

On the other hand, key data that should be entered manually in preference to other preceding key data is preset in the priority key data latch 4 through the CPU by a preset operation from the keyboard. The priority key data of this priority keep clutch 4 is given to the CPU via the 1-recorded cell 1/actor 3 and is also returned to the comparator circuit 5. Input key data that is input each time is also given, and a match between the two data is determined, and if they match, a match signal is given to the selector 3. When the match signal is received in the selector 3, the data to be sent to the CPU is switched from the input key data from the key buffer 2 to the priority key data from the priority key data latch 4, and the data sent to the CPU is switched from the input key data from the key buffer 2 to the priority key data from the priority key data latch 4. On the other hand, priority key data is output with priority. The key data is output from the selector 3 to the CPU when the read signal CPU READ is applied from the CPU.
The output data is returned to the key buffer 2 side by the reset signal RESET from U. Further, the match signal from the comparison circuit 5 is sent to the key buffer 2 via the OR gate 6, preventing key data from being taken into the key buffer 2, and preventing priority key data from being preset in the key buffer 2. ing.

[Example operation 1 Next, the operation of this embodiment will be described.

If rZJ is to be set as the priority key data, the key data of rZJ is preset in the priority key data latch 4. For example, if you want to preferentially input "Z" when performing a keystroke such as "rabcd...fist", you can operate the rZJ key. Then, the key data of rZJ is preset to the key data latch 1 and sent to the comparator circuit 5.
Since the key data from the priority key data latch 4 matches, a match signal is sent to the sector 1/actor 3, and
The key data of "Z" is outputted from the priority key data latch 4 to the CPU via the selector 3 in priority to the previously input key data of rabcd fist . . . J in the key buffer 2.

In this way, the preceding key data ``rabcd...'' is not erased, and rZ
The priority key data of J is given to the CPU.

Furthermore, if it is desired to switch the priority key data to another rKJ, etc., the key data of the priority key data latch 4 may be preset to rKJ, etc. again.

In this way, the priority key data can be freely changed to desired data.

In the above embodiment, one priority key data is preset in the priority key data latch 4, but a plurality of priority key data may be preset. In this case, the plurality of priority key data are sequentially compared one by one in the comparison circuit 5, and those that produce matching signals are sent to the selector 3.

[Effects of the Invention] As explained in detail above, the present invention stores in advance key data that should be input first with priority,
It is determined whether this key data is input, and if the key data is input, this key data is output before the previous key data in the key buffer, so the key data that was input earlier is erased. It is possible to output specific key data with priority, eliminating the need to re-enter key data, and by registering any key on a regular keyboard as priority key data. Since it can be used as a key, there is no need to provide a separate priority key, and the key data registered as priority key data can be changed arbitrarily, so priority key data can be changed freely, etc. It has the effect of

[Brief explanation of drawings]

The drawing shows a circuit that outputs specific key data with priority over preceding key data. l...Key data latch, 3...Selector, 4...Priority key data latch, 5...
...Comparison circuit. Patent applicant: Casio Computing Co., Ltd. CPU

Claims (1)

[Scope of Claims] Input key data storage means for storing key data to be inputted sequentially; and priority key data storage means for storing key data to be inputted first with priority over previous key data even if inputted later. , a comparison means for comparing whether or not the input key data matches the priority key data stored in the priority key data storage means; and the comparison means determines whether the input key data matches the priority key data. a priority key processing method, comprising: an output selection means for outputting the priority key data prior to the preceding key data stored in the input key data storage means, if it is determined that the priority key data is the same;