JPS6273821A - High frequency amplifier device - Google Patents

High frequency amplifier device

Info

Publication number
JPS6273821A
JPS6273821A JP21310285A JP21310285A JPS6273821A JP S6273821 A JPS6273821 A JP S6273821A JP 21310285 A JP21310285 A JP 21310285A JP 21310285 A JP21310285 A JP 21310285A JP S6273821 A JPS6273821 A JP S6273821A
Authority
JP
Japan
Prior art keywords
inductance
frequency
high frequency
tuning
variable capacitance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21310285A
Other languages
Japanese (ja)
Inventor
Akira Usui
晶 臼井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP21310285A priority Critical patent/JPS6273821A/en
Publication of JPS6273821A publication Critical patent/JPS6273821A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To attenuate the vicinity of frequencies higher than a desired frequency by inserting the 3rd inductance as a tuning coil in series with a varactor diode of a tuning type input filter. CONSTITUTION:An input signal is fed from a terminal 1A and the vicinity of the desired frequency is turned selectively by a tuning type input filter 11. In this case, two times or so of the desired signal frequency is attenuated by a tuning trap circuit 13 having the resonance point in the vicinity of twice the desired signal frequency and the result is amplified by a high frequency amplifier circuit 12 but the twice of the desired frequency is attenuated sufficiently. Thus, the constitution is simplified and the quantity of the secondary distortion is suppressed to a detection limit or below.

Description

【発明の詳細な説明】 産業上の利用分野 本発明はCATVコンバータ、ヂューフイ1どに使用さ
れる高周波増幅装置に関する。
DETAILED DESCRIPTION OF THE INVENTION FIELD OF INDUSTRIAL APPLICATION The present invention relates to a high frequency amplification device used in CATV converters, Duplexes, etc.

従来の技術 近年、高周波増幅装置は、CATV、SHF等のニュー
メディア纒器の発達に伴い、←ト々の用途が拓けてきて
いる。
BACKGROUND OF THE INVENTION In recent years, with the development of new media such as CATV and SHF, high frequency amplification devices are being used in a variety of applications.

第3図、gi54図、第5図は従来の高周波増幅装置を
示し、第3図において31は同調型入Jyフィルタ、3
2は高周波増幅回路である。入力端子3△より入力され
た高周波信号は、IjJ調!5°1人カフィルタ月によ
り所望の周波数近辺を選JR同調づる。この信号は高周
波増幅回路32で“増幅されて、出力端子3Bより次段
に供給される。
Fig. 3, gi54, and Fig. 5 show conventional high frequency amplification devices, and in Fig. 3, 31 is a tuned input Jy filter;
2 is a high frequency amplification circuit. The high frequency signal input from input terminal 3△ is in IjJ tone! Select around the desired frequency using the 5° one-person filter and tune to JR. This signal is amplified by the high frequency amplifier circuit 32 and supplied to the next stage from the output terminal 3B.

第4図は同調型入力フィルタJ1の具体例を示し、・1
1.42は同調コイル、43.45は結合容量、44は
可変容量ダイオード、46は同調電位を伝えるバイアス
抵抗である。4Aが入力端子、/IQが出力端子、4C
が同調電位端子である。入力端子4Aから与えられた信
号は、同調コイル41.42と可変容量ダイオード44
の逆バイアス容量により共振同調して所望近辺の周波数
を選択通過させる。入力信号は同調コイル、11.42
の中貞から与えることにより、共振のインピーダンスを
高くすることができる。
FIG. 4 shows a specific example of the tunable input filter J1, ・1
1.42 is a tuning coil, 43.45 is a coupling capacitance, 44 is a variable capacitance diode, and 46 is a bias resistor for transmitting a tuning potential. 4A is the input terminal, /IQ is the output terminal, 4C
is the tuning potential terminal. The signal given from the input terminal 4A is sent to the tuning coil 41, 42 and the variable capacitance diode 44.
Resonant tuning is performed using the reverse bias capacitance of , and frequencies around the desired frequency are selectively passed. Input signal is tuning coil, 11.42
The resonance impedance can be increased by giving it from the inside.

可変容量ダイオード44には、バイアス抵抗4Gを介し
て端子4Cから同調電位が与えられる。同調された信号
は結合容量45を経て出力端子4Bより次段の高周波増
幅回路32に供給される。
A tuning potential is applied to the variable capacitance diode 44 from the terminal 4C via the bias resistor 4G. The tuned signal is supplied to the next stage high frequency amplification circuit 32 from the output terminal 4B via the coupling capacitor 45.

第5図は高周波増幅回路32の具体例を示し、51はF
ETt−ランジスタ、52はバイアス抵抗、53はバイ
アス電位、51はヂョークコイルで、FETトランジス
タ51のトレインと電源端子5Dとの間に接続されてい
る。55は結合容量、5Bは第2ゲート端子、5Cは出
力端子、5Dは電源端子である。
FIG. 5 shows a specific example of the high frequency amplification circuit 32, and 51 is an F
ETt-transistor, 52 is a bias resistor, 53 is a bias potential, 51 is a jog coil, and is connected between the train of the FET transistor 51 and the power supply terminal 5D. 55 is a coupling capacitor, 5B is a second gate terminal, 5C is an output terminal, and 5D is a power supply terminal.

入力信号は第1ゲート端子5Aに供給され、トランジス
タ51にて増幅され、増幅された出力は結合容量55を
経て出力端子5Cより出ツノされる。第2ゲー1一端子
5Bはトランジスタ51の利得を制御llするAGC端
子として作用している。(例えば、特開昭58−210
711号参照) 光明が解決しようとする問題貞 このような従来の構成では、高周波の利得は高くとれる
が、CATV等の数10波に6及ぶ多チャンネルでレベ
ルの揃った信号を受信した場合、入力フィルタの同調特
性が不足して2次及び3次の歪を発生させる信号を十分
に落としきれず、第2ゲート端子5BでのAGC電圧で
利得を絞っても多波型はほとんど改善されないため、多
波による歪の合成により、妨害排除を十分なし得ない状
態であった。中でも所望周波数と所望周波数の倍の周波
数の差が所望信号の帯域内に落ちるものや、所望周波数
の半分の信号の2次高調波と所望信号の倍の周波数の差
が所望信号の帯域内に落ちるものの妨害レベルを十分に
避は得ないという問題があった。
The input signal is supplied to the first gate terminal 5A, is amplified by the transistor 51, and the amplified output is outputted from the output terminal 5C via the coupling capacitor 55. The second gate 1 terminal 5B functions as an AGC terminal that controls the gain of the transistor 51. (For example, JP-A-58-210
(Refer to No. 711) The problem that Komei is trying to solve With the conventional configuration like this, high frequency gain can be achieved, but when receiving signals with uniform levels on as many as 6 channels out of dozens of waves such as CATV, This is because the tuning characteristics of the input filter are insufficient and the signals that cause second- and third-order distortions cannot be dropped sufficiently, and even if the gain is reduced by the AGC voltage at the second gate terminal 5B, the multiwave type will hardly be improved. However, due to the combination of distortion caused by multiple waves, it was not possible to sufficiently eliminate interference. Among them, the difference between the desired frequency and the frequency twice the desired frequency falls within the band of the desired signal, and the difference between the second harmonic of the signal that is half the desired frequency and the frequency twice the desired signal falls within the band of the desired signal. There was a problem in that the interference level of the falling objects could not be sufficiently avoided.

本発明は上記妨害を軽減さゼることのできる高周波増幅
装置を提供することを目的とする。
An object of the present invention is to provide a high frequency amplification device that can reduce the above-mentioned interference.

問題魚を解決づるための手段 本発明の高周波増幅装置(よ、高周波増幅回路の前段に
同調型入力フィルタを設Cプると共に、前記同調型入力
フィルタを、第1、第2のインダクタンスと可変容量ダ
イオードによりなる並列共振回路右面え、第1、第2の
インダクタンスの接続点に高周波入力イス号を供給し、
前記可変容量ダイオードとアースt81に直列に第3の
インダクタンスを挿入し、前記可変容量ダイオードの逆
バイアス容量と第1、第2、第3の全インダクタンスに
よる共振周波数よりも高い周波数に第3のインダクタン
スと曲記可変容吊ダイオードの逆バイアス容量との共振
点がくるJ:うに第3のインダクタンスの値を送定し、
外部手段により可変容量ダイオードに印加Jる逆バイア
ス電位を可変8t!るJ:う構成1−たことを特徴どす
る。
Means for Solving the Problem The high frequency amplification device of the present invention includes a tunable input filter provided at the front stage of the high frequency amplification circuit, and the tunable input filter is connected to a first inductance, a second inductance, and a variable inductance. A high frequency input signal is supplied to the connection point of the first and second inductances on the right side of the parallel resonant circuit consisting of a capacitive diode,
A third inductance is inserted in series with the variable capacitance diode and the ground t81, and the third inductance is set at a frequency higher than the resonant frequency due to the reverse bias capacitance of the variable capacitance diode and the first, second, and third total inductances. The resonance point between the reverse bias capacitance of the variable capacitance diode and the reverse bias capacitance of the variable capacitance diode comes to J: Send the value of the third inductance to
The reverse bias potential applied to the variable capacitance diode can be varied by 8t using external means! J: Structure 1 - Characterize the thing.

作用 二の構成によると、同Atal型入力フィルタの可変容
量ダイオードに同調コイルとしての第3のインダクタン
スを直列に介装したため、可変容量ダイオードと第3の
インダクタンスの直列共振回路が同調トラップ回路とな
って、所望周波数よりも高い周波数近辺を減衰させるこ
とが出来る。
According to the second configuration, the third inductance as a tuning coil is inserted in series with the variable capacitance diode of the Atal type input filter, so the series resonant circuit of the variable capacitance diode and the third inductance becomes a tuning trap circuit. Therefore, it is possible to attenuate the vicinity of frequencies higher than the desired frequency.

実施例 以下、本発明の一実施例を第1図と第2図に塁づいて説
明する。
EXAMPLE An example of the present invention will be described below with reference to FIGS. 1 and 2.

第1図は本光明の高周波増幅装置の構成図を示す。11
は同調型入力フィルタ、12は高周波増幅回路、13は
同調トラップ回路、1Aは入力端子、1Bは出力端子で
ある。第2図は第1図の同調型入力フィルタ11と同調
トラップ回路13の具体例を示し、21.22は同調用
コイル、23.25は結合容量、24は可変容量ダイオ
ード、27は同調用コイルである。2Aは入力端子、2
Bは出力端子、2Cは同調電位印加端子を示す。入力信
号は第1図では端子1Aより供給され、同調型入力フィ
ルタ11により所望周波数近辺を選択同調でさる。この
とき、所望信号周波数の21&近辺に共振点を有する同
調トラップ回路13にJ:り所望周波数の2イ8近辺は
減衰さゼられ、高周波増幅回路12に(j(′1幅され
るが、所望周波数の2倍が十分減衰(]でいるため、出
力端子11′3に現われる妨害(J検知限以下になる。
FIG. 1 shows a configuration diagram of the high frequency amplification device of the present invention. 11
12 is a tunable input filter, 12 is a high frequency amplifier circuit, 13 is a tunable trap circuit, 1A is an input terminal, and 1B is an output terminal. FIG. 2 shows a specific example of the tuned input filter 11 and the tuned trap circuit 13 in FIG. 1, where 21.22 is a tuning coil, 23.25 is a coupling capacitance, 24 is a variable capacitance diode, and 27 is a tuning coil. It is. 2A is the input terminal, 2
B indicates an output terminal, and 2C indicates a tuning potential application terminal. In FIG. 1, an input signal is supplied from a terminal 1A, and a tunable input filter 11 selectively tunes around a desired frequency. At this time, the tuning trap circuit 13 having a resonance point near the desired signal frequency 21& is attenuated near the desired frequency 2&8, and the high frequency amplification circuit 12 is attenuated (j('1), Since twice the desired frequency is sufficiently attenuated (), the disturbance (J) appearing at the output terminal 11'3 is below the detection limit.

第2図C゛はI直円液入り信号は入力端子2 A 、)
、すIr1l調二1イル21.22の中点にp、えられ
ろ。共振回路は同調=lイル21.22.27と可変容
量ダイオード24の逆バイアス容量どにより共振’Ml
波数が決まるが、同調信号の取り出し点が結合容1fi
23と可変容量ダイオード24の交点でd5るから、可
変容量ダイ4−ド24と同調コイル27とで構成されろ
直列共振回路が同調トラップ回路13となる。この1T
il調1〜ラップ回路13の共振周波数を所望RJ波数
の2倍近辺に選IRすることにより従来の問題を軒減で
きる。このようにして1!7だ同調された所望周波数は
、結合容量25を介して、出力端子2Bより第1図の高
p、j波増幅回路12に供給される。
Figure 2 C' shows I right circular liquid filling signal is input terminal 2 A,)
, p, can be found at the midpoint of 21.22. The resonant circuit is resonant due to the tuning = Ile 21, 22, 27 and the reverse bias capacitance of the variable capacitance diode 24.
The wave number is determined, but the point at which the tuning signal is taken out is the coupling capacitance 1fi.
d5 at the intersection of the variable capacitance diode 23 and the variable capacitance diode 24, a series resonant circuit constituted by the variable capacitance diode 24 and the tuning coil 27 becomes the tuned trap circuit 13. This 1T
By selecting the resonance frequency of the IL key 1 to the wrap circuit 13 to be approximately twice the desired RJ wave number, the conventional problems can be completely reduced. The desired frequency tuned by 1!7 in this way is supplied from the output terminal 2B to the high p-wave, j-wave amplifier circuit 12 shown in FIG. 1 via the coupling capacitor 25.

このように入力信号を同調回路の低インピーダンスにな
るインダクタンス分割点に供給し、共振点でのインピー
ダンスを上げ、容量として用いる可変容量グイ−4−1
へ24に直列にインゲタタンス27を〜挿入1−ろこと
により、所望同調周波数の倍の周波数を減衰てきるの(
′、2次;fを軒減りろことかできろ。
In this way, the input signal is supplied to the inductance dividing point where the impedance becomes low in the tuning circuit, the impedance at the resonance point is increased, and the variable capacitor GUI-4-1 is used as a capacitor.
By inserting an ingetatance 27 in series with 24, the frequency twice the desired tuning frequency can be attenuated (
', Quadratic; Can you reduce f?

ブを明の効果 以に説明のJ、うに木51明の高周波増幅g置は、同調
型入力フィルタを構成づる第1、第2のインダクタンス
と可変8吊ダイA−ドどのへ1)列共振回路の前記可変
容量ダイ4−ドに直列に第3のインダクタンスを挿入し
て、可変8吊ダイオードと第3のインダクタンスを同調
1−ラップ回路とじて作用ざゼるため、構成筒中にしで
、常に所望周波数の倍近辺の周波数を減衰させ、R生す
る2次歪の吊を検知限以上に抑えることがc′きるもの
である。。
1) Column resonance of the first and second inductances that constitute the tuned input filter and the variable 8-hung die A-dobe. By inserting a third inductance in series with the variable capacitance diode of the circuit, the variable eight-hung diode and the third inductance act as a tuned one-wrap circuit. By attenuating frequencies around twice the desired frequency, it is possible to suppress the rise of second-order distortion generated in R to above the detection limit. .

【図面の簡単な説明】[Brief explanation of drawings]

第1図は木弁明の高周波増幅装置の一実施例のブロック
図、第2図は第1図の同調型入力フィルタと同調トラッ
プ回路の具体例を示す回路図、第3図は従来の直円波頂
・陥装置のブロック図、第4図は従来の同調型入力フィ
ルタの回路図、第5図は従来の高周波Jけ幅回路の回路
図である。 11・・・同調型入力フィルタ、12・・・高周波増幅
回路、13・・・同調1へラップ回路、21.22・・
・同調用=jコイル第1、第2のインダクタンス)、2
4・・・可変容量ダイオード、27・・・同調m:】イ
ル(第3の□′ンダクタンス) 代理人   森  本  八  弘 第1図 、・′2 を 第2図 Zl−−pJQηmフィルcyノのイ、り汐タシス〕;
!2− ’flar’1m”)4JL(732(r)4
>9−77>l)z7−M講mフイノL(g了のインゲ
7先71第3図 第4図
Fig. 1 is a block diagram of one embodiment of Kibenmei's high frequency amplification device, Fig. 2 is a circuit diagram showing a specific example of the tunable input filter and tunable trap circuit of Fig. 1, and Fig. 3 is a circuit diagram of a conventional right circular FIG. 4 is a block diagram of a wave crest/trough device, FIG. 4 is a circuit diagram of a conventional tunable input filter, and FIG. 5 is a circuit diagram of a conventional high frequency J-width circuit. 11... Tunable input filter, 12... High frequency amplifier circuit, 13... Wrap circuit to tuning 1, 21.22...
・For tuning = j coil 1st and 2nd inductance), 2
4... Variable capacitance diode, 27... Tuning m:] Ile (third □' inductance) Agent Yahiro Morimoto Figure 1, ・'2 in Figure 2 Zl--pJQηm fill cyno I, Rishiotasis];
! 2-'flar'1m”)4JL(732(r)4
>9-77>l) z7-M course m Fuino L (g.

Claims (1)

【特許請求の範囲】 1、高周波増幅回路の前段に同調型入力フィルタを設け
ると共に、前記同調型入力フィルタを、第1、第2のイ
ンダクタンスと可変容量ダイオードによりなる並列共振
回路を備え、第1、第2のインダクタンスの接続点に高
周波入力信号を供給し、前記可変容量ダイオードとアー
ス間に直列に第3のインダクタンスを挿入し、前記可変
容量ダイオードの逆バイアス容量と第1、第2、第3の
全インダクタンスによる共振周波数よりも高い周波数に
第3のインダクタンスと前記可変容量ダイオードの逆バ
イアス容量との共振点がくるように第3のインダクタン
スの値を設定し、外部手段により可変容量ダイオードに
印加する逆バイアス電位を可変させるよう構成した高周
波増幅装置。 2、可変容量ダイオードと第3のインダクタンスの共振
点を同調周波数の2倍近辺に設定したことを特徴とする
特許請求の範囲第1項記載の高周波増幅装置。
[Scope of Claims] 1. A tunable input filter is provided before the high-frequency amplifier circuit, and the tunable input filter is provided with a parallel resonant circuit including first and second inductances and a variable capacitance diode, and a first , a high frequency input signal is supplied to the connection point of the second inductance, a third inductance is inserted in series between the variable capacitance diode and the ground, and the reverse bias capacitance of the variable capacitance diode and the first, second, and third inductances are connected to each other. The value of the third inductance is set so that the resonance point between the third inductance and the reverse bias capacitance of the variable capacitance diode is at a frequency higher than the resonance frequency due to the total inductance of the variable capacitance diode, and A high frequency amplification device configured to vary the applied reverse bias potential. 2. The high frequency amplification device according to claim 1, wherein the resonance point of the variable capacitance diode and the third inductance is set at approximately twice the tuning frequency.
JP21310285A 1985-09-26 1985-09-26 High frequency amplifier device Pending JPS6273821A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21310285A JPS6273821A (en) 1985-09-26 1985-09-26 High frequency amplifier device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21310285A JPS6273821A (en) 1985-09-26 1985-09-26 High frequency amplifier device

Publications (1)

Publication Number Publication Date
JPS6273821A true JPS6273821A (en) 1987-04-04

Family

ID=16633602

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21310285A Pending JPS6273821A (en) 1985-09-26 1985-09-26 High frequency amplifier device

Country Status (1)

Country Link
JP (1) JPS6273821A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0376078U (en) * 1989-11-21 1991-07-30

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0376078U (en) * 1989-11-21 1991-07-30

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