JPS6273461A - Recorder for digital information signal - Google Patents

Abstract

PURPOSE:To attain recording/reproduction of an audio signal with high quality by recording a 16-bit PCM signal having a sampling frequency of 1.5fs to three split sections in addition to an 8-bit PCM signal having a sampling frequency of fs to one of the split sections. CONSTITUTION:One track is sectioned into N, e.g., 6, sections and a digital information signal, e.g., an audio PCM signal is recorded on the split sections while being subjected to error correction processing. An n-bit PCM signal whose sampling frequency is fs is recorded on one section per one track. A PCM signal whose sampling frequency is (a.fs) or whose bit number is (b.n) is recorded while being shared in a sets or b sets of sections per track. The PCM signal having the relation of (a=1.5) and (b=2) is recorded while being shared into 3 sections per track. Thus, the PCM signal having a high sampling frequency and many bit numbers are recorded without changing a tape and head system.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a recording device for digital information signals, which is applied to recording digital information signals, such as digital audio signals, on a magnetic tape using a rotary head.

[Invention (already required)]

The present invention provides a recording device that records digital information signals on a magnetic tape using a rotating head, in which one track formed on the magnetic tape is divided into N (N: an integer), and error correction processing is performed for each section. The n-bit digital Ift[? In the case of a signal, the signal is recorded in one section per track, and when the sampling frequency is a times or the number of bits is b times, the signal is recorded in a or b sections per track. This makes it possible to record digital information signals with different sampling frequencies or bit numbers using a common tape and head system.

[Conventional technology]

For example, as shown in Japanese Unexamined Patent Publication No. 58-222402, a VTR (so-called 8 mm VTR) is known which uses a small tape cassette and has a magnetic tape width of 8 mmrn. One feature of this 8mm VTR is that recording/playback of digital audio signals (referred to as PCM signals) is standardized.

In a 3mm VTR, the standard method is to record an FM frequency-transmitted audio signal together with a recording video signal on an inclined track. Also, as an option, a dedicated area for PCM signals is provided at the end of the track.

Furthermore, standards have also been established for using an 8mm VTR as a recording/playback device exclusively for audio signals.

In an 8 mm VTR, the sampling frequency is (
", =2 In =31.5kHz, f,
: horizontal synchronization frequency), and the number of quantization bits is standardized to (n=8) bits. Therefore, the reproducible frequency band is (f□=15.75 kHz). Furthermore, since 8 bits of quantization bits is too small, an analog noise removal system and non-linear digitization that compresses 10 bits of information to 8 bits are used to substantially expand the dynamic range. There is.

As a PCM signal recording/playback device, the 8mm VTR is superior to Ike's PCM tape recorders, compact disc playback devices, etc., because it can record video signals for 4 hours when used as an audio signal-only device. In the case of a tape cassette, (6 hours x 4 hours =
(24 hours) and (-) It is possible to record/play back for an extremely long time, and it is possible to play both video and audio at the same time.

[Problem that the invention seeks to solve]

Even if an analog noise removal system and non-linear digitization are used, the dynamic range, S/N,
The quality of the sound is poor in terms of distortion. Also, 31.5kHz
The sampling frequency of z is lower than the standard sampling frequency of 487 kHz for digital tape recorders using a rotary head, the sampling frequency of 44.degree. 1 kHz for compact discs, etc., and is insufficient in terms of the reproducible frequency band.

Therefore, the object of this invention is to provide a 13 mm VTR
An object of the present invention is to provide a digital information signal recording device capable of recording a higher quality PCM signal without sacrificing the advantages of the present invention.

[Means for solving problems]

In this invention, in a recording device in which digital information signals are recorded on a magnetic tape by a rotating head, one track formed on the magnetic tape is N (N: an integer).
means for performing error correction processing on each segment formed by dividing the digital information signal; a means for recording an information signal, and a means for recording a digital information signal, when the sampling frequency and number of bits of the digital information signal are respectively (a-f, ) or (b-n); , and means for recording a digital information signal subjected to error correction processing.

[Effect]

One track is divided into N, for example, 6 sections, and in these divided sections, a digital information signal, for example, an audio P.
The CM signal is subjected to error correction processing and recorded. An n-bit PCM signal with a sampling frequency of r is recorded in one section per track. PCM with sampling frequency (a-f,) or number of bits (bn)
A signal is distributed and recorded into a number of sections or b sections per track. (a=1.5) and (b
A PCM signal having a relationship of =2) is distributed and recorded into three sections per l track.

Therefore, P with a high sampling frequency and a large number of bits
CM signals can be recorded without changing the tape or head system, and high-quality PCM signals can be recorded.

(Embodiment) Hereinafter, an embodiment of the present invention will be described with reference to the drawings.This explanation will be made according to the order of the following items.

a. Overall configuration of the recording/reproducing circuit, head and tape system and track pattern C, error correction code d, 16-bit PCM signal recording/reproducing e, 16-bit PCM signal processing circuit f, modification example a, recording /Overall configuration of the reproducing circuit FIG. 1 shows the overall configuration of the recording/reproducing circuit in an embodiment of the present invention, and IA and IB indicate frame 1.
A pair of rotating heads are shown arranged with an angular spacing of 180° on a drum rotating at M wavenumbers. This rotating head IA,
A recording signal is supplied to the IB via amplifiers 11A, 11B and a rotary transformer (not shown), and the rotary node IA is supplied to the IB.

The signal reproduced from IB is sent to the rotating transformer and amplifier II.
A, 1], and B. Amplifier 11A, 1
Each of 1B is composed of a recording amplifier and a reproduction amplifier. A control pulse that controls the operation and non-operation of the amplifier IIA is generated at the output terminal 13A of the timing control circuit 12, and a pulse that controls the operation and non-operation of the amplifier 11B is generated at the output terminal 13B of the timing control circuit 12. do.

The timing control circuit 12 is supplied with an RF switching pulse from a terminal 13C. This RF switching pulse is a pulse signal synchronized with the rotational phase of the rotation IA and IB, and a control pulse controlled with the RF switching pulse as a reference is formed.

Switch circuits 14A and 14 are connected to amplifiers IIA and IIB.
B are connected respectively. The switch circuits 14A and 14B are switched depending on whether the PCM signal to be recorded is 8-bit or 16-bit. When recording/reproducing a PCM signal with a sampling frequency of 2fH (horizontal synchronization frequency -15,75kHz) and a bit count of 8 bits, that is, a PCM signal according to the 3 mm VTR standard, the switch circuit 14A and 14B both select side a. On the other hand,
When recording/reproducing a PCM signal with a sampling frequency of 3'' and a bit count of 16 bits, the switch circuit 14
Both A and 14B select b pieces.

On the a side of the switch circuits 14A and 14B, 8 mm
Switch circuit 15 configuring the VTR signal processing circuit
is connected. This switch circuit 15 is for switching between a video signal and an audio signal, and when recording/reproducing a video signal, the ■ side is selected, and when recording/reproducing an audio signal, the A side is selected. A video signal processing circuit 16 is connected to the V side of the switch circuit 15, and an audio signal processing circuit 20 is connected to the A side of the switch circuit 15. The switch circuit 15 is controlled by a control pulse generated at the output terminal 13D of the timing control circuit 12.

The video signal processing circuit 16 converts the color video signal from the input terminal 17 into a recording signal, and also converts the playback signal back into a color video signal and outputs it to the output terminal (18. The luminance signal is FM modulated, and the general color feeding signal is converted to a low carrier frequency signal.

The audio signal processing circuit 20 encodes the 8-bit PCM signal from the to/D converter 24 with an error correction code during recording, and performs time axis compression processing so that it can be recorded in the recording 9n region of the PCM signal. , and further performs biphase modulation. The A/D converter 24 has 8
Performs nonlinear quantization of bits. In addition, input terminal 2
A single audio signal is supplied to an A/D converter 24 via a low-pass filter 22 and an analog noise removal circuit 23.

During reproduction, the reproduced PCM signal is supplied to the audio signal processing circuit 20. Audio pickle processing circuit 20
Now, demodulation of biphase modulation.

Processing of time axis expansion, error detection/correction, and adjustment of uncorrectable errors is performed. Audio signal processing circuit 20
The output data is converted into an analog signal by a D/A converter 25, and a reproduced audio signal is taken out to an output terminal 27 via a noise removal circuit 23 and a low-pass filter 26.

An audio signal processing circuit 30 is connected to the b side of the switch circuits 14A and 14B. The audio signal from the input terminal 31 is passed through a low-pass filter and 32 to the A/D
It is supplied to the converter 33.

The /D converter 33 has a sampling frequency of 3f.
H (= 3 x 15.75kHz = 47.25kHz)
, performs 16-bit linear quantization.

During recording, the audio signal processing circuit 30 divides the 16-bit sample data into upper 8 bits and lower 8 bits, and encodes the error correction code in units of 8 bits.
Performs time axis compression and bi-phase anomaly processing. During playback, the audio signal processing circuit 30 performs biphase modulation demodulation, two-time axis expansion, error detection/correction, and correction of uncorrectable errors. Audio signal processing circuit 3
The output data of 0 is converted into an analog signal by the D/A converter 34 and sent to the output terminal 3 via the low-pass filter 35.
It is taken out on 6th.

The audio signal processing circuit 20 and the audio signal processing circuit 30 use the same error correction method and channel modulation method, and have the same output data transmission rate.

The video signal processing circuit 16 performs FM modulation of the audio signal and mixes it with the recorded video signal, as well as separation of the FM modulated audio signal from the reproduced signal and FM demodulation. Furthermore, processing for adding and separating signals for automatic tracking control is also performed in the video signal processing circuit 16.

b. Head, tape system and track pattern Figure 2 is as follows:
The arrangement relationship of the head and tape system in this embodiment is shown.

In Figure 2, 2 indicates a drum rotating at a frame frequency (180 Orpm in the case of NTSC), 18
The drums IA and IB are mounted on the drum 2 for rotation with an angular spacing of 0°. During rotation, the extension directions of the magnetic gaps of IA and IB are different, and the configuration is such that crosstalk from adjacent tracks can be suppressed by azimuth loss. The magnetic tape 3 with a width of 3 mm is wound diagonally around the circumferential surface of the drum 2, and the winding of the magnetic tape 13, which runs at a constant rate, is at an angle θ (-θl←
θ2) is, for example, 221° (-185° +36°)
It is said that The magnetic tape 3 is wound within the angle θ.
The range 1 is the video area, and the range θ2 where the scans of the rotary helenoid FIA and IB overlap is the PC area.
It is considered to be the M chain region.

As shown in FIG. 3, the magnetic tape 3 has alternately inclined tracks formed by rotating tracks A and IB. A PCM area 4A is formed at the starting end where the rotating head IA starts scanning the magnetic tape 3, and then a video area 5A is formed.
is formed. Similarly, by rotating head IB, P CM
Area 4B and video area 5B are formed. The windings in the video areas 5A and 5B include signals (FM modulated luminance signal, FM modulated audio signal) in the area corresponding to the angle 180°.

A pilot signal for automatic tracking control) is recorded. Audio signal processing circuit 20 in PCM areas 4A and 4B
The output signal of is recorded.

Therefore, the switch circuit 15 in FIG. 1 is controlled to select the A side during the period of scanning the PCM♂1 area 4A, 4B, and select the V side during the period of scanning the video area 5A, 5B. . The RF switching pulse supplied to the timing control circuit 12 is a signal having a rising edge or a falling edge at the timing of the boundary between the PCM areas 4A, 4B and the video areas 5A, 5B.

The 3mm VTR is designed to record/reproduce only PCM signals. In this multi-channel format, one track is divided into six, as shown in FIG. 2
The 21° wrap is within the corner, excluding the 5° section at the end.
The 216° section is divided into 36° sections. These six sections are divided into channels 1, 2, and 3 in accordance with the 11-wave order in the head scanning direction. Channel 2. . . . is called channel 6. One section consists of a data section 6 sandwiched between a run-in section 7 at the beginning and an after-record margin 8 at the end, as shown in an enlarged view of the channel 1 section in FIG. It has a configuration where it is located. RF at the boundary between channel 1 section and the next channel 2 section
A switching pulse transition occurs. PC
When recording/reproducing only the M signal, the switch circuit 15 selects the A side only in the designated channel section.

C. In the error correction code audio signal processing circuit 20, P for one field is
Encoding processing and decoding processing of error correction codes are performed in units of CM signals, that is, data recorded in the PCM areas 4A and 4B. Figure 5 shows a two-dimensional array of data, in which the data contained in each horizontal row are sequentially Q, WO, W.
l, W2. W3゜P, W4. W5. W6. It is expressed as W7. Each row contains 132 pieces of data.

Therefore, each piece of 8-bit data is arranged in a (10x132) matrix. This data includes a stereo PCM signal for one field and six pieces of data for control.

In the data array described above, each column in the vertical direction is called a block. In FIG. 5, nine pieces of data indicated by black dots form one parity code sequence containing parity data P, and ten pieces of data indicated by white dots form the other parity code series containing parity data P and Q. A parity code sequence is formed. One parity code sequence containing parity data P is formed from data contained in blocks 15 or 14 blocks apart. The other parity code series including parity data P and Q is formed from data included in blocks that are equally spaced apart by 12 blocks.6 Each data in one two-dimensional array is included in two different parity code series. .

Furthermore, a 16-bit CRC code (a type of error detection code using a cyclic code) is added to each block consisting of (Q, WO, . . . W6, W7). The presence or absence of errors in each block is detected using this CRC code. Since simple parity is used, if there is one data item in one code sequence that is determined to have an error by a CRC check, the error can be corrected. At the time of decoding, the error correction ability is improved by repeating the burr decoding.

The data that has been encoded with the error correction code is recorded in the 132nd block from the first block. A synchronization code for block synchronization and an address code indicating a program address are added to the beginning of each block. Error data that cannot be corrected by the error correction code described above is replaced by the average value of the correct data located before and after it.

In addition, the above-mentioned error correction code can be used with a PC as well as a video signal.
When recording/playing M signals, record/play only PCM signals.
This applies both to playback and to recording/playback of 16-bit PCM signals.

d, 16-bit PCM signal recording/reproduction Switch circuit 14A and 14B in Fig. 1 select side b 16-bit y
Recording/reproduction of the PCM signal is performed using the same head and tape system as shown in FIG. 2, and recording is performed based on the multi-channel format shown in FIG. 4.

That is, as shown in FIGS. 6 and 7, the magnetic tape 3 is wrapped in channels 1, 2, and 3 of each 36° in the corner. The angle θ3 corresponding to channel 2 and channel 3 is defined as PCM track 9 (referred to as track A), and similarly: 3
An angle θ4 corresponding to channel 4, channel 5 and channel 6 of 6° each is a PCM track 10 (referred to as track B). In the track pattern shown in FIG. 7, both track A and track B are on the magnetic tape 3.
is formed in a state in which it travels in the forward direction indicated by the arrow. However, if track A is formed in the forward direction,
Track B may be formed in the reverse direction, which is the opposite direction to the forward direction.

Track A or Track B has a sampling frequency of 3
At fll, one channel of a PCM signal with a quantization bit count of 16 bits is recorded. For an 8mm VTR multi-channel full-format, the sampling frequency is 2fH.
, 8-bit PCM signals are recorded in one channel section. Compared to this 8mm VTR PCM signal,
16-bit PCM (G has a sampling frequency of 1.
Since the number of bits is doubled, the amount of data is tripled. Therefore, channel 1. Channel, le 2. Track A is composed of three channels of channel 3, and three channels of channel 4. Channel 5. Track B is composed of three channels including channel 6.

When recording PCM signals on track 8 and track B, amplifiers IIA and IIB (recording amplifiers) are put into operation only at the recording timing. With reference to FIG. 8, the formation of control pulses taken out to each of the terminals 13A and 13B of the timing control circuit 12 will be described.

FIG. 8A shows the RF switching pulses being synchronized with the rotation of rotating heads IA and IB. The relationship of each channel in the multi-channel format to the RF switching pulses is as shown in FIGS. 8B and 8C. FIG. 8B shows the channels of the track scanned by one rotary head IA, and FIG. 8C shows the channels of the track scanned by the other rotary head IB. The timing at which rotary head IA scans channel 1 and the timing at which rotary head IB scans channel 6 overlap.

A control pulse shown in FIG. 8 is formed from the RF switching pulse in the timing control circuit 12, and this control pulse is taken out to the terminal 13A. Further, in the control circuit 12, a control pulse shown in FIG. 8E is formed,
This control pulse is taken out to terminal 13B. During the months when these control pulses are at a high level, amplifiers IIA and I
IB becomes operational. Therefore, amplifiers IIA and 11
B is activated when the rotating heads IA and IB scan track A.

When recording a PCM signal on track B, amplifiers IIA and IIB are controlled by control pulses shown in FIGS. 8F and 8G, respectively, formed from RF switching pulses.
is in the operating state. Therefore, channel 4. Channel 5. A PCM signal can be recorded on the tracker B consisting of the channel 6.

e, 16-bit 7-to PCM signal processing circuit 16-bit:/)P
The audio signal processing circuit 30 regarding CM signals will be explained. FIG. 9 shows the configuration of a portion of the recording processing circuit.

In FIG. 9, an analog audio signal band-limited by a low-pass filter 32 is supplied to an input terminal indicated by 41. The A/D converter 33 is supplied with a →thumping pulse of a frequency of 3f, Cf, (horizontal synchronization frequency) from the terminal 42, and the A/D converter 33
6-bit linear quantization is performed. The 16-bit output data of the A/D converter 33 is divided into upper 8 bits of data and lower 8 bits of data, and the output of this A/D converter 33 is supplied to a latch group 43.

Lunch group 43 has four latches 51.52.53.54
The upper 8 bits of data are supplied to the latch 51 and the latch 53, and the lower 8 bits of data are supplied to the latch 52 and the latch 54. The output data of launch group 43 is supplied to multiplexer 44 . Latch group 4
A controller 56 is provided to control the timing of the latches 51 to 54 and the data distribution of the multiplexer 44.

The multiplexer 44 is for distributing the output data of each latch of the latch group 43 to the encoders 46, 47, and 48. Each of the encoders 46, 47, and 48 is supplied with control pulses from terminals 56, 57, and 58 for controlling the timing of data capture and data output. The encoder 46 performs error correction encoding on the PCM data recorded in the section of one channel corresponding to the 36° winding angle using the same method as that for the 8rnm VTR described above. The error correction encoded data is time-base compressed so as to be recorded in one channel section, outputted from the encoder 46, and supplied to the pi-phase modulation circuit 49. High phase modulation circuit 4
A recording signal is taken out to the output terminal 50 of 9.

The encoder 47 encoder 48 is encoder 46
It has the same configuration as . encoder 46.47.4
8 is provided with a RAM for error correction encoding processing and time axis compression processing. The audio signal processing circuit 20 regarding the PCM signal of the 3mm VTR also includes:
One encoder and a pi-phase modulation circuit are provided.

Therefore, one of the encoders 46, 47, and 48 and the pie-phase modulation circuit 49 may have the same configuration as the audio signal processing circuit 20.

Referring to FIG. 10, a method of allocating data by the lunch group 43 and multiplexer 44 will be described.

FIG. 10A shows output data of the A/D converter 33. FIG. 10 shows Di, D2, D3. . . , each consecutive 16-bit PCM signal is shown, with the sign a being added to the upper 8 bits of data, and the sign b being added to the lower 8 bits of data. The sampling period T□ of the output data of the A/D converter 33 is (1/3 f,)
It is.

The upper 8 bits of data D1a of the first PCM signal are latched in the latch 51, and the lower 8 bits of data D1a are latched into the latch 51.
is latched by latch 52. Next data D2a is latched in latch 53, and data D2b is latched in latch 54. Such a launch operation is performed by a control pulse generated in the controller 45 in synchronization with the sampling pulse. Therefore, latch 5 of latch group 43
The respective output data of 1.52 and 53.54 change as shown in FIG. 10B.

The multiplexer 44 sequentially outputs every three pieces of output data from the launches 51, 52, and 53. That is, first,
Select the outputs of latches 51, 52, and 53, then latch 5
The multiplexer 44 operates to select the output of 4.51.52.

Also, the switching period of the multiplexer 44 is (+/
2f□), and the sampling period T5□ of the three data output from the multiplexer 44 in a row is CI/
2rn). Figure 10C is multiplexer 4
4 output data is shown. In this output data, (Dl
a, D2b, ---D8b) is supplied to the encoder 46, and (Dlb, D3a, ---D
A data series indicated by 7b) is supplied to the encoder 47, and a data series indicated by CD2a, D3b, . . . D8a) is supplied to the encoder 48. The output data of each encoder 46, 47, 48 is transmitted to the rotary head I.
The control pulses synchronized with the rotations of A and IB are used to sequentially output the signals and record them on the A track or the B track.

The output data of the A/D converter 33 is sent to the encoder 46.
47. Regarding other methods of allocating to 48, No. 11
This will be explained with reference to the figures.

FIG. 11A shows an A/D converter 3 similar to FIG. 10A.
3 shows the output data. The output data of this A/D converter 33 is written into RAM.

By controlling, for example, the read address of this RAM, the output of the A/D converter 33 is converted into the three data series shown in FIG. 11B. In other words, in the data series shown in FIG. 11A, (D2a-D1b-D1
a) Sorting is done by reading data from the RAM in the order of (D3 a-D3 b→D2 b)... As can be seen from FIG. 11B, the method for allocating the data shown in FIG.
Only the upper 8 bits of D2a, D3a, D5a, . . . are supplied to the bits. Therefore, in channel 1 of track A, only the upper 8 bits of data of the 16-bit PCM signal are recorded. 16bi7) The magnetic tape on which the PCM signal is recorded is 1J recorded with the PCM signal of the 8mm VTR standard.
Even if you mistakenly play back what is being played, you can still play the audio to a certain level and prevent abnormal sounds from occurring.

FIG. 12 shows the configuration of the reproduction system of the audio signal processing circuit 30. A reproduced PCM signal from an input terminal indicated by 61 is demodulated by a pie-phase demodulation circuit 62 and sent to a decoder 6.
3.64.65 in order. Decoder 63.64
．． 65 are supplied with control pulses synchronized with the rotation of the rotary heads IA and IB from terminals 67, 68, and 69,
When playing track A, the playback signal of the section corresponding to channel 1 is taken into the decoder 63, the playback signal of the section corresponding to channel 2 is taken into the decoder 64,
Playback No. 13 of the section corresponding to channel 3 is played by decoder 6.
It will be incorporated into 5. Similarly, when playing track B, channel 4. Reproduction signals of channels 5 and 6 are sequentially supplied to decoders 63, 64 and 65.

The decoder 63, 64, 65 decodes the error correction code 1
Performs processing such as time axis expansion and error correction.

As in the case of the recording processing circuit, the configuration of the audio signal processing circuit 20 for the 8mm VTR, one decoder, and the biphase demodulation circuit can be made common. From the decoders 63, 64, and 65, the sampling frequency "J4"
A data series of T S 2 is output.

Demultiplexer 70 includes decoders 63, 64, 65
The output data of each of the latch groups 71 and 7 81.8
2.83.84, and this distribution method is the opposite of that of the multiplexer 44 of the recording processing circuit. A controller 72 is provided to control the operation of demultiplexer 70 and latch group 71.

The corresponding 8 bits of the 8-bit data outputted from the latch 81 and the latch 83 and the lower 8-bit data outputted from the latch 82 and the latch 84 are combined to form a 16-bit PCM signal. It is said that This 16-bit PCM signal is processed by the D/A converter 34.
It is converted into an analog signal (No. 8-1), and a reproduced audio signal is obtained at the output terminal 78.

``, Modification This invention can be applied to the case of recording two PCM signals that differ only in either the number of bits or the sampling frequency.For example, when the sampling frequency is the same and the number of bits is the same, The present invention can be applied to a case where two PCM signals of 8 bits and 16 bits are recorded.In this case, only a 16 bit PCM signal is recorded in the interval of two channels.
8-bit M signal!・A method other than dividing into upper and lower (17) 8 bits each is possible.

Furthermore, the present invention can be applied to recording digital information signals other than digital audio signals.

〔Effect of the invention〕

According to this invention, in addition to recording an 8-bit PCM signal with a sampling frequency of f in one of the divided sections, a 16-bit PCM signal with a sampling frequency of 1.5 f is recorded in one of the divided sections. can be recorded in three sections. Therefore, in the case of an 8 m mV TR, the range is much wider than that for recording/playing standard audio signals.

It is possible to record/reproduce high-quality audio signals with good S/N, distortion rate, etc.

In addition, the present invention provides 1-) CM recorded in one section.
The error correction code encoding process performed on a signal-by-signal basis is common to both PCM signals. Therefore,
A part of the hardware for error correction can be shared, and the error correction ability and interpolation ability can be made the same.

[Brief explanation of drawings]

FIG. 1 is an overall block diagram of a recording/reproducing circuit according to an embodiment of the present invention, FIG. 2 is a route diagram showing the configuration of the feed/node and tape system, and FIGS. 3 and 4 are video signal and FIG. 5 is a route map showing the track pattern when recording a bit audio PCM signal and the track pattern when recording only an audio PCM signal. FIG. 5 is a route map for explaining the error correction code. FIG. 7 is a route map used to explain when recording a 16-bit one-day PCM signal, FIG. 8 is a time chart used to explain recording timing control when recording a 16-bit one-day PCM signal, and FIG. The figure is a block diagram of a recording processing circuit for a 16-bit, one-day PCM signal, and FIGS. 10 and 11 are time charts for explaining one example of processing and another example of the distribution of a 16-bit, one-day PCM signal. , FIG. 12 is a block diagram of a reproduction processing circuit for a 16-bit audio PCM signal. Explanation of main symbols in the drawings 1A, IB: rotating head, 3: magnetic tape. 4, A, 4B: PCM area, 5A, 5B: 6 video area, 6: data section, 9, 10 track A and track B, IIA, IIB: amplifier. 12: Timing control circuit; 16: Video signal processing circuit; 20: Audio signal processing circuit for 8-bit PCM signal; 30: Audio No. 13 processing circuit for 16-bit PCM signal.

Claims (1)

[Claims] In a recording device that records a digital information signal on a magnetic tape using a rotating head, an error occurs in each section obtained by dividing one track formed on the magnetic tape into N (N: an integer). means for performing a correction process; and recording the digital information signal subjected to the error correction process in one section per track when the sampling frequency and number of bits of the digital information signal are f_s and n, respectively; means, and when the sampling frequency and number of bits of the digital information signal are (a・fs) or (b・n), respectively, the above 1
A recording device for a digital information signal, comprising means for recording the digital information signal subjected to the error correction process by dividing it into a sections or b sections per track.