JPS6272130A - Vapor reaction method and vapor reaction device directly used therefor - Google Patents
Vapor reaction method and vapor reaction device directly used thereforInfo
- Publication number
- JPS6272130A JPS6272130A JP21174085A JP21174085A JPS6272130A JP S6272130 A JPS6272130 A JP S6272130A JP 21174085 A JP21174085 A JP 21174085A JP 21174085 A JP21174085 A JP 21174085A JP S6272130 A JPS6272130 A JP S6272130A
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- Japan
- Prior art keywords
- gas
- wafers
- furnace
- temperature
- reaction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、気相反応プロセス中に形成される自然酸化膜
(SiO□)に関するもので、特にデポジション前後に
形成されるSiO□膜の低減に関する。Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a natural oxide film (SiO□) formed during a gas phase reaction process, and particularly to the natural oxide film (SiO□) formed before and after deposition. Regarding reduction.
本発明は、半導体ウェハに気相反応により必要な被膜を
形成する際に、半導体ウェハを反応炉に搬入する時に炉
内奥部から酸化防止用ガスを送り、反応炉内の温度を気
相反応温度に上げて被膜を形成し、反応炉内の温度を下
降させて炉内奥部から酸化防止用ガスを流しつつ半導体
ウェハを搬出することにより、自然酸化膜の発生を抑え
たものである。In the present invention, when a necessary film is formed on a semiconductor wafer by a gas phase reaction, when the semiconductor wafer is carried into a reactor, an antioxidant gas is sent from deep inside the reactor to lower the temperature inside the reactor. The formation of a natural oxide film is suppressed by raising the temperature to form a film, lowering the temperature inside the reactor, and transporting the semiconductor wafer while flowing anti-oxidation gas from deep inside the reactor.
第3図に示される炉が従来の気相反応炉である。 The furnace shown in FIG. 3 is a conventional gas phase reactor.
石英反応管1内は排気装置5により排気される。The inside of the quartz reaction tube 1 is exhausted by an exhaust device 5.
反応管のふた3を開けて数多くのウェハをこの石英反応
管1に搬入することができる。石英反応管lはヒーター
2により気相反応温度に加熱され、その温度はウェハの
搬入、搬出そして被膜形成時においても一定に保たれる
。気相反応ガスはガス導入口4より反応管1の内部に導
入され、管内の圧力は反応ガスの流量で調節される。こ
の減圧CVD法は大口径ウェハへの堆積や大量処理に特
に有効であり、かつ膜厚や膜質の均一性にも優れた経済
性の高い方法で半導体工業では良く使用されている。A large number of wafers can be loaded into the quartz reaction tube 1 by opening the lid 3 of the reaction tube. The quartz reaction tube 1 is heated to a gas phase reaction temperature by a heater 2, and the temperature is kept constant during loading and unloading of wafers and during film formation. A gas phase reaction gas is introduced into the reaction tube 1 through the gas introduction port 4, and the pressure inside the tube is adjusted by the flow rate of the reaction gas. This low-pressure CVD method is particularly effective for deposition on large-diameter wafers and for mass processing, and is a highly economical method with excellent uniformity in film thickness and film quality, and is often used in the semiconductor industry.
LSIが微細化するにつれて、従来は問題とならなかっ
た界面の自然酸化膜の存在がサブミクロンルールでの製
造に於いては大きな問題となって来ている。As LSIs become finer, the presence of a natural oxide film at the interface, which has not been a problem in the past, has become a major problem in submicron manufacturing.
従来、LP−CVD (減圧CVD)炉は、通常横型拡
散炉を用いている。Si基板の炉への出し入れ時に自然
酸化膜(SiO□)が10〜30人形成されてしまって
いた。Conventionally, LP-CVD (low pressure CVD) furnaces typically use horizontal diffusion furnaces. 10 to 30 natural oxide films (SiO□) were formed when Si substrates were taken in and out of the furnace.
炉の構造は、第3図に示す様に均熱が十分達成される様
にしたもので、温度は常に一定値に設定されたままであ
った。The structure of the furnace was such that sufficient uniform heating was achieved, as shown in Figure 3, and the temperature was always set at a constant value.
空気のまき込みを防止する為のパージは、前のフランジ
からだったため、多少のまき込みはあり、十分な防止に
ならなかった。The purge to prevent air from getting in was from the front flange, so there was some air getting in, and the prevention was not sufficient.
また、パージは、乱流を起こしやすく、ダストや生成物
をまき上げシリコン基板を汚染しやすかった。In addition, purging tends to cause turbulence, which tends to kick up dust and products and contaminate the silicon substrate.
シリコン基板に物理、化学吸着している酸素や水が中温
(600〜800°C)でも酸化種となる。Oxygen and water that are physically or chemically adsorbed on the silicon substrate become oxidizing species even at medium temperatures (600 to 800°C).
半導体ウェハを反応炉に搬入、搬出する際に、反応炉の
奥から酸化防止用ガスを送って、自然酸化膜が発生する
のを防ぎ、反応炉をランピング可能にし、かつ冷却ガス
を流せるようにして反応炉の温度を短時間に昇降できる
ようにして上記問題点を解決した。When carrying semiconductor wafers into and out of the reactor, an anti-oxidation gas is sent from the back of the reactor to prevent the formation of a natural oxide film, to enable ramping of the reactor, and to allow cooling gas to flow. The above problem was solved by making it possible to raise and lower the temperature of the reactor in a short time.
本発明に用いる炉は断熱効果を下げ、かつ冷却ガスを流
すことにより炉を急冷することが出来るようにしたため
、被膜形成時以外には炉の温度を低くして自然酸化膜の
発生を抑えることができる。Since the furnace used in the present invention has a lower insulation effect and can be rapidly cooled by flowing cooling gas, the temperature of the furnace can be lowered except during film formation to suppress the formation of a natural oxide film. I can do it.
さらにウェハを炉に搬入・搬出する時にはパージガスを
流すことにより自然酸化膜の発生を防いでいる。Furthermore, when wafers are transported into and out of the furnace, a purge gas is flown to prevent the formation of a natural oxide film.
第1図に本発明の反応炉を示す。石英反応管1内は排気
装置により排気される。反応管1はヒーター2により加
熱され、冷却ガス導入口6より導入された冷却ガスによ
り冷却される。反応管のふた3が開かれて、ウェハ群が
反応管1に搬入される時には、パージガス導入ロアより
N2等のパージガスが管内に乱流が発生しない程度に流
されてウェハ表面上に自然発生膜が形成されることを防
ぐ。しかもウェハが反応管lに搬入される時と搬出され
る時には炉の温度は低温T、に保たれ、自然酸化膜の成
長を抑えている。本発明の反応炉は従来の炉に比較して
断熱効果を下げであるので、ランピングが容易である。FIG. 1 shows the reactor of the present invention. The inside of the quartz reaction tube 1 is exhausted by an exhaust device. The reaction tube 1 is heated by a heater 2 and cooled by cooling gas introduced from a cooling gas inlet 6. When the reaction tube lid 3 is opened and a group of wafers are carried into the reaction tube 1, a purge gas such as N2 is flowed from the purge gas introduction lower to an extent that does not cause turbulence in the tube, forming a naturally occurring film on the wafer surface. prevent the formation of Moreover, the temperature of the furnace is maintained at a low temperature T when the wafer is loaded into and unloaded from the reaction tube 1, thereby suppressing the growth of a natural oxide film. The reactor of the present invention has a lower adiabatic effect than conventional reactors, so it is easier to ramp.
前述のようにしてウェハ群の搬入が終了すると、炉内の
温度を2、連に上昇させて気相反応温度に到達させる。When the loading of the wafer group is completed as described above, the temperature inside the furnace is raised twice in succession to reach the gas phase reaction temperature.
必要時間石英反応管1をその反応温度に保って、反応ガ
ス導入口4より反応ガスを流し込んで被膜をウェハ上に
成長させる。被膜形成後、ヒーター2の温度を下げると
同時に冷却ガス導入口6より冷却ガスを流して反応管1
を温度T1に急冷却する。パージガスを導入ロアより管
内に流して反応管のふた3を開けて、ウェハ群を反応管
1から搬出する。The quartz reaction tube 1 is maintained at the reaction temperature for a required period of time, and a reaction gas is introduced from the reaction gas inlet 4 to grow a film on the wafer. After the film is formed, the temperature of the heater 2 is lowered, and at the same time cooling gas is flowed through the cooling gas inlet 6 to cool the reaction tube 1.
is rapidly cooled to temperature T1. A purge gas is flowed into the tube from the introduction lower, the lid 3 of the reaction tube is opened, and the wafer group is carried out from the reaction tube 1.
第2図には本発明の効果を示すデータが示されている。 FIG. 2 shows data showing the effects of the present invention.
5インチのCZON型ウェハ上に直径方向に5点を定め
て各製法毎の自然酸化膜の形成状況を測定したものであ
る。(d)は従来の製法によるもので、バックパージも
ランピングも採用しない時に発生する自然酸化膜を示し
ている。Five points were defined in the diametrical direction on a 5-inch CZON type wafer, and the state of natural oxide film formation for each manufacturing method was measured. (d) shows the natural oxide film produced by the conventional manufacturing method, when neither back purging nor ramping is employed.
(c)はT1を610℃にして、バンクパージは採用す
るが、ランピングは採用していない時に発生する自然酸
化膜の状況を示している。(b)はT、を420℃にし
て、バンクパージを採用して、ランピングを採用してい
ない場合である。(a)はT1を610℃、バックパー
ジ、ランピング共に採用した場合の自然酸化膜の発生状
況である。この場合には(b)に比較すると1桁以上も
自然酸化膜の発生が少な(なっていることが判る。この
ように本発明によれば従来の炉の簡単な改良で、気相反
応プロセス中Si基板界面に生じる自然酸化膜を完全に
除去することができた。(c) shows the state of a natural oxide film that occurs when T1 is set to 610° C. and bank purge is used but ramping is not used. (b) shows the case where T is set to 420° C., bank purge is employed, and ramping is not employed. (a) shows the occurrence of a natural oxide film when T1 is 610° C. and both back purging and ramping are used. In this case, it can be seen that the occurrence of natural oxide film is reduced by more than one order of magnitude compared to (b).In this way, according to the present invention, by simple improvement of the conventional furnace, the gas phase reaction process can be completed. It was possible to completely remove the natural oxide film formed at the interface of the middle Si substrate.
素子の具体的製造の面に於いても、次のような効果が認
められる。The following effects can also be observed in terms of the specific manufacturing of the device.
(i)多結晶Sjを非晶質化して、再度固相成長させる
プロセスの場合、界面に自然酸化膜が存在しないので確
実な成長が行える。(i) In the case of a process in which polycrystalline Sj is made amorphous and solid-phase growth is performed again, reliable growth can be performed because there is no natural oxide film at the interface.
(ii)多結晶Siのコンタクト抵抗のバラツキ要因で
あった自然酸化膜が除去できるので、歩留りが向上する
。(ii) Since the natural oxide film, which was a cause of variation in the contact resistance of polycrystalline Si, can be removed, the yield is improved.
(iii) 5iJ4容世の高容量化を計る時、薄膜化
しても、誘電率が下がらず、設計値どおりの値が得られ
る。(iii) When trying to increase the capacitance of 5iJ4, the dielectric constant does not decrease even if the film is made thinner, and the value as designed can be obtained.
第1図は本発明の反応炉を示す。
第2図は本発明の効果を示す図である。
第3図は従来の反応炉を示す図である。
第4図は従来の効果を示す図である。
1・・・石英反応管 2・・・ヒーター3・・・
反応管のふた 4・・・反応ガス導入口5・・・排
気装置 6・・・冷却ガス導入ロア・・・パー
ジガス導入口FIG. 1 shows a reactor according to the invention. FIG. 2 is a diagram showing the effects of the present invention. FIG. 3 is a diagram showing a conventional reactor. FIG. 4 is a diagram showing the conventional effect. 1...Quartz reaction tube 2...Heater 3...
Reaction tube lid 4...Reaction gas inlet 5...Exhaust device 6...Cooling gas introduction lower...Purge gas inlet
Claims (1)
において、 反応炉における半導体ウェハ搬入搬出口から見て炉内奥
部から、上記半導体ウェハ搬入搬出口へと酸化防止用ガ
スを送りつつ、上記半導体ウェハを上記反応炉内へ搬入
する工程と、上記反応炉内の温度を気相反応に適した温
度に上昇させ、気相反応を行う工程と、 上記反応炉内の温度を下降させ、炉内奥部から上記半導
体ウェハ搬入搬出口へと酸化防止用ガスを送りつつ、上
記半導体ウェハを炉外へ搬出する工程とからなる気相反
応方法。 2、半導体ウェハ搬入搬出口から見て炉内奥部から、上
記半導体ウェハ搬入搬出口へと酸化防止用ガスの流出口
を有する気相反応装置。[Claims] 1. In a gas phase reaction method for forming a predetermined film on a semiconductor wafer, oxidation prevention is carried out from the back of the reactor as seen from the semiconductor wafer loading/unloading port to the semiconductor wafer loading/unloading port. a step of transporting the semiconductor wafer into the reactor while supplying gas; a step of raising the temperature in the reactor to a temperature suitable for a gas phase reaction to perform a gas phase reaction; A gas phase reaction method comprising the steps of lowering the temperature of the semiconductor wafer, and transporting the semiconductor wafer out of the furnace while sending an antioxidant gas from the inner part of the furnace to the semiconductor wafer loading/unloading port. 2. A gas phase reaction device having an outlet for an antioxidant gas from the inner part of the furnace as seen from the semiconductor wafer loading/unloading port to the semiconductor wafer loading/unloading port.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21174085A JPS6272130A (en) | 1985-09-25 | 1985-09-25 | Vapor reaction method and vapor reaction device directly used therefor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21174085A JPS6272130A (en) | 1985-09-25 | 1985-09-25 | Vapor reaction method and vapor reaction device directly used therefor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6272130A true JPS6272130A (en) | 1987-04-02 |
Family
ID=16610800
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP21174085A Pending JPS6272130A (en) | 1985-09-25 | 1985-09-25 | Vapor reaction method and vapor reaction device directly used therefor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6272130A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63197328A (en) * | 1987-02-12 | 1988-08-16 | Matsushita Electric Ind Co Ltd | Formation of polycrystalline semiconductor film |
WO2022252693A1 (en) * | 2021-06-01 | 2022-12-08 | 上海晶盟硅材料有限公司 | Epitaxial growth method and equipment |
-
1985
- 1985-09-25 JP JP21174085A patent/JPS6272130A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63197328A (en) * | 1987-02-12 | 1988-08-16 | Matsushita Electric Ind Co Ltd | Formation of polycrystalline semiconductor film |
WO2022252693A1 (en) * | 2021-06-01 | 2022-12-08 | 上海晶盟硅材料有限公司 | Epitaxial growth method and equipment |
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