JPS627207A - High frequency power amplifier circuit - Google Patents

High frequency power amplifier circuit

Info

Publication number
JPS627207A
JPS627207A JP60145840A JP14584085A JPS627207A JP S627207 A JPS627207 A JP S627207A JP 60145840 A JP60145840 A JP 60145840A JP 14584085 A JP14584085 A JP 14584085A JP S627207 A JPS627207 A JP S627207A
Authority
JP
Japan
Prior art keywords
high frequency
collector
terminal
inductor
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60145840A
Other languages
Japanese (ja)
Inventor
Kazuhiro Matsuzaki
松崎 和博
Takaji Zushi
図師 隆爾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP60145840A priority Critical patent/JPS627207A/en
Publication of JPS627207A publication Critical patent/JPS627207A/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)
  • Transmitters (AREA)

Abstract

PURPOSE:To improve the stability of operation, especially at a low voltage by connecting diodes connected back-to-back in series with a collector of a high frequency transistor (TR) in parallel with an impedance matching circuit and a capacitor. CONSTITUTION:The two varactor diodes 2 are connected back-to-back in series between the collector and emitter of the high frequency TR 1 and act like the same capacitance to positive and negative high frequency signals. Inductors L36, L47 act like base and collector feeding and the inductance being over several times of the input/output impedance is selected, the inductor L4L is connected to a power terminal 11 and to the other terminal of the inductor L36 via a resistor R43 and a diode 44 is connected to the other terminal of the inductor L36 to constitute an amplifier circuit. The resistor R is used for feeding base bias from the terminal 11 and the diode 14 is used to stabilize the potential. Further, capacitors C18, C69 are placed adjacent respectively to input/output terminals 7, 9 to isolate the base from the input terminal and the collector from the output terminal in terms of DC and transmit high frequency components through them.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は高周波電力回路動作の安定及びその向上を図る
もので、無線通信機の送信段に使用する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention aims to stabilize and improve the operation of a high frequency power circuit, and is used in a transmitting stage of a wireless communication device.

〔発明の技術的背景〕[Technical background of the invention]

高周波電力増幅回路は高周波出力、効率、動作安定性な
らびに使用周波数、高周波入力更にコレクタ電圧依存性
等を勘案の上設計する。
A high-frequency power amplifier circuit is designed taking into consideration high-frequency output, efficiency, operational stability, operating frequency, high-frequency input, collector voltage dependence, etc.

この高周波電力増幅回路の応用例としては無線通信機の
送信段が知られているが、これは法律により割当てられ
た周波数以外の電波輻射を禁じている。この無線通信機
のうち、ハンディ型機種の送信段は一例として使用電源
電圧が8vならびに12.5Vテあり、出力は12.5
V テア W以上、8vで8W以上が必要である。
A known application example of this high-frequency power amplification circuit is the transmission stage of a wireless communication device, which is prohibited by law from emitting radio waves at frequencies other than those allocated to it. Among these wireless communication devices, the power supply voltage used in the transmission stage of the handheld model is 8V and 12.5V, and the output is 12.5V.
V tare W or more, 8V or more is required.

この送信段の発振に対する要求としては電源電圧が使用
電池の消耗により急低下する5V位から高出力動作時の
12.5Vまでの範囲で、かつ出力電波の80%が送信
段に戻る負荷条件でも発振しないことが挙げられており
、極めて厳しい条件と言わざるを得ない。このような条
件下での増幅器の発振は妨害電波の基となるため極力抑
制する措置がとられているのが実情である。
The requirements for the oscillation of this transmitting stage are that the power supply voltage is in the range from about 5V, which rapidly drops due to battery consumption, to 12.5V during high output operation, and even under load conditions in which 80% of the output radio waves return to the transmitting stage. It is mentioned that there should be no oscillation, which must be said to be an extremely strict condition. The reality is that measures are taken to suppress oscillation of amplifiers under such conditions as much as possible, as this becomes the source of radio interference.

第3図にハンディ型機種の送信段増幅器を示す。Figure 3 shows the transmitting stage amplifier of a handheld model.

使用する高周波トランジスタ(30)の電力増幅に必要
なインピーダンスは入力側のベースエミッタ間が約1Ω
出力側のコレクタエミッタ間が約10Ωであるのに対し
て、入力側の信号源及び出力側の負荷のインピーダンス
は50Ωである。このためにインピーダンス整合回路が
必要となりL1L2C,C,。
The impedance required for power amplification of the high frequency transistor (30) used is approximately 1Ω between base and emitter on the input side.
The impedance between the collector and emitter on the output side is about 10Ω, while the impedance of the signal source on the input side and the load on the output side is 50Ω. For this reason, an impedance matching circuit is required, L1L2C,C,.

からなる第1のインピーダンス整合回路(31)を入力
側に、又り、L、C,C,からなる第2のインピーダン
ス整合回路(32)を出力側に形成する。この第1のイ
ンピーダンス整合回路の一端は高周波トランジスタ(3
0)のベースに接続し、この整合回路と並列にベースバ
イアス給電用のインダクタL、 (33)を結線し、第
1のインピーダンス整合回路の他端は信号源(34)に
接続した入力端(35)に設けたキャパシタC工(36
)を介して接続する。高周波トランジスタのエミッタは
接地され、′そのコレクタには第2のインピーダス整合
回路(32)の一端を接続するが、高周波動作を安定さ
せるキャパシタC,(37)と並列接続する。一方、第
2のインピーダンス整合回路(32)の他端は入力側の
キャパシタ(36)に対応するキャパシタ(38)を介
して負荷(39)に接続する出力端(40)に結線する
A first impedance matching circuit (31) consisting of L, C, C is formed on the input side, and a second impedance matching circuit (32) consisting of L, C, C is formed on the output side. One end of this first impedance matching circuit is connected to a high frequency transistor (3
An inductor L, (33) for base bias power supply is connected in parallel with this matching circuit, and the other end of the first impedance matching circuit is connected to the input terminal (34) connected to the signal source (34). Capacitor C construction (36) installed in 35)
). The emitter of the high frequency transistor is grounded, and its collector is connected to one end of a second impedance matching circuit (32), which is connected in parallel with a capacitor C (37) for stabilizing high frequency operation. On the other hand, the other end of the second impedance matching circuit (32) is connected to an output end (40) connected to a load (39) via a capacitor (38) corresponding to the input side capacitor (36).

更に入力側のインダクタL 、 (33)に対応したコ
レクタ給電用インダクタL、(41)をキャパシタC0
(37)及び第2のインピーダンス整合回路(32)と
並列に高周波トランジスタ(30)のコレクタに接続す
る。
Furthermore, the input side inductor L, (33) corresponds to the collector power supply inductor L, (41) is connected to the capacitor C0.
(37) and the second impedance matching circuit (32) in parallel to the collector of the high frequency transistor (30).

入力端(35)及び出力端(40)に接続したキャパシ
タC1(36)ならびにC,(38)は高周波シランジ
スタのベースと入力端、コレクタと出力端間を直流的に
絶縁しかつ高周波成分の伝搬用キャパシタである。
Capacitors C1 (36) and C, (38) connected to the input terminal (35) and output terminal (40) provide direct current isolation between the base and input terminal, collector and output terminal of the high frequency silane resistor, and prevent the propagation of high frequency components. It is a capacitor for

尚インダクタL4(41)は電源端子Vcc(42)に
接続すると共にインダクタL 、 (33)の他端と抵
抗R(43)を介して接続し、インダクタL3(33)
の他端にはダイオード(44)を結線して増幅回路を構
成していた。
The inductor L4 (41) is connected to the power supply terminal Vcc (42), and is also connected to the other end of the inductor L (33) via the resistor R (43).
A diode (44) was connected to the other end to form an amplifier circuit.

この抵抗Rは電源端子Vcc(42)からのベースバイ
アス給電用抵抗でありダイオード(44)はその電位安
定用として機能する。
This resistor R is a resistor for supplying base bias power from the power supply terminal Vcc (42), and the diode (44) functions to stabilize its potential.

ところで、信号源(34)及び負荷(39)のインピー
ダンスは前述のように50Ωであるため、第1及び第2
の整合回路(31) (32)を構成するキャパシタ及
びインダクタは周波数特性を加味して選定され、インダ
クタL 、 (33)ならびにり、(41)は入出力イ
ンピーダンスの数倍以上の値を選ぶ。
By the way, since the impedance of the signal source (34) and the load (39) is 50Ω as mentioned above, the first and second
The capacitors and inductors constituting the matching circuits (31) and (32) are selected in consideration of frequency characteristics, and the values of the inductors L, (33), and (41) are selected to be several times the input/output impedance.

〔背景技術の問題点〕[Problems with background technology]

前述のように無線通信機送信段用増幅器に対する動作安
定性が強く要求されている6例えばコレクタ電圧が零V
から所要の出力が得られる条件まで、又この条件と出力
負荷の電圧定在波比(Voltage Standin
g Wave Ratio)が10の範囲内で全位相の
すべての組合せ条件で発振を起さないことが強く求めら
れている。
As mentioned above, operational stability is strongly required for the amplifier for the transmitting stage of wireless communication equipment.6 For example, when the collector voltage is 0 V,
to the conditions for obtaining the required output, and the voltage standing wave ratio (Voltage Standing Wave Ratio) of this condition and the output load.
It is strongly required that oscillation does not occur under all combination conditions of all phases within a range of 10 (g Wave Ratio).

第2図に示した増幅回路ではキャパシタC,(37)を
大きめに選んで低電圧における安定性を高めてきたが、
インピーダンス整合上高電圧時の出方と相反し、低電圧
時の安定性を高めるのが困鑑であり、発振防止には必ず
しも充分でなかった。
In the amplifier circuit shown in Figure 2, the capacitor C, (37) has been chosen to be large to improve stability at low voltages.
In terms of impedance matching, it is difficult to improve stability at low voltages, which is contradictory to what happens at high voltages, and it has not always been sufficient to prevent oscillation.

〔発明の目的〕[Purpose of the invention]

本発明は上記難点を除去した新規な高周波電力増幅回路
に係り、特に低電圧における安定性を高めるものである
The present invention relates to a novel high-frequency power amplifier circuit that eliminates the above-mentioned drawbacks, and particularly improves stability at low voltages.

〔発明の概要〕[Summary of the invention]

この目的を達成するために本発明に係る高周波電力増幅
回路では高周波トランジスタのコレクタにはインピータ
ンス整合回路、キャパシタに加えて順逆方向に直列接続
したダイオードを並列接続する手法を採用した。このダ
イオードとしては可変容量ダイオードを選定し特定位相
での短絡を防止する。
In order to achieve this objective, the high frequency power amplifier circuit according to the present invention employs a method in which, in addition to an impedance matching circuit and a capacitor, diodes connected in series in forward and reverse directions are connected in parallel to the collector of the high frequency transistor. A variable capacitance diode is selected as this diode to prevent a short circuit in a specific phase.

〔発明の実施例〕[Embodiments of the invention]

第1図乃至第2図により本発明を詳述する。 The present invention will be explained in detail with reference to FIGS. 1 and 2.

従来の増幅回路と相違する回路構成は前述のように高周
波トランジスタ(1)のコレクタに順逆方向を違えて直
列接続した可変容量ダイオード(A)。
The circuit configuration that differs from the conventional amplifier circuit is that, as mentioned above, the variable capacitance diode (A) is connected in series to the collector of the high frequency transistor (1) in different directions.

キャパシタ(3)及び第1のインピーダンス整合回路(
4)とを並列接続した点である。
Capacitor (3) and first impedance matching circuit (
4) are connected in parallel.

入力側に関しては従来と同様で、信号源(6)に接続し
た入力端(7)にはキャパシタC工(8)及び第2のイ
ンピーダンス整合回路(旦)の一端を接続し他端を高周
波トランジスタ(1)のベースに接続して入力側回路と
する。第1及び第2のインピーダンス整合回路(す(4
)はキャパシタ及びインダクタによって構成するが、信
号源(6)及び後述する負荷の保有するインピーダンス
50Ωと、高周波トランジスタ(1)を電力増幅するの
に必要なベース・エミツタ間約1Ω位ならびにコレクタ
・エミッタ間の約10Ωとをインピーダンス変換するた
めに周波数特性を加味して選択する。
The input side is the same as the conventional one, with one end of the capacitor (8) and the second impedance matching circuit (dan) connected to the input end (7) connected to the signal source (6), and the other end connected to the high frequency transistor. Connect it to the base of (1) and use it as an input side circuit. The first and second impedance matching circuits (4
) is composed of a capacitor and an inductor, but the impedance of the signal source (6) and the load (described later) is 50Ω, and the base-emitter distance of about 1Ω and the collector-emitter impedance required to amplify the power of the high-frequency transistor (1). In order to convert the impedance between approximately 10Ω and 10Ω, the selection is made taking into account the frequency characteristics.

尚入力回路には高周波トランジスタ(1)のベースに第
2のインピーダンス整合回路(りの他端とインダクタL
 3(6)を並列に接続する。
The input circuit includes a second impedance matching circuit (the other end of the high frequency transistor (1) and the inductor L) connected to the base of the high frequency transistor (1).
3 (6) are connected in parallel.

出力側回路としては可変容量ダイオード(刀。The output side circuit is a variable capacitance diode (sword).

キャパシタ(3)、  インダクタL 4(7)ならび
に第1のインピーダンス整合回路(幻を高周波トランジ
スタ(1)のコレクタに並列に接続し、 この第1のイ
ンピーダンス整合回路(りの他端にキャパシタC,(9
) 、出力端(9′)ならびに(10)負荷を直列に接
続する。
A capacitor (3), an inductor L4 (7) and a first impedance matching circuit (illustrated) are connected in parallel to the collector of the high frequency transistor (1), and a capacitor C, (9
), the output end (9') and the load (10) are connected in series.

可変容量ダイオード(ス)は高周波トランジスタのコレ
クタとエミッタ間に2個を使用して、しかもその順逆方
向を違えて直列接続して正負の高周波に対して同容量と
して働かせる。
Two variable capacitance diodes are used between the collector and emitter of a high frequency transistor, and they are connected in series with different forward and reverse directions so that they act as the same capacitance for positive and negative high frequencies.

インダクタL、(6)、 L、(7)はベースならびに
コレクタ給電用として動作し、入出力インピーダンスの
数倍以上の値を選定する外、L 、 (7)はVcc電
源端子(11)と接続すると共にインダクタL3(6)
の他端と抵抗R(43)を介して接続し、インダクタL
 、 (6)の他端にはダイオード(44)を結線して
増幅回路を構成する。この抵抗Rは電源端子Vcc(1
1)からのベース・バイアス給電用抵抗であり、ダイオ
ード(44)はその電位安定用である。又キャパシタC
□(8)及びC,(9)を入力端(7)ならびに出力端
(9)に隣接して設置するが、 これはベースと入力端
、コレクタと出力端間を直流的に絶縁すると共に高周波
成分を伝搬するキャパシタである。
Inductors L, (6), L, and (7) operate as base and collector power supply, and in addition to selecting a value several times higher than the input/output impedance, L and (7) are connected to the Vcc power supply terminal (11). At the same time, inductor L3 (6)
Connected to the other end via the resistor R (43), and connected to the inductor L
A diode (44) is connected to the other end of (6) to form an amplifier circuit. This resistance R is connected to the power supply terminal Vcc (1
1) is a resistance for supplying base bias power, and a diode (44) is for stabilizing its potential. Also capacitor C
□ (8), C, and (9) are installed adjacent to the input end (7) and output end (9), which provides direct current isolation between the base and input end, collector and output end, and high frequency It is a capacitor that propagates components.

〔発明の効果〕〔Effect of the invention〕

この増幅回路に組込まれた可変容量ダイオードの電圧依
存性を第2図に示した。容量はこの逆電圧V Rが12
.5Vノ場合6PF、 2.5Vテは25PFを示しこ
の可変容量ダイオードと共に高周波トランジスタのコレ
クタに並列接続したキャパシタC6(3)5PFとの和
はL2.5Vテ1lPF、 2.5Vでは30PFとな
る。
FIG. 2 shows the voltage dependence of the variable capacitance diode incorporated in this amplifier circuit. The capacity is this reverse voltage VR is 12
.. At 5V, it shows 6PF, and at 2.5V, it shows 25PF, and the sum of this variable capacitance diode and the capacitor C6(3)5PF connected in parallel to the collector of the high frequency transistor becomes 11PF at L2.5V, and 30PF at 2.5V.

ところで増幅回路に求められている特性は■出力電カフ
W以上2周波数160〜174M)IZ、  入力電力
150mW 、コレクタ電圧12.5Vであり、更に■
負荷安定性としては周波数160〜174MHz、  
入力電力50〜250mW 、コレクタ電圧O〜12.
5V更に加えて■負荷VSIIIRIOの組合わせ全部
で発振しないことである。
By the way, the characteristics required for the amplifier circuit are: ■Output power cuff W or more 2 frequencies 160-174M) IZ, input power 150mW, collector voltage 12.5V, and ■
As for load stability, the frequency is 160-174MHz,
Input power 50~250mW, collector voltage O~12.
In addition to 5V, there is no oscillation in all combinations of load VSIIIRIO.

しかし可変容量ダイオードを設置した増幅回路はこの全
組合せでも発振を起さず、出力電力が8Wでも負荷安定
性が前記の規格を満足した値を示した。
However, the amplifier circuit equipped with variable capacitance diodes did not cause oscillation even with all these combinations, and the load stability showed a value that satisfied the above-mentioned standards even when the output power was 8W.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る増幅回路の等価回路図、第2図は
縦軸に容量横軸にダイオード逆電圧VRを採り両者の関
係を示す曲線図、第3図は従来の増幅回路の等価回路図
である。 代理人  弁理士  井 上 −男 第  1  図 →じメl’2−1’ :aRfi Vl? Cv)第2
図 第3図
Fig. 1 is an equivalent circuit diagram of the amplifier circuit according to the present invention, Fig. 2 is a curve diagram showing the relationship between the capacitance on the vertical axis and the diode reverse voltage VR on the horizontal axis, and Fig. 3 is an equivalent circuit diagram of the conventional amplifier circuit. It is a circuit diagram. Agent Patent Attorney Inoue - Male 1st Figure → Jimel'2-1': aRfi Vl? Cv) 2nd
Figure 3

Claims (1)

【特許請求の範囲】[Claims] 高周波トランジスタと、一端を入力端とし他端をこの高
周波トランジスタのベースに接続する第1のインピーダ
ンス整合回路と、高周波トランジスタのコレクタに接続
する少くとも2個の可変容量ダイオードと、この可変容
量ダイオードと並列に高周波トランジスタのコレクタに
接続するキャパシタ及び第2のインピーダンス整合回路
と、この第2のインピーダンス整合回路に接続する電源
端子と、接地した高周波トランジスタのエミッタとを具
備することを特徴とする高周波電力増幅回路。
a high-frequency transistor; a first impedance matching circuit having one end as an input terminal and the other end connected to the base of the high-frequency transistor; at least two variable capacitance diodes connected to the collector of the high-frequency transistor; A high-frequency power source comprising: a capacitor and a second impedance matching circuit connected in parallel to the collector of a high-frequency transistor; a power supply terminal connected to the second impedance matching circuit; and a grounded emitter of the high-frequency transistor. Amplification circuit.
JP60145840A 1985-07-04 1985-07-04 High frequency power amplifier circuit Pending JPS627207A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60145840A JPS627207A (en) 1985-07-04 1985-07-04 High frequency power amplifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60145840A JPS627207A (en) 1985-07-04 1985-07-04 High frequency power amplifier circuit

Publications (1)

Publication Number Publication Date
JPS627207A true JPS627207A (en) 1987-01-14

Family

ID=15394318

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60145840A Pending JPS627207A (en) 1985-07-04 1985-07-04 High frequency power amplifier circuit

Country Status (1)

Country Link
JP (1) JPS627207A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02504496A (en) * 1988-06-03 1990-12-20 シエル・インターナシヨナル・リサーチ・マートスハツペイ・ベー・ヴエー Encapsulated assembly and manufacturing method thereof
JPH04292005A (en) * 1991-03-20 1992-10-16 Mitsubishi Electric Corp High frequency linear amplifier
US5661438A (en) * 1994-11-30 1997-08-26 Nec Corporation Impedance matching circuit
US7644476B2 (en) 2005-12-28 2010-01-12 Ykk Corporation Cap for button, fixing member and button

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02504496A (en) * 1988-06-03 1990-12-20 シエル・インターナシヨナル・リサーチ・マートスハツペイ・ベー・ヴエー Encapsulated assembly and manufacturing method thereof
JPH04292005A (en) * 1991-03-20 1992-10-16 Mitsubishi Electric Corp High frequency linear amplifier
US5661438A (en) * 1994-11-30 1997-08-26 Nec Corporation Impedance matching circuit
US7644476B2 (en) 2005-12-28 2010-01-12 Ykk Corporation Cap for button, fixing member and button

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