JPS6269688A - Semiconductor photodetector - Google Patents

Abstract

PURPOSE:To obtain a P-I-N photodiode with excellent controllability and mass- producibility and providing cost reduction by eliminating special consideration for an epitaxial growth furnace which is used for obtaining a high purity layer. CONSTITUTION:First, an N<+> type InP buffer layer 2 with carrier concentration of 1X10<18>cm<-3> and an In0.53Ga0.47As layer 3 with carrier concentration of 2.5X10<16>cm<-3> are made to grow to the thickness of 3mum by hydride vapor phase epitaxial growth. If carrier concentration is this measure, special consideration for a growth furnace is not necessary. Mg ions are selectively implanted into the surface of the epitaxial substrate and annealing is performed after a PSG protecting film is applied. At that time, a P<+> type region 4 is formed near the surface and a P-I-N type carrier profile can be obtained. The photodetector is completed by providing a protecting and reflection preventing film 6, positive side electrodes 7 and a negative side electrode 8 on the surface of the device, on the P<+> type region 5 and on the backside of the substrate 1 respectively.

Description

[Detailed description of the invention] [Technical field of invention] The present invention relates to a compound semiconductor light receiving element.

[Technical background of the invention and its problems]

As a semiconductor photodetector with high sensitivity and high speed response, p”-p
Photodiodes having carrier concentration distributions of -n+ type, p+, and -n+ type are known.

Although the p-type high-resistance light-absorbing region is not exactly a 1-ntrinsic region in the case of a compound semiconductor, it will be generically referred to as an i-region here according to convention. Said 1
In order to sufficiently extend the depletion layer and obtain high-speed response, the carrier concentration in the region is usually set at 20°C (hereinafter, it is assumed that the temperature is 20°C).
The following are selected.

Conventionally, the one region has been formed by vapor phase or liquid phase epitaxial growth. Below, p''-1 shown in Figure 2
A conventional manufacturing method and its problems will be explained using an example of a -n+ type foot diode. First, n-type 1nP substrate 2
i K n-type InP by7y layer 22゜nl (carrier concentration 5 x 10'"an") In□, 53
A 0a0.47A5 light absorption layer (3 to 5 μm thick) 23 is epitaxially grown in sequence. Next, a suitable mask is attached to the surface and Od is selectively diffused into a part of the light absorption layer 23.
A p10 region 24 is formed. In addition to this, an anti-reflection coating 26, which also serves as an 8iNx Patzibaige carbon film, is made using the OVD method.
By adding a side electrode 27 and an n-side electrode 28, the photodiode shown in FIG. 2 is formed.

However, in order to epitaxially grow a high-purity layer with a carrier concentration of 1.times.10.sup.16 cIL.sup.3 or less, baking in a growth furnace for a long time is required regardless of whether the layer is in the gas phase or the liquid phase. In addition, it is necessary to purchase extra materials and select ones with high purity, or to use them after purification.
This caused an increase in production costs. Further sp”
−? In the furnace used for epitaxial growth of the high concentration layer of n+, residual impurities in the furnace make it difficult to grow one layer with good control, so the high purity layer and the high concentration layer are continuously grown in the same furnace. Growing up is difficult. This also becomes an obstacle in producing composite optical semiconductor devices such as opto-electronic integrated circuits (OEIO). As mentioned above, the carrier concentration l
The conventional method of forming a high-purity layer of Xl0"cm' or less by epitaxial growth has problems in terms of productivity, mass production, and price-7 flexibility.

[Purpose of the invention]

This invention was made in view of the above-mentioned problems, and it is a pin-type photodiode that eliminates the need for special consideration for an epitaxial growth furnace to obtain a high-purity layer, has excellent controllability and mass production, and is low-cost. , the purpose is to provide a manufacturing method thereof.

[Summary of the invention]

It is known that when a certain type of impurity is ion-implanted into a t-V group compound semiconductor and heat treated under appropriate conditions, a two-step concentration profile can be obtained. In Figure 3, In
The results of secondary ion mass spectrometry (SIMS) for Mg are shown for a sample in which 10117 Mg ions were implanted at a P K of 250 KeV, a 5INx film was attached, and cap annealed (heat treated) at 750° C. for 30 minutes. (J, D,
0berstar et al. Journal of Elec
Trochemical 5ociety Vol.1
29 No. 6 (1982) pm), 1320-1
325) A concentration plateau with a thickness of about IIIm is formed between the two stages. Impurities introduced by ion implantation are not necessarily activated by 100% even if heat treatment is performed, but the inventors found that most of the Mg in the flat concentration area was activated from C-■ measurements and withstand voltage measurements. It was found that it became an acceptor. Furthermore, it has been found that depending on the heat treatment conditions, the thickness of the flat concentration portion can be made to be llxrL or more. If the pigeon acceptor concentration NA in the dog concentration flat part and the background concentration Nr1 before ion implantation are made to be approximately equal, the net carrier concentration in that region will be a low value of INmu-Nllll due to the compensation effect. . Of course, if the sMg concentration is not completely flat, part of the region may become an n-region and the other part may become a p-region.

The present invention applies the above-mentioned effects to a compound semiconductor light-receiving element having a pin-type carrier concentration profile. By implanting impurity ions and diffusing and activating them by heat treatment, a second conductivity type region is formed near the surface, and a concentration flat region in which the impurity concentration hardly changes over a thickness of 0.8 μm or more is formed in the depths of the second conductivity type region. A flat part is formed, and an activated impurity concentration N (or Nl) and a background impurity concentration ND (or N) are set in at least a part of the flat part with a thickness of 0.8 μm or more. If they match within a tolerance of ±50%, the net carrier concentration must be 50 degrees or less of the carrier concentration before ion implantation, and lXl0
cm or less, pi
This is a semiconductor light-receiving element having an n-type carrier concentration group C17 isle.

〔Effect of the invention〕

Since the device of the present invention does not require epitaxial growth of a high-purity layer, it eliminates the need for high-temperature, long-term baking in an epitaxial growth furnace, which was necessary for conventional devices, and the productivity is significantly higher than that of conventional devices. improve. Also,
Since there is no need to select or purify materials, productivity can be improved and costs can be reduced. Furthermore, complex integration of pin photodiodes and other elements that require the growth of p-soil layers or n-soil layers, such as semiconductor lasers, light emitting diodes, and hetero-bipolar transistors, is also possible due to the continuation of p+/n+ layers and i-layers. It becomes easier because there is no growth.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to FIG.

First, the carrier concentration lXl018c is applied to the n+I nP substrate 1.
m'' n+-1nP buffer layer 2 and carrier concentration 2.5
X1016α I no, s a G a 0.4
7 A 8 layers 3 are grown to a thickness of 3 μm by hydride vapor phase epitaxial growth. If the carrier concentration is at this level, no special consideration is required for the growth reactor.

Mg ions were selectively applied to this epitaxial growth substrate from the surface at a dose of 2×10 at an acceleration voltage of 240 keV.
Inject about ♂. Next, apply a PSG protective film and heat to 750℃.
Anneal for 15 minutes. At this time, the area near the surface is 1
The cod region 4 has a concentration of ~2×10 18 cIrL−3, but the Mg flat portion 5 has an acceptor concentration of approximately 2.
Since OX 10 crrL is obtained, the compensation carrier concentration remains n-type and decreases by 5.0×10 crILK, resulting in a pfn-type carrier profile as shown in FIG. 4.

A protective film/antireflection film 5 and a p+ region 5 are provided on the surface of this element.
The p-side electrode 7 is on the top, and the n1lIli [pole 8
By forming this, the device shown in FIG. 1 is completed.

According to this method, the carrier concentration of the epitaxially grown layer is 2.5×10 cm, a value that can be sufficiently achieved under the conditions of normal growth furnace use.
This eliminates the need for special considerations such as material purification, greatly improving productivity and reducing costs.

In this embodiment, Mg is used as an example of the impurity to be ion-implanted, but the impurity is not limited to Mg as long as it meets the spirit set forth in the claims.

In addition, the types of IV group compound semiconductors include InP and In
o, 53Ga0.47ASK, but not limited to.

[Brief explanation of drawings]

Fig. 1 is a cross-sectional view of an embodiment of the present invention, Fig. 2 is a cross-sectional view of a conventional example, Fig. 3 is a diagram showing a concentration profile in InP that has been ion-implanted with Mg and heat treated, and Fig. 4 is a cross-sectional view of an embodiment of the present invention. It is a figure which shows the depth direction carrier concentration profile of Example. 1 and 21...n"InP substrate, 2 and 22...
・n+InP buffer layer, 3...n InGaAs layer (carrier concentration 2.5X10 "cm"), 4...
Mg ion implantation n+ region, 5... n- light absorption region by Mg ion implantation, 23-n InGaAs light absorption layer (carrier concentration 5 x 10"cWL"), 24
・P region by Od diffusion, 6 and 26...protective film and antireflection film, 7 and 27...p electrode, 8 and 2
8...n electrode.

Claims (3)

[Claims] (1) Ion implantation of second conductivity type impurities into the first conductivity type region of the III-V compound semiconductor substrate followed by a subsequent heat treatment process creates a second conductivity type region near the west side of the surface and a second conductivity type region deep therein. A high resistance region having a thickness of 0.8 μm or more and having a carrier concentration of 50% or less of the carrier concentration before ion implantation and 1×10^1^6 cm^-^3 or less regardless of its conductivity type. What is claimed is: 1. A semiconductor light-receiving element characterized in that the high-resistance region is formed as a main light-absorbing region. (2) The semiconductor light-receiving device according to claim 1, wherein the first conductivity type is n-type and the second conductivity type impurity is magnesium. (3) The III-V compound semiconductor substrate is InP epitaxially grown on an InP substrate, or III-V compound semiconductor substrate epitaxially grown on an InP substrate.
The semiconductor light-receiving device according to claim 1, characterized in that it is a group V compound semiconductor mixed crystal.