JPS6269545A - Spiral inductor - Google Patents

Spiral inductor

Info

Publication number
JPS6269545A
JPS6269545A JP20950785A JP20950785A JPS6269545A JP S6269545 A JPS6269545 A JP S6269545A JP 20950785 A JP20950785 A JP 20950785A JP 20950785 A JP20950785 A JP 20950785A JP S6269545 A JPS6269545 A JP S6269545A
Authority
JP
Japan
Prior art keywords
conductor
winding
insulating layer
semiconductor substrate
groove
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20950785A
Other languages
Japanese (ja)
Inventor
Michio Kotani
小谷 三千男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP20950785A priority Critical patent/JPS6269545A/en
Publication of JPS6269545A publication Critical patent/JPS6269545A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate

Abstract

PURPOSE:To flatten the providing part of an intersected taking-out conductor and to prevent the occurrence of wire breakdown, at on intersecting part where the conductor is taken out of the inner terminal of a winding part, by providing a recess part in a semiconductor substrate, and burying a winding-part conductor in then recess part. CONSTITUTION:In the surface of a semiconductor substrate 1 at an intersecting part of a winding-part conductor 2 and a taking-out part conductor 3, a groove 5 is formed. In the groove 5, the winding-part conductor 2 is buried and an insulating layer 4 is buried on the conductor 2. The surface of the insulating layer 4 substantially agrees with the surface of the substrate 1. Therefore, a step part is not yielded on the taking-out conductor 3, which is formed on the layer 4, and wire breakdown and the increase in resistance are avoided. When the groove 5 is made shallow and the insulating layer 4 is made thick, the stray capacitance between the winding-part conductor 2 and the taking-out part conductor can be reduced with flatness being maintained.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、半導体回路装置において、半導体基板−F
−、IC形成される超高周波用スパイラルインダクタに
関するものである。
[Detailed Description of the Invention] [Industrial Application Field] The present invention provides a semiconductor circuit device in which a semiconductor substrate-F
- This relates to an ultra-high frequency spiral inductor formed in an IC.

〔従来の技術〕[Conventional technology]

@4図(a)a従来のスパイラルインダクタの構成例を
示す平面図、同図(b)け図(a)の19’B−■B線
での拡大断面図である。図において、filは半導体基
板、(2)は巻線部導体、(3)は巻線部導体(21の
内側端部を外部へ取り出す交差取り出し部導体、14)
灯上記交差部において巻線部導体(2)と敗り出し部導
体(3)とを絶縁するために低誘電率のポリイミド樹脂
または絶縁性半導体からなる絶縁層である。
@4 Figure (a) A is a plan view showing an example of the configuration of a conventional spiral inductor, and Figure (b) is an enlarged sectional view taken along line 19'B---B in Figure (a). In the figure, fil is a semiconductor substrate, (2) is a winding part conductor, and (3) is a winding part conductor (a cross-takeout part conductor for taking out the inner end of 21 to the outside, 14).
An insulating layer made of a polyimide resin with a low dielectric constant or an insulating semiconductor is used to insulate the winding part conductor (2) and the leading part conductor (3) at the intersection of the lamp.

第4図(a)、 (b)に示すようなスパイラルインダ
クタは、半導体基板iII上に、全面金属蒸着した後、
光露光法により微細パターン線w!Tを形成して構成す
るが、その時、信Ji+取り出し部導体(3;と巻線部
導体(21との間は低誘電率絶縁層(4)で絶縁する必
要がある。超高周波スパイラルインダクタでは、その導
体幅が数)tmから10fim、導体金属厚が数戸m前
後、絶RFRI+)の厚さがl声m前後の値をもつ。従
って信号面り出し部導体(3)け、巻線部導体(2(の
厚さと絶縁層(41の厚さとの和の高さの段差を越して
配線する必要がある。
The spiral inductor as shown in FIGS. 4(a) and 4(b) is manufactured by depositing metal on the entire surface of the semiconductor substrate
Fine pattern lines created by light exposure method! At this time, it is necessary to insulate between the wire conductor (3) and the winding conductor (21) with a low dielectric constant insulating layer (4). , the conductor width is several tm to 10fim, the conductor metal thickness is around several meters, and the absolute RFRI+) thickness is around lm. Therefore, it is necessary to wire the signal surface exposed part conductor (3) over a height difference equal to the sum of the thickness of the winding part conductor (2) and the thickness of the insulating layer (41).

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

第4 F4 (a)、 (b)に示すような従来のスパ
イラルインダクタの構成で汀、巻線部導体(2)の厚さ
とその上の絶縁層141の厚さとの和の段差を越して微
細な取り出し部導体(3)を形成するので、例えば表皮
抵抗を減らすために巻線部導体(2)の厚さを厚くした
り、また、取り出し部導体(3)と巻線部導体(2)と
の間の浮遊容量を少な(するために絶縁層(4)を厚(
したり、更に、スパイラルターン数を増加し1こすした
場合、段差が大き(なり、取り出し部導体(3)の断線
又は線路抵抗の増加の原因と々る問題点があった。
4th F4 In the conventional spiral inductor configuration as shown in (a) and (b), the microscopic structure is created by exceeding the step of the sum of the thickness of the winding conductor (2) and the thickness of the insulating layer 141 thereon. Therefore, for example, the thickness of the winding part conductor (2) may be increased to reduce the skin resistance, or the winding part conductor (3) and the winding part conductor (2) may be made thicker to reduce the skin resistance. To reduce the stray capacitance between the insulating layer (4) and
Furthermore, when the number of spiral turns is increased to 1, there is a problem that the level difference becomes large, which may cause disconnection of the lead-out conductor (3) or increase in line resistance.

この発明は上述のような問題点を解消するためになさ−
hr=もので、巻線部の内側端部から外側へ取り出す交
差取り出し部導体に段差部を生ぜしめず、断線、線路抵
抗の増大のないスパイラルインダクタ′J&−得ること
を目的とする。
This invention was made to solve the above problems.
To obtain a spiral inductor 'J&-, which does not produce a step part in a cross-takeout conductor taken out from an inner end of a winding part to the outside, and is free from wire breakage and increase in line resistance.

〔rIII題点を解決するための手段〕この発明に係る
スパイラルインダクタに巻線部導体と取り出し部導体と
の交差部において、巻線部導体とその上の絶縁層とを半
導体基板に設けた凹部の中に埋め込み、半導体基板の表
面と絶縁層の上面とを実質的に同一平面にしたものであ
る。
[Means for solving problem rIII] In the spiral inductor according to the present invention, a concave portion is provided in the semiconductor substrate where the winding part conductor and the insulating layer thereon are provided at the intersection of the winding part conductor and the take-out part conductor. The surface of the semiconductor substrate and the top surface of the insulating layer are substantially flush with each other.

〔作用〕[Effect]

この発明におけるスパイラルインダクタは巻線部導体と
取り出し部導体との交差部において巻線部導体とその上
の絶縁層とを半導体基板に設けた四部の中IC埋め込み
取り出し部導体の通る面を平坦にしたので、断線、線路
抵抗の増大は避けられる。
In the spiral inductor of this invention, at the intersection of the winding part conductor and the take-out part conductor, the winding part conductor and the insulating layer thereon are provided on the semiconductor substrate, and the surface through which the IC embedding part conductor passes is flattened. Therefore, wire breakage and increase in line resistance can be avoided.

〔実施例〕〔Example〕

第1図(a)nこの発明の一実施例によるスパイラルイ
ンダクタの構成を示す平面図、第1図(b)及び(c)
けそわぞh 471.1図(a)のTB−IB線及び■
a−(a線での断面図で、前述の従来例と同−符Ji+
汀同等部分を示し、説明の重複を避ける。図において、
(61け巻線部導体(21と取り出し部導体(3)との
交差部の半導体基板(1)の表面に形成されたグループ
状溝で、巻線部導体(21及びその上の絶縁層(4)が
、この溝(5)内に埋め込まハ、絶縁層(4)の上面は
半導体基板f11の表面と実質的6ご一致している。従
って、その上に形成される取り出し部導体131 tl
j段差が生じることがなく、断線、抵抗の増大が避けら
hる。更にグループ状の溝(6)を深くして絶縁層14
)を厚くすわば平坦性を保ちつつ1巻線部導体+21 
& ffり出し部導体(3)との間の浮遊容it?小さ
くすることができる。
Figures 1(a) and 1(b) and (c) are plan views showing the configuration of a spiral inductor according to an embodiment of the present invention.
471.1 The TB-IB line in Figure (a) and ■
a- (A cross-sectional view taken along line a, with the same symbol Ji+ as in the conventional example described above.
Show equivalent parts and avoid duplication of explanation. In the figure,
(A group-shaped groove formed on the surface of the semiconductor substrate (1) at the intersection of the winding part conductor (21) and the take-out part conductor (3). 4) is buried in this groove (5), and the upper surface of the insulating layer (4) substantially coincides with the surface of the semiconductor substrate f11.Therefore, the lead-out conductor 131 tl formed thereon
j There is no difference in level, and wire breakage and increase in resistance can be avoided. The group-shaped grooves (6) are further deepened to form the insulating layer 14.
) is made thicker to maintain flatness while increasing the conductor of the 1st winding +21
& ff Stray capacitance between it and the protruding conductor (3)? Can be made smaller.

@2図及び第3図はそれぞhこの発明の他の実施例及び
ヴ−こ伸の実施例ICついて導体交差部の構成を示す断
面図で、第1図の実施例におけるグループ状溝(6)の
代りに、第2図の実施例のように2段形状溝(6)、ま
1こけ、@3図の実施例のように逆三角形断面形状溝(
7)を用いても同様の効果が得らhる。
Figures 2 and 3 are cross-sectional views showing the structure of the conductor intersections of another embodiment of the present invention and an embodiment of Vuko Shin's IC, respectively. 6) can be replaced with a two-step groove (6) as in the embodiment shown in Fig. 2, a round groove (6), and an inverted triangular cross-section groove (6) as in the embodiment shown in Fig. 3.
A similar effect can be obtained by using 7).

〔発明の効果] 以上説明したように、この発明に係るスパイラルインダ
クタでは、巻線部の内側端子から外側へ導体をとり出す
交差部において、半導体基板に凹部f設は巻線部導体及
びその上の絶縁層を凹部に埋め込んだので交差取り出し
導体の2111部位を平坦番こすることができ、断線の
発生、抵抗の増大を防止することができる。更に、上記
効果を保ちつつ絶縁層を厚くすることによって交差部の
浮遊容量も少な(することができる。
[Effects of the Invention] As explained above, in the spiral inductor according to the present invention, the recess f is formed in the semiconductor substrate at the intersection where the conductor is taken out from the inner terminal of the winding part to the outside. Since the insulating layer is embedded in the concave portion, the 2111 portion of the cross-output conductor can be flattened, and occurrence of disconnection and increase in resistance can be prevented. Furthermore, by increasing the thickness of the insulating layer while maintaining the above effects, the stray capacitance at the intersection can be reduced.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a) nこの発明の一実施例によるスパイラル
インダクタの構成を示す平面図、第1図(b)及び(c
)fjそhぞ−hfFJ1図(a)のIB−IB線及び
lo−70線での拡大断面図、第2図及び第3図けそh
ぞhこの発明の411!の実施例及び更に他の実施例に
ついて、導体交差部の構成を示す断面図、第4図(al
け従来のスパイラルインダクタの構1i112. ?示
す平面図、第4図(b) ij gK4図(allの■
B−■B線での拡大断面図である。 図において、(11け半導体基板、(2)は巻線部導体
、(3)け取り出し部導体、+411/′i絶縁層、(
6)け凹部(グループ状溝)、(6)は四部(2段形状
溝)、+71灯四部(逆三角形断面形状溝)である。 なお、図中向−符Ji+け同一またけ相当部分を示す。
Fig. 1(a) n A plan view showing the configuration of a spiral inductor according to an embodiment of the present invention, Fig. 1(b) and (c)
)fj sohzo-hfFJ1 Enlarged sectional view taken along the IB-IB line and lo-70 line in Figure (a), Figures 2 and 3
411 of this invention! FIG. 4 (al.
Structure of conventional spiral inductor 1i112. ? Plan view shown in Fig. 4(b) ij gK4 (■ in all
It is an enlarged cross-sectional view taken along the line B-■B. In the figure, (11 semiconductor substrates, (2) winding part conductors, (3) take-out part conductors, +411/'i insulating layer, (
6) Concave part (group groove), (6) has four parts (two-step groove), +71 light four parts (groove with inverted triangular cross section). Note that in the figure, the minus sign Ji+ indicates a portion corresponding to the same straddle.

Claims (1)

【特許請求の範囲】[Claims] (1)半導体基板上に形成され平面状の巻線部と、この
巻線部の内側端部を外側へ取り出すために上記巻線部の
導体と立体交差する取り出し部とを有するものにおいて
、上記交差部の上記巻線部導体及びその上に設けられ上
記取り出し部の導体との間を絶縁する絶縁層とを上記半
導体基板の表面に形成された凹部に埋め込み、上記絶縁
層の上面と上記半導体基板の表面とが実質的に同一平面
になるようにしたことを特徴とするスパイラルインダク
タ。
(1) A device having a planar winding portion formed on a semiconductor substrate and a take-out portion that intersects the conductor of the winding portion three-dimensionally in order to take out the inner end of the winding portion to the outside. The winding portion conductor at the crossing portion and an insulating layer provided thereon to insulate between the conductor at the take-out portion are embedded in a recess formed on the surface of the semiconductor substrate, and the upper surface of the insulating layer and the semiconductor A spiral inductor characterized in that the surface of a substrate is substantially flush with the surface of a substrate.
JP20950785A 1985-09-20 1985-09-20 Spiral inductor Pending JPS6269545A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20950785A JPS6269545A (en) 1985-09-20 1985-09-20 Spiral inductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20950785A JPS6269545A (en) 1985-09-20 1985-09-20 Spiral inductor

Publications (1)

Publication Number Publication Date
JPS6269545A true JPS6269545A (en) 1987-03-30

Family

ID=16573943

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20950785A Pending JPS6269545A (en) 1985-09-20 1985-09-20 Spiral inductor

Country Status (1)

Country Link
JP (1) JPS6269545A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5886394A (en) * 1996-12-30 1999-03-23 U.S. Philips Corporation Device comprising an integrated coil
US6455915B1 (en) * 2000-05-30 2002-09-24 Programmable Silicon Solutions Integrated inductive circuits

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5886394A (en) * 1996-12-30 1999-03-23 U.S. Philips Corporation Device comprising an integrated coil
US6455915B1 (en) * 2000-05-30 2002-09-24 Programmable Silicon Solutions Integrated inductive circuits

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