JPS6265487A - Resistor for cryogenic circuit and manufacture of the same - Google Patents

Resistor for cryogenic circuit and manufacture of the same

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Publication number
JPS6265487A
JPS6265487A JP60204528A JP20452885A JPS6265487A JP S6265487 A JPS6265487 A JP S6265487A JP 60204528 A JP60204528 A JP 60204528A JP 20452885 A JP20452885 A JP 20452885A JP S6265487 A JPS6265487 A JP S6265487A
Authority
JP
Japan
Prior art keywords
film
resistor
monx
resistance
resistive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60204528A
Other languages
Japanese (ja)
Other versions
JPH0325034B2 (en
Inventor
Yoshinobu Taruya
良信 樽谷
Shinichiro Yano
振一郎 矢野
Yuji Hatano
雄治 波多野
Mikio Hirano
幹夫 平野
Hiroyuki Mori
博之 森
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
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Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP60204528A priority Critical patent/JPS6265487A/en
Publication of JPS6265487A publication Critical patent/JPS6265487A/en
Publication of JPH0325034B2 publication Critical patent/JPH0325034B2/ja
Granted legal-status Critical Current

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  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To obtain a resistor which has excellent durability and heat resistant properties, is free from characteristics degradation caused by aging and provides required resistance value by a method wherein crystalline (single-crystalline or polycrystalline) insulating material or semiconductor such as Al2O3, SiO2 or MgO, whose thermal conductivity at the temperature of liquid helium is 1W/cm.K, which is equal to that of metallic material, is employed to improve heat conduction properties by lattice vibration at a low temperature. CONSTITUTION:An Nb film 2 for magnetic shield is formed on a silicon wafer 1, which is not subjected to heat oxidization, and patterned by etching with CF4 gas to form a magnetic shielding film. Then an Si film 3 for layer insulation is formed by heat vaporization by an electron beam gun under the vacuum degree of higher than 10<-5>Pa and an MoNX film 4 is formed on it by sputtering and a resist pattern as a resistance film is formed by exposure. After the part of the MoNX film which is not coated with the resist is removed by ion etching with an Ar beam, the resist on the MoNX film is removed by acetone. If the sheet resistance formed like this is measured under the temperature of liquid helium, the deviation of the sheet resistance of the MoNX film with the width wider than 3mum is within 5% and, if the length is changed with the same width, contact resistance between the MoNX film and the Nb wiring film is 0.1OMEGA or less so that this film can be employed as a thin film for resistance of a superconductor integrated circuit.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は低温回路用抵抗に係り、特に液体ヘリウム温度
(4,2K)あるいは液体ヘリウム温度近傍の低温で動
作させる超電導スイッチング回路の高集積化に好適な低
温回路用抵抗およびその製進方法に関する。
[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a resistor for low-temperature circuits, and is particularly applicable to highly integrated superconducting switching circuits that operate at liquid helium temperature (4,2 K) or at a low temperature near the liquid helium temperature. The present invention relates to a suitable resistor for low temperature circuits and a method for manufacturing the same.

〔発明の背景〕[Background of the invention]

従来のジョセフソン集積回路にはpb金合金配線電極と
したジョセフソン接合が用いられて来た。
Conventional Josephson integrated circuits have used Josephson junctions with pb gold alloy wiring electrodes.

したがって抵抗膜もこれに適合した材料が使用された。Therefore, a material compatible with this was also used for the resistive film.

とくに文献[ジョセフソン集積回路用Au1n2抵抗膜
の性質」シー・ジェー・キルヒヤー、IBMジャーナル
・オブ・リサーチ・アンド・ディベロップメン8,24
巻235頁。
In particular, the literature [Properties of Au1n2 resistive film for Josephson integrated circuits] CJ Kircher, IBM Journal of Research and Development 8, 24
Volume 235 pages.

1980年(” P roperties of Au
 I n 2Resistors for Josep
hgon IntagratedCircuits” 
 C,J   Kircher  and  S、に、
Lahiri。
1980 ("Properties of Au
I n 2Resistors for Josep
hgon Integrated Circuits”
C., J. Kircher and S.,
Lahiri.

I BM、J、Res、Develop、 Vol、2
4 、 p 2351980)に詳しく述べられている
ようにAu1n2合金が抵抗膜として研究され、かつp
b金合金配線電極としたジョセフソン集積回路に用いら
れた。しかしながら、耐久性と信頼性に優れたNbを配
線電極としたジョセフソン集積回路の抵抗膜には、Nb
を配線電極としたジョセフソン接合と同じく、高融点金
属で特性の経時変化のない材料を用いることが望ましい
IBM, J, Res, Develop, Vol, 2
4, p. 2351980), Au1n2 alloy has been studied as a resistive film, and p.
b Used in Josephson integrated circuits with gold alloy wiring electrodes. However, the resistance film of the Josephson integrated circuit uses Nb as the wiring electrode, which has excellent durability and reliability.
As with the Josephson junction using wire electrodes, it is desirable to use a material with a high melting point and whose characteristics do not change over time.

一方ジョセフソン集積回路に用いられる抵抗膜に対して
解決するべき技術的課題として発熱の問題がある。すな
わち、ジョセフソン集積回路における発熱の主要部分は
抵抗膜からのものである。
On the other hand, a technical problem to be solved regarding the resistive film used in Josephson integrated circuits is the problem of heat generation. That is, the main portion of heat generated in the Josephson integrated circuit comes from the resistive film.

抵抗膜に接してジョセフソンスイッチング素子等が配置
されている場合、抵抗からの発熱により、抵抗膜および
ジョセフソン接合を含む周辺の温度が上昇する。ジョセ
フソン接合は構成される超電導膜の臨界温度(klOK
)によって動作温度限界が規定され、とくに臨界温度近
傍においては接合特性の一温度依存性が著しい、たとえ
ばNbを電極膜とするジョセフソン接合の場合、4.2
KからのIKの温度上昇によってジョセフソン電流は約
10%減少する。このようなスイッチング素子の温度ゆ
らぎによる特性変化は回路全体の動作余裕の低下をもた
らし、ひいてはスイッチング速度あるいは演算速度等の
減少を引起す、この問題を解決するためには、スイッチ
ング素子を抵抗膜より十分に離れた位置に配置するか、
あるいは放熱効率のすぐれた抵抗構造にし、温度上昇を
阻止する方法が考えられる。集積度の高密度化を考慮し
た場合、抵抗膜とスイッチング素子を腫れた位置に配置
することは妥当ではない。
When a Josephson switching element or the like is placed in contact with a resistive film, heat generated from the resistor increases the temperature around the resistive film and the Josephson junction. A Josephson junction is a superconducting film whose critical temperature (klOK
), the operating temperature limit is defined by
An increase in temperature of IK from K reduces the Josephson current by about 10%. Changes in the characteristics of switching elements due to temperature fluctuations lead to a decrease in the operating margin of the entire circuit, which in turn causes a decrease in switching speed or calculation speed. Place it at a sufficient distance, or
Another possible method is to use a resistor structure with excellent heat dissipation efficiency to prevent temperature rise. When considering higher integration density, it is not appropriate to arrange the resistive film and the switching element in a swollen position.

〔発明の目的〕[Purpose of the invention]

本発明の目的は低温で動作させる集積回路に用いられる
抵抗に関して、放熱効率のすぐれた抵抗構造を与えると
ともに、Nbを配線電極としたジョセフソン集積回路に
用いるのに好適であり、耐久性と耐熱性に優れ、特性の
経時変化が無く、かつ所望する値の抵抗膜を得ることが
可能な低温回路用抵抗およびその製造方法を提供するこ
とにある。
The purpose of the present invention is to provide a resistor structure with excellent heat dissipation efficiency regarding a resistor used in an integrated circuit operated at low temperature, and to provide a resistor structure suitable for use in a Josephson integrated circuit with Nb wiring electrodes, which has durability and heat resistance. The object of the present invention is to provide a resistor for a low-temperature circuit and a method for manufacturing the same, which can obtain a resistive film with excellent properties, no change in characteristics over time, and a desired value.

〔発明の概要〕[Summary of the invention]

上記目的達成のために、本発明においては、抵抗膜の下
地材料あるいは保護膜として、従来の非晶質絶縁膜に代
えて、単結晶あるいは多結晶質の半導体あるいは絶縁体
とする。このような材料として、液体ヘリウム温度にお
ける熱伝導度がIW/C1l・Kで金属材料に匹敵する
An20.結晶、あるいはこれと同等の熱伝導度を有す
るSi結晶、Si0g結晶あるいはMgO結晶が適して
いる。これ等結晶性(単結晶あるいは多結晶)の絶縁物
あるいは半導体を用いる理由は、低温において格子振動
による熱伝導性を高めるためである。
To achieve the above object, in the present invention, a single crystal or polycrystalline semiconductor or insulator is used as a base material or a protective film for a resistive film instead of a conventional amorphous insulating film. As such a material, An20. Si crystal, SiOg crystal, or MgO crystal having thermal conductivity equivalent to Si crystal is suitable. The reason for using these crystalline (single crystal or polycrystalline) insulators or semiconductors is to improve thermal conductivity due to lattice vibration at low temperatures.

抵抗膜としては窒素を不純物として含んだ体心立方晶型
結晶構造のMO膜を抵抗膜として用いる。
As the resistive film, an MO film having a body-centered cubic crystal structure containing nitrogen as an impurity is used as the resistive film.

所望するシート抵抗を得るために、MO膜に含まれる窒
素の濃度は1at%以上でかつ30at、%以内である
とする。さらに膜厚として50nm以上でかつ500n
m以下であるとする。そして、該抵抗膜をNbを配線電
極としたジョセフソン集積回路の抵抗として用いるため
、本発明はその製造工程を、該窒素を含むMO膜を絶縁
膜である上記半導体あるいは絶縁体上に形成する工程、
該MO膜上に抵抗膜としてのレジストパターンを形成す
る工程、該レジストパターンに覆われていないM。
In order to obtain a desired sheet resistance, the concentration of nitrogen contained in the MO film is assumed to be 1 at.% or more and within 30 at.%. Furthermore, the film thickness is 50 nm or more and 500 nm.
Suppose that it is less than or equal to m. In order to use the resistive film as a resistor of a Josephson integrated circuit using Nb as a wiring electrode, the present invention includes a manufacturing process in which the nitrogen-containing MO film is formed on the semiconductor or insulator which is an insulating film. process,
A step of forming a resist pattern as a resistive film on the MO film, M not covered by the resist pattern.

膜を除去する工程、前記抵抗膜用レジストパターンを除
去後リフトオフ法によりMo膜中央部に上記半導体ある
いは絶縁体の中から選ばれた保護膜を形成する工程、前
記Mo膜両端部に配線電極であるNb膜を形成する工程
とから成る。
a step of removing the film, a step of forming a protective film selected from the semiconductor or insulator at the center of the Mo film by a lift-off method after removing the resist pattern for the resistive film, and a step of forming wiring electrodes on both ends of the Mo film. It consists of a step of forming a certain Nb film.

〔発明の実施例〕[Embodiments of the invention]

以下本発明を実施例にもとづいて述べる。窒素を不純物
として含んだMo抵抗膜はスパッタ法により形成した。
The present invention will be described below based on examples. The Mo resistance film containing nitrogen as an impurity was formed by sputtering.

すなわち、直径2インチの熱酸化シリコンウェハ上に、
直流マグネトロンスパッタ法により窒素を不純物として
含んだMo膜の堆積を行った。以下窒素を不純物として
含んだMo膜をMoNX膜として印す、スパッタはAr
と窒素の混合ガス中で行い、全圧を0.5 P aとし
た。
That is, on a thermally oxidized silicon wafer with a diameter of 2 inches,
A Mo film containing nitrogen as an impurity was deposited by direct current magnetron sputtering. Hereinafter, the Mo film containing nitrogen as an impurity will be referred to as the MoNX film, and the sputtering was performed using Ar.
The test was carried out in a mixed gas of nitrogen and nitrogen, and the total pressure was set to 0.5 Pa.

MoNx膜の堆積速度は1.7nm/sとし、基板温度
は室温とした。MON!膜の堆積膜厚は1100nとし
た0以上の条件下で作製したM o N X膜の抵抗率
を調べたところ、MoNX膜中の窒素濃度1〜30at
%の組成範囲において、液体ヘリウム温度でO9lμΩ
mから0.22μΩmまでの抵抗率が得られた(第1図
参照)、なお、この値より高い窒素を含むMoNz膜に
関しては、液体ヘリウム温度において超電導性を示した
。電子線回折測定を行った結果によれば、窒素濃度30
at%までのMONX膜は純Moと同じく、体心立方晶
型結晶構造を示した。液体ヘリウム温度で超電導性を示
したMoNX膜は面心立方晶型結晶構造を示し、Mo2
Nとして知られている相と対応した。
The deposition rate of the MoNx film was 1.7 nm/s, and the substrate temperature was room temperature. MON! When we investigated the resistivity of the M o N
% composition range, O9lμΩ at liquid helium temperature
Resistivities ranging from m to 0.22 μΩm were obtained (see FIG. 1); however, MoNz films containing nitrogen higher than this value exhibited superconductivity at liquid helium temperatures. According to the results of electron diffraction measurements, the nitrogen concentration was 30
The MONX film up to at% exhibited a body-centered cubic crystal structure, similar to pure Mo. The MoNX film that showed superconductivity at liquid helium temperature showed a face-centered cubic crystal structure, and the Mo2
It corresponded to the phase known as N.

以上のごとく、膜厚1100nのMoNX膜は窒素濃度
1at%から30at%までの組成範囲において、抵抗
率が0.1μΩmから0.22μΩmまで変化するので
、1Ω/口から2.2Ω/口までのシート抵抗が得られ
た。従って、膜厚を50nmから500nmの範囲で調
節することにより、4.5Ω/口から0.2Ω/口まで
、すなわち約20倍の範囲でシート抵抗が可変となった
As mentioned above, the resistivity of the MoNX film with a film thickness of 1100 nm changes from 0.1 μΩm to 0.22 μΩm in the composition range from 1 at% to 30 at% nitrogen concentration, so the resistivity changes from 1Ω/hole to 2.2Ω/hole. Sheet resistance was obtained. Therefore, by adjusting the film thickness in the range of 50 nm to 500 nm, the sheet resistance was made variable from 4.5 Ω/hole to 0.2 Ω/hole, that is, in a range of about 20 times.

つぎに集積回路中の抵抗構造および抵抗作製の実施例に
ついて第2図をもとに述べる。熱酸化を施さないシリコ
ンウェハ1上に磁気遮蔽用のNb膜2を200nmの厚
みに形成した。このNb膜をCF4ガスを用いた反応性
イオンエツチング法によりパターン形成を行い磁気遮蔽
膜とした。つぎに眉間絶縁用のSi膜3を300nmの
厚さに形成した。このSi膜は真空度10−’Pa以上
の高真空中において電子ビーム銃による加熱蒸発を行う
ことにより形成した++ S i膜の結晶性を向上させ
るために、Si膜無蒸着時基板温度は200〜300℃
に保ったm S i膜のパターン形成はCF4ガスを用
いた反応性イオンエツチングにより行った。なお、CF
4ガスを用いた場合、Si膜に対してサイドエツチング
の存在する場合があるが、この層間絶縁膜に対して寸法
精度が要求されないのでとくに問題を生じない、なおS
i膜は本来半導体であるが、ここで形成したSi膜の膜
厚方向抵抗値は液体ヘリウム温度において10901以
上の抵抗率を示した。したがって漏れ電流の問題は皆無
である。Si層間絶縁膜上に膜厚1100nのMoNx
膜4をスパッタ法により形成した。光学的な露光法によ
り、抵抗膜としてのレジストパターンを形成した。つぎ
に、Arビームによるイオンエツチング法により、Mo
NX膜のレジストに覆われていない部分を除去した。そ
の後、MoNX上のレジストをアセトンにより除去した
IIMONX膜の抵抗膜としての長さを規定するために
、膜厚180nmのSi膜3′をMoNz膜の中央部に
形成し、MONX膜の両端部は配線膜との接続のために
露出させた。
Next, a resistor structure in an integrated circuit and an example of resistor fabrication will be described based on FIG. An Nb film 2 for magnetic shielding was formed to a thickness of 200 nm on a silicon wafer 1 that was not subjected to thermal oxidation. This Nb film was patterned by reactive ion etching using CF4 gas to form a magnetic shielding film. Next, a Si film 3 for insulation between the eyebrows was formed to a thickness of 300 nm. This Si film was formed by thermal evaporation using an electron beam gun in a high vacuum of 10-'Pa or higher.++ In order to improve the crystallinity of the Si film, the substrate temperature when the Si film was not deposited was 200°C. ~300℃
Patterning of the m Si film maintained at 100 nm was performed by reactive ion etching using CF4 gas. In addition, CF
When using 4 gases, there may be side etching of the Si film, but this does not cause any particular problem because dimensional accuracy is not required for this interlayer insulating film.
Although the i film is originally a semiconductor, the thickness direction resistance value of the Si film formed here showed a resistivity of 10901 or more at liquid helium temperature. Therefore, there is no problem of leakage current. MoNx with a thickness of 1100n on the Si interlayer insulating film
Film 4 was formed by sputtering. A resist pattern as a resistive film was formed using an optical exposure method. Next, using an ion etching method using an Ar beam, Mo
The portion of the NX film not covered by the resist was removed. After that, in order to define the length of the IIMONX film, which is obtained by removing the resist on the MoNX with acetone, as a resistive film, a Si film 3' with a thickness of 180 nm is formed in the center of the MoNz film, and both ends of the MONX film are It was exposed for connection with the wiring film.

Si膜3′は電子ビーム銃を用いた真空蒸着法により形
成した。Si膜無蒸着時基板温度は200〜300℃と
し、真空度は10−’Pa以上とした。この条件下で形
成したSi膜は多結晶体であった。Si膜のパターン形
成にはArビームによるイオンエツチング法を用いた。
The Si film 3' was formed by vacuum evaporation using an electron beam gun. When no Si film was deposited, the substrate temperature was 200 to 300°C, and the degree of vacuum was 10-'Pa or higher. The Si film formed under these conditions was polycrystalline. Ion etching using an Ar beam was used to pattern the Si film.

さらに膜厚200nmのNb膜2′をスパッタ法により
形成した。形成したNb膜はCF4ガスを用いた反応性
イオンエツチング法によりパターン形成を行い、配線膜
とした。
Further, an Nb film 2' having a thickness of 200 nm was formed by sputtering. The formed Nb film was patterned by reactive ion etching using CF4 gas to form a wiring film.

以上の方法により形成した第2図のごとき抵抗のシート
抵抗を液体ヘリウム温度において測定した。この結果に
よれば、幅3μm以上のM o N X膜において、シ
ート抵抗膜の分布は5%以内であった。同一幅で長さを
変えたM o N X膜の抵抗膜を測定した結果によれ
ば、MoNX膜とNb1ii!線膜とのコンタクト抵抗
は0.1Ωあるいはこれ以下であった。これらの結果か
ら本発明のMoNxはNbを配線電極として用いた超電
導集積回路の抵抗薄膜として使用可能であった。
The sheet resistance of the resistor shown in FIG. 2 formed by the above method was measured at liquid helium temperature. According to this result, in the M o N X film having a width of 3 μm or more, the distribution of the sheet resistance film was within 5%. According to the results of measuring resistive films of M o N The contact resistance with the wire film was 0.1Ω or less. From these results, the MoNx of the present invention could be used as a resistive thin film of a superconducting integrated circuit using Nb as a wiring electrode.

なお、膜厚50nm以下のMONX膜は膜厚の制御精度
の点から抵抗値の再現性が低下した。膜厚500nm以
上のMoNX膜の場合、エツチングの選択比の点から加
工上の困芝を生じた。下地膜に影響をおよぼすことなく
加工できるMON!膜の膜厚は500nm以内であった
。すなわちArのイオンビームによってMoNX膜の加
工を行う場合、MoNX膜のエツチングレートは下地で
あるSiのエツチングレートとほぼ等しい、よって、ウ
ェハ内でのエツチングの均一度が10%であるので、下
地のオーバーエツチングを50nm以内に留めるために
はMoNz膜の膜厚を500 rhm以内にする必要が
あった。
Note that the reproducibility of the resistance value of the MONX film with a film thickness of 50 nm or less decreased from the viewpoint of film thickness control accuracy. In the case of a MoNX film with a film thickness of 500 nm or more, processing difficulties occurred in terms of etching selectivity. MON allows processing without affecting the underlying film! The film thickness was within 500 nm. In other words, when processing a MoNX film with an Ar ion beam, the etching rate of the MoNX film is approximately equal to the etching rate of the underlying Si.Therefore, since the etching uniformity within the wafer is 10%, the etching rate of the underlying Si is approximately equal to the etching rate of the underlying Si. In order to keep the overetching within 50 nm, the thickness of the MoNz film had to be within 500 rhm.

本構造になる抵抗の放熱特性については以下の通りであ
った。下部電極をNbN膜、上部電極をpb合金膜とす
るジョセフソン接合のギャップ電圧等の特性変化と基板
上の任意の点における温度変化を対応づけた。抵抗から
20μmの距離を置いて温度変化検出用ジョセフソン接
合を配置した。
The heat dissipation characteristics of the resistor with this structure were as follows. Changes in characteristics such as the gap voltage of a Josephson junction in which the lower electrode is a NbN film and the upper electrode is a PB alloy film are correlated with temperature changes at arbitrary points on the substrate. A Josephson junction for temperature change detection was placed at a distance of 20 μm from the resistor.

本構造になる抵抗において50W/aJの電力を加えた
とき、ジョセフソン接合で検出された温度上昇は0.2
に以下であった。なお、従来型構造である下地層間絶縁
膜および抵抗保護膜をともにSi膜膜とした場合、同一
条件下における温度上昇は0.4にであった。したがっ
て1本実施例になる抵抗構造においては従来構造と比べ
て十分な放熱効果を有していることになる。なお、下地
層間絶縁膜および抵抗保護膜として結晶性S 102 
+AQ2o、あるいはMgOを用いた場合も同様の放熱
効果を有した。
When applying a power of 50 W/aJ to a resistor with this structure, the temperature rise detected at the Josephson junction was 0.2
was below. In addition, when the base interlayer insulating film and the resistive protection film of the conventional structure were both made of Si films, the temperature increase under the same conditions was 0.4. Therefore, the resistor structure according to this embodiment has a sufficient heat dissipation effect compared to the conventional structure. Note that crystalline S102 is used as the underlying interlayer insulating film and the resistance protective film.
+AQ2o or MgO had a similar heat dissipation effect.

本実施例により得られた効果を以下に示す。The effects obtained by this example are shown below.

(1)幅3μm、長さ18回mのMoNX膜のチップ内
抵抗分布は5%以内であった。
(1) The resistance distribution within the chip of the MoNX film with a width of 3 μm and a length of 18 times was within 5%.

(2)作製したMoNz抵抗膜を大気中で200℃、5
時間の加熱処理を施したが、抵抗膜の変化は3%以内で
あった。さらに、MoN X抵抗膜に室温と液体ヘリウ
ム温度間で10回の熱サイクルを経験させたが、抵抗膜
の変化は皆無であった。
(2) The prepared MoNz resistive film was exposed to air at 200°C for 5
Although heat treatment was performed for several hours, the change in the resistance film was within 3%. Furthermore, the MoN X resistive film was subjected to 10 thermal cycles between room temperature and liquid helium temperature, but there was no change in the resistive film.

(3)下地膜および抵抗保護膜としてSi膜を用いた抵
抗構造とした場合、抵抗膜周辺における温度上昇の割合
は非晶5j S i O19を用いた場合の1/2以下
となった。
(3) In the case of a resistance structure using a Si film as a base film and a resistance protection film, the rate of temperature rise around the resistance film was less than 1/2 of that in the case of using amorphous 5j Si O19.

なお、本実施例において用いたSi膜等の抵抗膜下地材
あるいは保護膜が有効であるためにはMoN)c膜等の
高融点材料を抵抗膜として用いる必要がある。これは次
の理由による。すなわち、Si膜等の結晶性を高めるた
めには膜形成時基板温度を高くする必要があり、MON
K膜は200〜300℃の熱処理に対して、結晶組織あ
るいは抵抗特性の変化が無視できる程度に僅少であると
ともに、Si膜、5i02膜等との拡散反応も皆無であ
るからである。
Note that in order for the resistive film base material or protective film such as the Si film used in this example to be effective, it is necessary to use a high melting point material such as a MoN)c film as the resistive film. This is due to the following reason. In other words, in order to improve the crystallinity of a Si film, etc., it is necessary to raise the substrate temperature during film formation, and the MON
This is because the K film exhibits negligible changes in crystal structure or resistance characteristics when subjected to heat treatment at 200 to 300°C, and there is no diffusion reaction with the Si film, 5i02 film, etc.

〔発明の効果〕〔Effect of the invention〕

以上実施例において述べたごとく、本発明によれば、以
下の効果を有する。
As described above in the embodiments, the present invention has the following effects.

(1)結晶性SiあるいはAI2Al22O31等を抵
抗膜の下地材料あるいは保護膜として用いた抵抗構造に
おいては、同一の発熱に対して、従来のSi膜膜を用い
る場合と比較して、抵抗周辺における温度上昇が1/2
以下となった。このことにより、チップ上に集積化でき
る密度は従来の2倍以上となった。
(1) In a resistor structure using crystalline Si or AI2Al22O31, etc. as the base material or protective film for the resistor film, the temperature around the resistor is higher than that in the case of using a conventional Si film for the same amount of heat generation. The rise is 1/2
It became the following. As a result, the density that can be integrated on a chip has become more than twice that of the conventional technology.

(2)  MoN X抵抗膜は、4.5Ω/口から0.
2Ω/口までの広い範囲のシート抵抗特性を有し、超電
導スイッチング回路中の薄膜抵抗として必要なlΩ/口
近傍のシート抵抗を包含する。
(2) MoN
It has sheet resistance characteristics in a wide range up to 2Ω/hole, and includes sheet resistances around 1Ω/hole, which are necessary as thin film resistors in superconducting switching circuits.

(3)  MONX抵抗膜はNbを配線電極として用い
たジョセフソン集積回路および、集積回路プロセスに適
用でき、微細化が可能である。     −また、配線
膜とのコンタクト抵抗が0.1Ω以下であり、かつ同一
寸法の抵抗値分布は5%以内である。
(3) The MONX resistive film can be applied to Josephson integrated circuits using Nb as wiring electrodes and integrated circuit processes, and can be miniaturized. - Also, the contact resistance with the wiring film is 0.1Ω or less, and the resistance value distribution for the same dimensions is within 5%.

(4)  MoNx膜は200℃までの加熱、および室
温と液体ヘリウム温度間の熱サイクルに対して特性の変
化は3%以内である。
(4) The properties of the MoNx film change within 3% when heated up to 200° C. and thermal cycled between room temperature and liquid helium temperature.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はMON!膜の室温および液体ヘリウム温度にお
ける抵抗率の窒素濃度依存性を示す図、第2図(a)は
本発明に係る抵抗の上面図、第2図(b)はそのA−A
線断面図である。 l・・・・・・Siウェハ、2.2’・・・・・・Nb
膜、3.3′・・・・・・Si膜、4・・・・・・Mo
Nx膜。
Figure 1 is MON! A diagram showing the dependence of resistivity on nitrogen concentration at room temperature and liquid helium temperature of a film, FIG. 2(a) is a top view of the resistor according to the present invention, and FIG. 2(b) is its A-A
FIG. l...Si wafer, 2.2'...Nb
Film, 3.3'...Si film, 4...Mo
Nx film.

Claims (1)

【特許請求の範囲】 1、半導体あるいは絶縁体よりなる下地膜、抵抗膜、お
よび半導体あるいは絶縁体よりなる抵抗保護膜より構成
され、かつ前記下地膜および抵抗保護膜の少なくともい
ずれか一者が単結晶又は多結晶の結晶性を有することを
特徴とする低温回路用抵抗。 2、特許請求の範囲第1項記載の低温回路用抵抗におい
て、前記半導体あるいは絶縁体がSi結晶、Al_2O
_3結晶、SiO_2結晶あるいはMgO結晶より選ば
れた材料であることを特徴とする低温回路用抵抗。 3、特許請求の範囲第1項記載の低温回路用抵抗におい
て、前記抵抗膜が、膜中の成分として窒素を1at%以
上30at%以内の範囲で含む体心立方晶型結晶構造の
Moを主体とし、膜厚が50nm以上500nm以下で
あることを特徴とする低温回路用抵抗。 4、膜中の成分として窒素を1at%以上30at%以
内の範囲で含む体心立方晶型結晶構造のMo膜を、膜厚
が50nm以上500nm以下となるように、単結晶あ
るいは多結晶の結晶性を有する半導体あるいは絶縁体上
に形成する工程、該Mo膜上に抵抗膜としてのレジスト
パターンを形成する工程、該レジストパターンに覆われ
ていないMo膜を除去する工程、前記抵抗膜用レジスト
パターン除去後リフトオフ法によりMo膜中央部に前記
半導体あるいは絶縁体よりなる保護膜を形成する工程、
前記Mo膜両端部に配線電極であるNb膜を形成する工
程を有することを特徴とする低温回路用抵抗の製造方法
[Scope of Claims] 1. Consisting of a base film made of a semiconductor or an insulator, a resistive film, and a resistive protective film made of a semiconductor or an insulator, and at least one of the base film and the resistive protective film is a single film. A resistor for low temperature circuits characterized by having crystalline or polycrystalline crystallinity. 2. In the low temperature circuit resistor according to claim 1, the semiconductor or insulator is Si crystal, Al_2O
A resistor for low-temperature circuits characterized by being made of a material selected from _3 crystal, SiO_2 crystal, or MgO crystal. 3. The resistor for a low temperature circuit according to claim 1, wherein the resistive film is mainly composed of Mo having a body-centered cubic crystal structure containing nitrogen as a component in the film in a range of 1 at% to 30 at%. A resistor for a low temperature circuit, characterized in that the film thickness is 50 nm or more and 500 nm or less. 4. A Mo film with a body-centered cubic crystal structure containing nitrogen in the range of 1 at% to 30 at% as a component in the film is coated with single crystal or polycrystalline crystal so that the film thickness is 50 nm to 500 nm. a step of forming a resist pattern as a resistive film on the Mo film, a step of removing the Mo film not covered by the resist pattern, a resist pattern for the resistive film. forming a protective film made of the semiconductor or insulator at the center of the Mo film by a lift-off method after removal;
A method for manufacturing a resistor for a low temperature circuit, comprising the step of forming a Nb film serving as a wiring electrode on both ends of the Mo film.
JP60204528A 1985-09-18 1985-09-18 Resistor for cryogenic circuit and manufacture of the same Granted JPS6265487A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60204528A JPS6265487A (en) 1985-09-18 1985-09-18 Resistor for cryogenic circuit and manufacture of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60204528A JPS6265487A (en) 1985-09-18 1985-09-18 Resistor for cryogenic circuit and manufacture of the same

Publications (2)

Publication Number Publication Date
JPS6265487A true JPS6265487A (en) 1987-03-24
JPH0325034B2 JPH0325034B2 (en) 1991-04-04

Family

ID=16492027

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60204528A Granted JPS6265487A (en) 1985-09-18 1985-09-18 Resistor for cryogenic circuit and manufacture of the same

Country Status (1)

Country Link
JP (1) JPS6265487A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5979584A (en) * 1982-10-29 1984-05-08 Hitachi Ltd Resistor fot josephson integrated circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5979584A (en) * 1982-10-29 1984-05-08 Hitachi Ltd Resistor fot josephson integrated circuit

Also Published As

Publication number Publication date
JPH0325034B2 (en) 1991-04-04

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