JPS6261171A - Bit map memory control circuit - Google Patents

Abstract

PURPOSE:To improve the processing speed of graphic rotation or the like by using a direct storage accessing circuit for reading/writing bit data from/in a bit map memory in a direct storage access mode. CONSTITUTION:The direct storage accessing circuit 4 reads out/writes bit data from/in the bit map memory 2 in the direct storage access mode. Although data in a source area are written in a destination area in each line by a vector generating circuit similarly to an ordinary example, a main control part 1 only sets up a parameter relating to the destination area and a parameter relating to the source area in the vector generating circuit 3 and the direct storage accessing circuit 4 respectively. Processing for reading out data from the bit map memory 2 and writing the data in the circuit 3 is executed by the circuit 4 and processing for writing the data in the bit map memory 2 is executed by the circuit 3 independently of a main control circuit 1. Consequently, the rotational movement of the image can be executed within a short period.

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] A control circuit for a bitmap memory used, for example, as an image memory of an image processing device.

A device that aims to shorten the processing speed of rotation of one figure by using a direct memory access circuit that reads and writes bit data to and from a bitmap memory in a direct memory access mode.

[Industrial application field]

The present invention relates to a bitmap memory control circuit.

Bitmap memory uses bit data arranged on two-dimensional coordinates, such as image data (image data) in which one image is a collection of points (pixels) and each point is represented by one bit, for example, and bit data is mapped to the two-dimensional coordinates. It is a memory that stores data in units, and is used as the image memory of two image processing devices or the refresh memory (refresh buffer) of display devices.

For example, in an image processing apparatus, a process such as rotating a part of a given image of a certain size, for example, at right angles and moving it to another location, is performed.

This process develops the image to be processed into a bitmap memory memory, reads part of the image using the bitmap memory control circuit, and writes it to a predetermined location while rotating it on two-dimensional coordinates. It is done as.

However, since two-image data is two-dimensionally spread data, there is a large amount of data, and processing tends to take time.

At this time, it is an important technical issue for the bitmap memory control circuit to be able to rotate nine images in a short time.

[Conventional technology]

FIG. 4 is a block diagram of a conventional example.

(2) is a main control circuit that is composed of, for example, a microprocessor (MPt+) and is in charge of overall control.

2 is a bitmap memory that stores bit data arranged on two-dimensional coordinates in units of bits in correspondence with the two-dimensional coordinates;

3 is a vector generator that generates bit data and each bit address for drawing a vector on the bit map memory 2 based on the given bit string data and the starting point address and ending point address on the bit map memory 2; It is a circuit.

The vector generation circuit 3 includes an address generation unit (BADG) 31 that generates an address for each bit (consisting of an X address and a Y address) on the B-7 memory 2.
．． and vias) data registers (R
eg, ) 32.

For example, in FIG. 5, bitmap memo IJ 2
The process of rotating the image data in the upper rectangular area ■ by 90 degrees counterclockwise and writing it into another rectangular area ■ is as follows.

This is done as follows.

1. The main control unit 1 reads the data of the l-th line parallel to the X coordinate axis of the rectangular area (3).

Il, main control circuit 1 to vector generation circuit 3;

The data of the first line read earlier, as well as.

The bit address of the starting point P and the bit address of the ending point Q on the bit map memory 2 where this is to be written are set.

11! , one line of data given from the main control circuit 1 is set in the data register 32, and the bit addresses of the start point P and the end point Q are respectively set in registers (not shown) of the address generation section 31, and are set in the data register 32. The set data of the first line is sent to the address generator 3.
Bit by bit is written into the bitmap memory 2 by the X address and Y address where 1 is generated.

1v, data is read and written for each line in the same manner as (2).

[Problem that the invention seeks to solve]

In the above conventional example, when rotating bit data in a large area, the main control circuit 1 reads the bit string data, and sends the read bit string data and parameters such as start and end points addresses to the vector generation circuit 3. Therefore, there is a problem in that it takes a long time to rotate and move a rectangular area on the bitmap memory 2.

That is, one object of the present invention is to rotate a rectangular area on a bitmap memory at high speed.

[Means for solving problems]

FIG. 1 is a diagram showing the principle of the present invention, and the same reference numerals as those in the conventional example in FIG. 4 refer to the same objects, so a description thereof will be omitted. others.

Reference numeral 4 denotes a direct memory access circuit that reads and writes bit data to and from the bitmap memory 2 in a direct memory access mode.

[Effect]

In the present invention, data in the source area is written line by line into the destination area by the vector generation circuit 3, as in the conventional example. 2 for the direct memory access circuit 4, respectively. Parameters related to the destination area (bit address of the starting point on pin 1 to map memory 2, data length for one line, vector direction).

And parameters related to the source area (bit address of the start point of one line of p1-column data on bitmap memory 2, data length of one line and number of lines)
Just set the .

Further, the process of reading data from the bitmap memory 2 and writing it into the vector generation circuit 3 is carried out by the direct memory access circuit 4, and the process of writing this data into the bitmap memory is carried out by the vector generation circuit 3. 1 does not intervene.

Therefore, the two images can be rotated in a short time.

〔Example〕

FIG. 2 is a configuration diagram of the embodiment.

The direct memory access circuit 4 uses parameters related to the source area given from the main control circuit 1, that is, the bit address of the starting point of one line of data on the bitmap memory 2, the data length of one line, and the number of lines. and an address generating section 41. which generates a read address.
It is composed of a register 42 that stores data read from the bitmap memory 2, and a control section 43.

Data is read and written in units of words.

The vector generation circuit 3 requests the direct memory access circuit 4 to transmit data using a request signal (Req), stores the received data in parallel in the register 32, and then stores the received data bit by bit on the bitmap memo I72. When writing is completed, a request signal is used to request transmission of the next data, and the data is written to the bitmap memory 2 in the same manner.

The direct memory access circuit 4 reads data for one word from the bitmap memory 2 in parallel and stores it in the register 42 when a wait signal (Wait) is not issued from the control unit 33 on the vector generation circuit 3 side. However, when a request signal is sent from the control section 33 of the vector generation circuit 3, it is sent to the vector generation circuit 3.

Note that 5 is a path control circuit, and the bit address generated by the bit address generation section 31 of the vector generation circuit 3, for example, an address expressed as a two-dimensional xy coordinate of 12 bits, and the actual address in the bit map memory. It performs matching with the word address to be used (for example, 20 bits) and matching the bit data sent from the vector generation circuit 3 with the word data used in the bitmap memory 2 and the direct memory access circuit 4. .

In the above description, data is read and written in units of words. Therefore, as shown in FIG. 3, the boundaries of the source regions in the line direction coincide with the boundaries of the words.

However, by adding a two-word length register and a shift circuit to the direct memory access circuit 4, the boundary of the source area can also be provided in the middle of a word.

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to reduce the intervention of the main controller in rotationally moving data in a rectangular area on a bitmap memory, thereby increasing processing speed.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the principle of the present invention. Figure 2 is a configuration diagram 2 of the embodiment. FIG. 3 is an explanatory diagram of the embodiment. FIG. 4 is a block diagram of a conventional example. FIG. 5 is an explanatory diagram of a conventional example. In the figure. 1 is the main control device. 2 is bitmap memory. 3 is a vector generation circuit. Angry Goto

Claims (1)

[Claims] A bitmap memory that stores bit data arranged on two-dimensional coordinates in bit units in correspondence with the two-dimensional coordinates.
2) and the given bit string data and bitmap memory (2)
a vector generation circuit (3) that generates bit data and respective bit addresses for drawing a vector on the bitmap memory (2) based on the above start point address and end point address; and a bitmap memory (2). 1. A bitmap memory control circuit comprising: a direct memory access circuit (4) that performs read/write control of bit data between the direct memory access mode and the direct memory access mode.