JPS6260001A - Digital process controller - Google Patents

Abstract

PURPOSE:To eliminate the loss of stored data completely by using a programmable ROM which is erasable and rewritable electrically as a memory for down-load storage. CONSTITUTION:When a control program, etc., is loaded from the host computer of a central control room through a down communication line and a bus 6, a microprocessor 1 receives data and stores it in the electrically erasable and rewritable programmable ROM, i.e. EE.PROM 4 directly or after storing it a working area memory 3 temporarily. In this case, the data are stored in the EE.PROM 4 under the control of software through a memory erasing/ writing control circuit 5 with write data and a write command from the system bus 6. Therefore, the loss of stored data caused because of the necessity of a battery backup is eliminated completely.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application This invention relates to a digital process controller, and particularly to a digital process controller having a memory feature.

(1) Conventional technology A digital process controller using a microcomputer includes a microprocessor 1 and a ROM 2 as a memory for storing programs for execution, as shown in Figure 2.
, RAM3 as a work area memory, and C-MOS-RA that stores and holds download data such as process flow control programs, control constants, sampling rates, etc.
M7 is connected to the system bus 6.

Since the stored data in this C-MOS-RAM 7 is lost when the power is turned off, a battery backup control circuit 8 is further provided, and this circuit detects a drop in the operating voltage VCC. to prevent the loss of stored data.

(C) Problems to be Solved by the Invention The conventional process controller described above includes a battery backup control circuit and a battery in order to prevent data loss when the C-MOS-RAM is powered off. However, depending on the transient state when the power is turned off, malfunctions of the battery backup control circuit and memory control circuit may occur.
There was a problem that stored data could be lost or rewritten.

C-MOS memory is commonly used because it consumes very little power; however, in process controllers, it must operate continuously and stably for long periods of time, and the retained data may be lost when the power is turned off or turned on. Or I don't like it being rewritten.

In view of the above, it is an object of the present invention to provide a digital process controller that does not cause data loss even when the power is turned off.

(d) Means and operation for solving the problems The digital process controller of the present invention includes a microprocessor, a memory for storing programs for execution, a memory for a work area, and a memory for downloading and storing process control programs, control constants, etc. A programmable ROM that can be electrically erased and rewritten is used as the download storage memory.

This digital process controller uses electrically erasable and rewritable programmable ROM (EE-P-ROM) as download storage memory.
lly Erasable and Programa
When reading data, it operates like a normal ROM, and when writing data, it operates like a normal RAM, so even if the power is cut off, data will not be lost or rewritten. .

(E) Examples The present invention will be explained in more detail with reference to Examples below.

FIG. 1 is a block diagram of a digital process controller showing one embodiment of the present invention. This digital process controller also has the same features as the conventional process controller shown in Figure 2.
It is equipped with a microprocessor 1, an execution program storage memory 2, and a work area memory 3, and there is no such thing as oats. However, as a download storage memory, E
An EP ROM 4 is provided, and this is a feature.

Each of the above constituent blocks is coupled to each other by a system bus 6.

The EE-P-ROM 4 is controlled by a memory erase/write control circuit 5 in response to a command signal from the system bus 6.

In this digital process controller, a program stored in the execution program storage memory 2 executes basic system operations, and an application program stored in the EE-P-ROM 4 performs adjustment control operations.

When a process flow control program, control constants, etc. are downloaded from a host computer from a central control room (not shown) via a communication line and bus 6, the microprocessor 1 accepts the data based on a predetermined communication protocol and starts processing. After being temporarily stored in the area memory 3, or directly stored in the EE-P ROM 4. The storage of data into the EE-P-ROM 4, which is the download storage memory, is performed under software control by the memory erase/write control circuit 5 in accordance with write data and write commands from the system bus 6.

Erasing or writing EE-P-ROM requires a special sequence of control signals and programming pulses with a pulse width of 10-70m5 at high level (10-20■), so transients during power-off are avoided. Conditions and external noise will have no effect and will not cause malfunctions. Therefore, inconveniences such as data loss or erroneous rewriting do not occur. E above
Specifically, as the E-P-ROM4, for example,
XL-2816A manufactured by COR, M manufactured by Oki Electric Industry Co., Ltd.
A32816A is used. These integrated circuits contain necessary circuits such as memory erase/write control circuits, write sequences, program pulse generation circuits, etc., and also have erase/write protection circuits when the power is turned on and off. ing.

(f) Effect of the invention According to this invention, as a download storage memory,
EE-
Since the P-ROM is used, there is no loss of stored data due to the need for backup, and the reliability of the controller is therefore increased.

Further, since the EE-P-ROM operates as a normal ROM when reading and as a normal RAM when writing, it can be used in place of a general ROM/RAM.

Therefore, downloaded data may be lost when the power is turned on or off.
Since there is no occurrence of writing errors, an inexpensive and highly reliable digital process controller can be obtained.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a digital process controller showing an embodiment of the present invention, and FIG. 2 is a block diagram of a conventional process controller. ■=Microprocessor, 2: Execution program storage memory, 3: Work area memory, 4: EE-P-ROM. 5: Memory erase/write control circuit, 6: System bus. Patent applicant: Shimadzu Corporation Agent
Patent Attorney Shigeru Nakamura Figure 1

Claims (1)

[Claims] (1) In a digital process controller comprising a microprocessor, an execution program storage memory, a work area memory, and a download storage memory for process control programs, control constants, etc., the download storage memory includes an electrical Erase/
Rewritable programmable ROM (EE/P/ROM)
A digital process controller characterized by using.