JPS6258707A - Amplifier circuit for hall element - Google Patents

Amplifier circuit for hall element

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Publication number
JPS6258707A
JPS6258707A JP60198123A JP19812385A JPS6258707A JP S6258707 A JPS6258707 A JP S6258707A JP 60198123 A JP60198123 A JP 60198123A JP 19812385 A JP19812385 A JP 19812385A JP S6258707 A JPS6258707 A JP S6258707A
Authority
JP
Japan
Prior art keywords
bias
amplifier circuit
circuit
differential amplifier
hall element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60198123A
Other languages
Japanese (ja)
Inventor
Yasutsugu Shigeta
重田 泰嗣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP60198123A priority Critical patent/JPS6258707A/en
Publication of JPS6258707A publication Critical patent/JPS6258707A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To compensate the output voltage of a Hall element by permitting the automatic adjustment of the gain of the first amplifier circuit by a bias circuit and to make stable a circuit against variance by supplying bias to the first and the second amplifier circuits by a common bias circuit. CONSTITUTION:A temperature compensation can be performed by giving an appropriate bias from a bias circuit 11 and making change the operating current I of the first differential amplifier circuit 9 in the opposite direction of the output voltage VH of a Hall element 8. When the output voltage of the first differential amplifier circuit 9 is temperature-compensated, no compensation in the second differential amplifier circuit 10 and the succeeding stage is required. By supplying a fixed bias by the common bias part 12 of the bias circuit 11 and the second bias part 14 regardless of a temperature change, the gain in the second differential amplifier 10 is maintained at a fixed level, and the output voltage is also kept at a fixed level. Therefore, by supplying the bias corresponding to the temperature change and an unchanged bias against a temperature from a single bias circuit 11, an amplifier circuit that is able to stably amplify the output voltage of the Hall element.

Description

【発明の詳細な説明】 (イ)産業上の利用分野 本発明は、ホール素子の出力電圧を増幅する為のホール
素子用増幅回路に関するもので、特に温度変化に応じて
変化するホール素子の出力電圧を補償することの出来る
ホール素子用増幅回路を提供せんとするものである。
Detailed Description of the Invention (a) Industrial Application Field The present invention relates to a Hall element amplification circuit for amplifying the output voltage of a Hall element, and particularly relates to a Hall element amplifier circuit for amplifying the output voltage of a Hall element. It is an object of the present invention to provide an amplifier circuit for a Hall element that can compensate for voltage.

(ロ)従来の技術 ホール素子は、ホール効果に基づき磁界強度を電気信号
に変換する磁電変換素子であり5位置センサーや回転セ
ンサーとして現在多用されている。
(b) Conventional technology A Hall element is a magnetoelectric conversion element that converts magnetic field strength into an electric signal based on the Hall effect, and is currently widely used as a 5-position sensor or a rotation sensor.

しかして、ホール素子の出力電圧■4は、y、、= −
迅−・I・B−九   ・・・・・・・・・(1)と表
わすことが出来るが、そのレベルが非常に小である為、
直接に信号処理を行うことが出来ない。
Therefore, the output voltage ■4 of the Hall element is y, , = −
It can be expressed as (1), but since its level is very small,
Signal processing cannot be performed directly.

また、前記第(1)式においてホール素子の特性を示す
ホール定数R,は。
Furthermore, in the above equation (1), the Hall constant R, which indicates the characteristics of the Hall element, is:

R,=ρ・μ        ・・・・・・・・・(2
)〔ただし、ρは比抵抗、μは移動度〕 と表わされ、前記ホール定数R,の温度特性は。
R, = ρ・μ ・・・・・・・・・(2
) [where ρ is specific resistance and μ is mobility], and the temperature characteristics of the Hall constant R are as follows.

−φ」l上−一= ρ」1/−−F μゴ1g−・・・
・・・・・・(3)dT    dT   dT と表わされる。従って、ホール素子の出力電圧は、前記
比抵抗ρ及び移動度μの温度特性に依存する温度変化を
有し、シリコンホール素子にお℃・ては定電圧駆動時の
温度に対する相対感度変化が0.6%/°C程度になり
、実用上無視出来なくなる。
−φ”ltop−1=ρ”1/−−F μgo1g−...
...... (3) dT dT dT It is expressed as. Therefore, the output voltage of the Hall element has a temperature change that depends on the temperature characteristics of the specific resistance ρ and mobility μ, and the relative sensitivity change with respect to temperature during constant voltage driving is 0 for the silicon Hall element at °C. It becomes about .6%/°C, which cannot be ignored in practical terms.

前記ホール素子の温度に対する相対感度変化は。What is the relative sensitivity change with respect to temperature of the Hall element?

前記ホール素子の出力電圧を増幅する増幅回路において
補償することが出来る。1975年12月に発行された
National Technical Report
 Vol、21電6第681頁乃至第691頁には、[
感磁素子・モノリシックホールICjなる論文カー記載
されており、その第685頁第7図には、@度補償回路
を有するホール素子の出力′1肛圧を増幅する回路が記
載されている。前記回路は、第2図に示す如くホール素
子(1)の出力電圧を差動増幅する第1差動増幅回路(
りと、該第1差動増幅回路(2)の出力信号を更に増幅
する第2差動増幅回路(刀とによって構成されており、
前記第1差動増幅回路烙)を構成する一対のトランジス
タ(4)及び(5)の共通エミッタには、温度補償用の
ダイオード(6)が接続されている。しかして、第1差
動増幅回路(りを構成する一対のトランジスタ(4)及
び(5)のペースは、それぞれホール素子(1)の出力
端子に接続されているので、その電圧は’ vccにな
っており、前記第1差動増幅回路(2)の動作電流工。
Compensation can be performed in an amplifier circuit that amplifies the output voltage of the Hall element. National Technical Report published December 1975
Vol, 21 Den 6, pages 681 to 691, [
A paper entitled "Magnetic Sensing Element/Monolithic Hall ICj" is described in the paper, page 685, FIG. 7, which describes a circuit for amplifying the output '1 anal pressure of a Hall element having a degree compensation circuit. The circuit includes a first differential amplifier circuit (1) that differentially amplifies the output voltage of the Hall element (1) as shown in FIG.
and a second differential amplifier circuit (sword) that further amplifies the output signal of the first differential amplifier circuit (2),
A temperature compensation diode (6) is connected to the common emitter of the pair of transistors (4) and (5) constituting the first differential amplifier circuit. Therefore, since the pair of transistors (4) and (5) forming the first differential amplifier circuit are connected to the output terminal of the Hall element (1), the voltage thereof becomes 'vcc'. The operating current of the first differential amplifier circuit (2) is .

は、 ■。=(−−(v□+vo)・π・・・・(4)となる
。前記第(4)式において、■□及びV。は負の用度特
性を有するので、温度が上昇すると前記動作電流1゜を
増大させる。また、Rは正の温度特性を有するので、前
記動作電流工。を減少させる。その為、ホール素子(1
)の後段に態度補償用のダイオード(6)を有する第1
差動増幅回路(りを接続すれば、@度上昇により前記ホ
ール素子(1)の出力電圧V□カー低下したとき、第1
差動増幅回路(りの動作電流工。を増大させ、該第1差
動増幅回路(ヱ)の利得を増大させることが出来るので
、前記第1差動増幅回路(2)の出力電圧を略一定に保
つことが出来る。
■. =(--(v□+vo)・π...(4). In the above equation (4), ■□ and V have negative usage characteristics, so when the temperature rises, the above operation The current 1° is increased. Also, since R has a positive temperature characteristic, the operating current is reduced. Therefore, the Hall element (1°) is increased.
) with a diode (6) for attitude compensation at the rear stage.
By connecting a differential amplifier circuit (RI), when the output voltage V□ of the Hall element (1) decreases due to an increase in temperature, the first
Since the operating current of the differential amplifier circuit (2) can be increased and the gain of the first differential amplifier circuit (2) can be increased, the output voltage of the first differential amplifier circuit (2) can be approximately reduced. It can be kept constant.

(ハ) 発明が解決しようとする問題点しかしながら、
第2図の従来回路の場合、温度補償をダイオード(6)
のみにより行っている為、温度変化に対して第1差動増
幅回路(2)の動作電流を十分に変化させることが出来
ず、ホール素子(1)の出力電圧の低下を十分に補償出
来ないので、第1差動増幅回路(21の出力電圧が変動
するという問題があった。また、ダイオード(6)を1
個用いろ代わりに、複数のダイオードを直列接続して用
いれば、より犬なる補償を行うことが出来るが、離散的
な補償しか行い得す設計の自由度が少くなるという問題
や、減電圧特性が悪化するという問題が生じるので、好
ましい方法ではない。
(c) Problems that the invention seeks to solveHowever,
In the case of the conventional circuit shown in Figure 2, temperature compensation is performed using a diode (6).
Since the operating current of the first differential amplifier circuit (2) cannot be changed sufficiently in response to temperature changes, it is not possible to sufficiently compensate for the decrease in the output voltage of the Hall element (1). Therefore, there was a problem that the output voltage of the first differential amplifier circuit (21) fluctuated.
If multiple diodes are connected in series instead of using individual diodes, it is possible to perform more precise compensation, but there are problems such as less freedom in design since only discrete compensation can be performed, and reduced voltage characteristics. This is not a preferred method because it causes the problem of deterioration.

更に、第2図の従来回路の場合は、第1差動増幅回路(
冬)の動作電流と第2差動増幅回路(ス)の動作電流と
が互いに独立に設定されているので、素子のバラツキ等
により動作点が変化し、後段との接続が5まく出来なく
なる危険があった。
Furthermore, in the case of the conventional circuit shown in FIG. 2, the first differential amplifier circuit (
Since the operating current of the second differential amplifier circuit (winter) and the operating current of the second differential amplifier circuit (S) are set independently from each other, there is a risk that the operating point may change due to variations in the elements, making it impossible to connect with the subsequent stage. was there.

に)問題点を解決するための手段 本発明は、上述の点に鑑み成されたもので、ホール素子
の出力電圧を増幅する第1増幅回路の利得を正の温度変
化に対して増大させるバイアスを併給するとともに、前
記第1増幅回路の出力を増幅する第2増幅回路の動作電
流な略一定にする為のバイアスを供給するバイアス回路
を設けたことを特徴とするものである。
B) Means for Solving the Problems The present invention has been made in view of the above points, and provides a bias that increases the gain of the first amplifier circuit that amplifies the output voltage of the Hall element with respect to positive temperature changes. The present invention is characterized in that it is provided with a bias circuit that supplies a bias to maintain a substantially constant operating current of a second amplifier circuit that amplifies the output of the first amplifier circuit.

(ホ)作用 本発明に依れば、バイアス回路により第1増幅回路の利
得を自動的に調整出来るので、ホール素子の出力電圧の
補償を行うことが出来る。また、共通のバイアス回路に
より第1及び第2増幅回路にバイアスを供給しているの
で、バラツキ等に対して安定で、特にIC化に適したホ
ール素子用増幅回路を提供出来る。
(E) Function According to the present invention, the gain of the first amplifier circuit can be automatically adjusted by the bias circuit, so that the output voltage of the Hall element can be compensated. Further, since bias is supplied to the first and second amplifier circuits by a common bias circuit, it is possible to provide an amplifier circuit for a Hall element that is stable against variations and is particularly suitable for IC implementation.

(へ)実施例 第1図は1本発明の原理を示す回路ブロック図で、(8
)はホール素子、(9)は該ホール素子(8)の出力電
圧を増幅する第1差動増幅回路、00は該第1差動増幅
回路(9)の出力電圧を増幅する第2差動増幅回路、及
び(ロ)は共通バイアス部(2)と前記第1差動増幅回
路(9)の動作電流を与える第1バイアス部σ3と前記
第2差動増幅回路()(Thの動作電流を与える第2バ
イアス部α→とから成るバイアス回路である。
(f) Embodiment Figure 1 is a circuit block diagram showing the principle of the present invention.
) is a Hall element, (9) is a first differential amplifier circuit that amplifies the output voltage of the Hall element (8), and 00 is a second differential amplifier that amplifies the output voltage of the first differential amplifier circuit (9). an amplifier circuit, and (b) a common bias section (2), a first bias section σ3 that provides an operating current for the first differential amplifier circuit (9), and a first bias section σ3 that provides an operating current for the second differential amplifier circuit () (Th). This is a bias circuit consisting of a second bias section α→ which gives .

いま、所定温度T、でホール素子(8)の出力電圧■□
が■ヨ、であるとすれば、温度がT2に上昇したとき前
記出力電圧v、lはVII2に減少する。一方。
Now, at a predetermined temperature T, the output voltage of the Hall element (8)
If it is assumed that {circle around (2)}, then the output voltages v and l decrease to VII2 when the temperature rises to T2. on the other hand.

第1差動増幅回路(9)の利得Gが温度T、でG、にな
る様に、バイアス回路(ロ)の共通バイアス部(6)及
び第1バイアス部(2)から第1差動増幅回路(9)に
供給されるバイアスを設定すれば、@度T、における第
1差動増幅回路(9)の出力電圧VIは、■、二G、・
7M1になる。温度T2における第1差動増幅回路(9
)の出力電圧V2がV、 = V、になる為には、温度
T、における第1差動増幅回路(9)の利得G。
The common bias section (6) and the first bias section (2) of the bias circuit (b) are connected to the first differential amplifier so that the gain G of the first differential amplifier circuit (9) becomes G at the temperature T. If the bias supplied to the circuit (9) is set, the output voltage VI of the first differential amplifier circuit (9) at @degree T, becomes ■, 2G, .
It will become 7M1. The first differential amplifier circuit (9
) in order for the output voltage V2 to become V, = V, the gain G of the first differential amplifier circuit (9) at the temperature T.

その様な値になる様な動作電流を共通バイアス部(6)
及び第1バイアス部口により作成すれば、温度変化に対
して第1差動増幅回路(9)の出力電圧を一定にするこ
とが出来ろ。一般に、差動増幅回路の利得Gは、その相
互コンダクタンスgmと負荷抵抗RLとに応じて9m−
RLで設定される。そして、前記相互コンダクタンス1
mは、その動作電流1゜に比例するものであるから、結
局、バイアス回路αDから適切なバイアスを与え、第1
差動増幅回路(9)の動作電流I。をホール素子(8)
の出力電圧■1の温度変化と逆方向に変化させれば、温
度補償が達成出来る。
The common bias section (6) sets the operating current to such a value.
By creating the first bias section, the output voltage of the first differential amplifier circuit (9) can be kept constant despite temperature changes. Generally, the gain G of a differential amplifier circuit is 9m-9 depending on its mutual conductance gm and load resistance RL.
Set in RL. And the mutual conductance 1
Since m is proportional to the operating current 1°, after all, an appropriate bias is applied from the bias circuit αD, and the first
Operating current I of the differential amplifier circuit (9). Hall element (8)
Temperature compensation can be achieved by changing the output voltage ■1 in the opposite direction to the temperature change.

また、第1差動増幅回路(9)の出力電圧力”一温度補
償されたものであれば、第2差動増幅回路αO及びその
後段における補償の必要が無くなり、前記第2差動増幅
回路QOは一定の利得を有1−ろものとしなければなら
ない。前記第2差動増幅回路αOの利得も先に述べた通
り、相互コンダクタンスと負荷抵抗とによって決まり、
前記相互コンダクタンスは動作電流に応じて決まるので
、バイアス回路りの共通バイアス部(6)及び第2バイ
アス部(14)とによって、温度質fヒがあっても一定
のバイアスを供給する様にすれば、前記第2差動増幅回
路(旧の利得が一定に保たれ、出力電圧も一定の値にな
る。従って、第1図に示す如く、単一のバイアス回路(
ロ)から己度変化に応じたバイアスと温度に対して変化
しないバイアスとを供給する様にすれば、ホール素子の
出力電圧を安定に増幅し得る増幅回路が得られる。
Further, if the output voltage of the first differential amplifier circuit (9) is temperature-compensated, there is no need for compensation in the second differential amplifier circuit αO and the subsequent stage, and the second differential amplifier circuit The QO must have a constant gain.As mentioned above, the gain of the second differential amplifier circuit αO is also determined by the mutual conductance and the load resistance.
Since the mutual conductance is determined according to the operating current, the common bias section (6) and the second bias section (14) of the bias circuit are designed to supply a constant bias even if there is a temperature change. For example, the gain of the second differential amplifier circuit (old) is kept constant and the output voltage is also constant. Therefore, as shown in FIG.
By supplying a bias that corresponds to the temperature change and a bias that does not change with respect to temperature from (b), an amplifier circuit that can stably amplify the output voltage of the Hall element can be obtained.

第3図は1本発明の具体回路例を示すもので。FIG. 3 shows a specific example of a circuit according to the present invention.

ホール素子(8)の出力電圧は第1差動増幅回路(旦)
を構成する第1及び第2トランジスタ(至)及びαGの
ベースに印加されて増幅される。前記第1差動増幅回路
(勇の出力信号は、前記第1及び第2トランジスタαQ
及び(ト)のコレクタから第2差動増幅回路(9を構成
する第3及び第4トランジスタαカ及び(至)のベース
に印加され更に増幅された後、第5及び第6トランジス
タ09及び翰のコレクタから後段に伝送される。バイア
ス回路りは、第1及び第2抵抗Q1)及び(2)とダイ
オード接続型の第1及び第2バイアストランジスタ翰及
び(ハ)とから成る共通バイアス部@、前記第2バイア
ストランジスタ(ハ)にベースが接続された第3バイア
ストランジスタ翰と前記第1差動増幅回路(ヅの動作電
流源となる第4バイアストランジスタ(1)と該第4バ
イアストランジスタ翰のエミッタに接続された第3抵抗
翰とから成る第1バイアス部り、及び前記第2バイアス
トランジスタ(ハ)に電流ミラー接続されるとともに前
記第2差動増幅回路便の動作電流源となる第5バイアス
トランジスタ@と該第5バイアストランジスタ翰のエミ
ッタに接続された第4抵抗翰とから成る第2バイアス部
(ロ)によって構成されている。
The output voltage of the Hall element (8) is determined by the first differential amplifier circuit (Dan).
The signal is applied to the bases of the first and second transistors constituting (to) and αG, and is amplified. The output signal of the first differential amplifier circuit (the output signal of the first differential amplifier circuit) is
After the voltage is applied from the collectors of and (g) to the bases of the third and fourth transistors α and (to) constituting the second differential amplifier circuit (9) and is further amplified, the voltage is applied to the fifth and sixth transistors 09 and The bias circuit is a common bias section consisting of first and second resistors Q1) and (2) and diode-connected first and second bias transistors Q1 and (C). , a third bias transistor (1) whose base is connected to the second bias transistor (C), a fourth bias transistor (1) serving as an operating current source of the first differential amplifier circuit (Z), and the fourth bias transistor (C). a first bias section consisting of a third resistor wire connected to the emitter of the second bias transistor (c), and a second bias section connected to the second bias transistor (c) as a current mirror and serving as an operating current source for the second differential amplifier circuit. The second bias section (b) includes a fifth bias transistor @ and a fourth resistor wire connected to the emitter of the fifth bias transistor wire.

しかして、共通バイアス部■に流れる電流■1は、 となり、第4バイアストランジスタ(イ)のコレクタ電
流、すなわち第1差勧増幅回路(9)の動作電流工。1
は。
Therefore, the current (1) flowing through the common bias section (2) is the collector current of the fourth bias transistor (a), that is, the operating current of the first differential amplifier circuit (9). 1
teeth.

1o+ ” R,(IIR2+ V++t  Vats
 −v+v< )−(6)となる。ところで、トランジ
スタのV□の温度係数は、そのPN接合に流れる電流に
より変化し、を光密度が小である程その温度係数が犬に
なる。
1o+ ” R, (IIR2+ V++t Vats
−v+v< )−(6). By the way, the temperature coefficient of V□ of a transistor changes depending on the current flowing through its PN junction, and the lower the optical density, the more the temperature coefficient becomes smaller.

前記第(6)式で示される第1差動増幅回路(旦)の動
作電流■。1を定める要件のうち、第3バイアストラン
ジスタ価は第4バイアストランジスタ(ホ)のベース電
流を供給しているだけなので、そのペース・エミッタ間
電圧■□3 の震度係数は大になる。その為、温度が上
昇すると、前記■□、が小になり。
The operating current (2) of the first differential amplifier circuit (D) shown by the above equation (6). Among the requirements for determining 1, since the third bias transistor value only supplies the base current of the fourth bias transistor (e), the seismic intensity coefficient of the pace-emitter voltage ■□3 becomes large. Therefore, as the temperature rises, the above ■□ becomes smaller.

前記動作電流IQ+が犬になって第1差動増幅回路(旦
)の利得を犬とし、温度上昇に起因するホール素子(8
)の出力電圧v、Iの低下を補償する。その場合。
The operating current IQ+ increases, the gain of the first differential amplifier circuit (Dan) increases, and the Hall element (8) due to temperature rise increases.
) to compensate for the decrease in the output voltage v, I. In that case.

前記第3バイアストランジスタ(イ)に流れる電流に比
べ、第1.第2及び第4トランジスタ(ハ)、(ハ)及
び(イ)に流れる電流は十分大であるから、前記動作電
流工。、の変化にあまり寄与しない。
Compared to the current flowing through the third bias transistor (A), the current flowing through the first bias transistor (A) is higher than the current flowing through the third bias transistor (A). Since the currents flowing through the second and fourth transistors (c), (c), and (a) are sufficiently large, the operating current is as follows. , does not contribute much to changes in .

共通バイアス部■を構成する第2バイアストランジスタ
(ハ)は、第2差動増幅回路■の動作電流を与える第2
バイアス部(ロ)の第5トランジスタ@に電流ミラー接
続されている。前記第2差動増幅回路りの動作電流をI
。、とすれば、 ■。2 ” R,(II R2+V、。−一、)・・・
・・・(7)となる。しかして、第2抵抗(イ)の値と
第4抵抗翰の値とを等しく設定すれば、第2バイアスト
ランジスタ(ハ)に流れる電流と第5バイアストランジ
スタ翰に流れる電流とが等しくなるので、■、ア”Vl
15となり、第2差動増幅回路りの動作電流及び利得は
、温度変化に対して安定なものになる。
The second bias transistor (c) constituting the common bias section
A current mirror connection is made to the fifth transistor @ of the bias section (b). The operating current of the second differential amplifier circuit is I
. , then ■. 2 ” R, (II R2+V,.-1,)...
...(7). Therefore, if the value of the second resistor (a) and the value of the fourth resistor wire are set equal, the current flowing through the second bias transistor (c) and the current flowing through the fifth bias transistor wire will be equal. ■、A"Vl
15, and the operating current and gain of the second differential amplifier circuit become stable against temperature changes.

それ故、第3図の如く構成すれば、単一のバイアス回路
から第1差動増幅回路に温度特性を有する動作電流を供
給出来るとともに、第2差動増幅回路に温度変化に対し
て安定な動作電流を供給出来る。
Therefore, by configuring as shown in Figure 3, it is possible to supply an operating current with temperature characteristics to the first differential amplifier circuit from a single bias circuit, and to supply the second differential amplifier circuit with an operating current that is stable against temperature changes. Can supply operating current.

尚、第3図において補償量が少い場合は、第3バイアス
トランジスタ(イ)をダーリントン構成とすればよく、
電源電圧の温度変化を補償する場合には、第1抵抗(ハ
)と第1バイアストランジスタ翰との間、第3バイアス
トランジスタ(イ)と第4バイアストランジスタ(ホ)
との間、及び第2バイアストランジスタ(ハ)と第5バ
イアストランジスタ翰との間に、それぞれトランジスタ
を挿入すればよい。
In addition, if the amount of compensation is small in FIG. 3, the third bias transistor (A) may have a Darlington configuration,
When compensating for temperature changes in the power supply voltage, the third bias transistor (A) and the fourth bias transistor (E) are connected between the first resistor (C) and the first bias transistor (H).
Transistors may be inserted between the second bias transistor (c) and the fifth bias transistor (c).

(ト) 発明の効果 以上述べた如く、本発明に依れば、ホール素子の出力電
圧の温度変化を補償することが出来ろとともに、後段と
の接続を容易にすることが出来るホール素子用増幅回路
を提供出来る。また、本発明に依れば、第1及び第2増
幅回路の動作電流を共通のバイアス回路から供給してい
るので、構成簡単にしてバラツキの少いホール素子用増
幅回路を提供出来−特にホールICに用いて好適である
(g) Effects of the Invention As described above, the present invention provides an amplifier for a Hall element that can compensate for temperature changes in the output voltage of the Hall element and can facilitate connection with subsequent stages. We can provide the circuit. Further, according to the present invention, since the operating current of the first and second amplifier circuits is supplied from a common bias circuit, it is possible to provide an amplifier circuit for a Hall element with a simple configuration and less variation. It is suitable for use in IC.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は1本発明の原理を示す回路ブロック図。 第2図は従来のホール素子用増幅回路を示す回路図、及
び第3図は本発明の具体回路例を示す回路図である。 主な図番の説明 (8)・・・ホール素子、(9)・・・第1差動増幅回
路、ao・・・第2差動増幅回路、 ■・・・バイアス
回路。 (イ)・・・共通バイアス部、 α3・・・第1バイア
ス部。 α荀・・・第2バイアス部。
FIG. 1 is a circuit block diagram showing the principle of the present invention. FIG. 2 is a circuit diagram showing a conventional Hall element amplifier circuit, and FIG. 3 is a circuit diagram showing a specific circuit example of the present invention. Explanation of main drawing numbers (8)...Hall element, (9)...First differential amplifier circuit, ao...Second differential amplifier circuit, ■...Bias circuit. (A)...Common bias section, α3...First bias section. αXun...Second bias section.

Claims (1)

【特許請求の範囲】[Claims] (1)ホール素子の出力電圧を増幅する為のホール素子
用増幅回路であって、前記ホール素子の出力電圧を増幅
する第1増幅回路と、該第1増幅回路の出力電圧を増幅
する第2増幅回路と、正の温度変化に対して前記第1増
幅回路の利得を増大させるバイアスを前記第1増幅回路
に供給するとともに、前記第2増幅回路の動作電流を略
一定とする為のバイアスを前記第2増幅回路に供給する
バイアス回路とを備えることを特徴とするホール素子用
増幅回路。
(1) A Hall element amplifier circuit for amplifying the output voltage of the Hall element, comprising a first amplifier circuit that amplifies the output voltage of the Hall element, and a second amplifier circuit that amplifies the output voltage of the first amplifier circuit. an amplifier circuit, and a bias that increases the gain of the first amplifier circuit in response to a positive temperature change is supplied to the first amplifier circuit, and a bias that makes the operating current of the second amplifier circuit substantially constant. An amplifier circuit for a Hall element, comprising a bias circuit that supplies the second amplifier circuit.
JP60198123A 1985-09-06 1985-09-06 Amplifier circuit for hall element Pending JPS6258707A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60198123A JPS6258707A (en) 1985-09-06 1985-09-06 Amplifier circuit for hall element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60198123A JPS6258707A (en) 1985-09-06 1985-09-06 Amplifier circuit for hall element

Publications (1)

Publication Number Publication Date
JPS6258707A true JPS6258707A (en) 1987-03-14

Family

ID=16385834

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60198123A Pending JPS6258707A (en) 1985-09-06 1985-09-06 Amplifier circuit for hall element

Country Status (1)

Country Link
JP (1) JPS6258707A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51145250A (en) * 1975-06-09 1976-12-14 Matsushita Electric Ind Co Ltd Differential amplifier for integrated circuit
JPS57206113A (en) * 1981-06-12 1982-12-17 Nec Corp Amplifier for limiter
JPS601019B2 (en) * 1976-05-21 1985-01-11 ゲイマ−・インダ−ストリ−ズ・インコ−ポレイテツド heating and cooling equipment

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51145250A (en) * 1975-06-09 1976-12-14 Matsushita Electric Ind Co Ltd Differential amplifier for integrated circuit
JPS601019B2 (en) * 1976-05-21 1985-01-11 ゲイマ−・インダ−ストリ−ズ・インコ−ポレイテツド heating and cooling equipment
JPS57206113A (en) * 1981-06-12 1982-12-17 Nec Corp Amplifier for limiter

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