JPS6257303A - Digital oscillation circuit - Google Patents

Abstract

PURPOSE:To decrease remarkably the circuit scale by utilizing the technology of a recursive digital filter so as to decide a coefficient to allow the digital filter to cause oscillation. CONSTITUTION:An output of a register 1-2 is given to an input of a register 1-3 and an input of a multiplier 1-4, an output of the register 1-3 is given to an input of a multiplier 1-5, outputs of the multipliers 1-4, 1-5 are given to the input of an adder 1-1 and the output of the adder 1-1 is given to the input of the register 1-2. In a recursive digital filter of the second order as above, an amplitude limit function is provided to the register 1-2. The limiter is provided to the registers 1-2, 1-3 so as to attain stable oscillation.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a digital oscillator circuit, in particular a button signal oscillator for a subscriber circuit, T:'1. The present invention relates to an oscillation circuit suitable for implementation with a digital circuit that can be used as a voltage controlled oscillator (VCO) of a T-, a sine wave oscillator of a modem, or the like.

[Background of the invention]

In recent years, the miniaturization of LSIs has progressed, and oscillators can be realized by using digital circuits rather than analog circuits, which is becoming more advantageous both economically and in terms of performance.

However, conventionally known digital oscillator circuits have a structure that reads data from a read-only memory (ROM), converts it from D/A, and outputs an oscillation output, as shown in Japanese Patent Laid-Open No. 59-161104. Therefore, the circuit scale tends to be large. In addition, with this configuration, it was not easy to freely change the frequency.

[Purpose of the invention]

An object of the present invention is to realize a digital oscillation circuit that has a simple circuit configuration and whose frequency can be easily varied.

[Summary of the invention]

In order to achieve the above object, the present invention utilizes the conventionally known technology of recursive digital filters and configures a digital oscillation circuit by determining coefficients so that the digital filter causes oscillation.

That is, the output of the first register is used as the input of the first multiplier and the second register, the output of the second register is used as the input of the second multiplier, and the output of the first and second multipliers is used as the input of the second multiplier. The sum of the outputs is configured to be input to the first register, the coefficients of the first and second multipliers are selected to cause oscillation, and a limiter is provided to the first no register. Provided.

The configuration is such that the output of the adder or the first or second register is taken out as the output of the oscillation circuit.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to FIGS. 1(a), (b), and (c).

In Figure 1 (,), the output of register-2 is
The output of register-3 is connected to the input of multiplier 1-5, and the output of register-3 is connected to the input of multiplier 1-5.
-4 and the output of multiplier 1-5 are connected to the input of adder 1-1, and the output of adder 1-1 is connected to the input of register -2. 2 is provided with an amplitude limiting function (limiter).

Conventionally known recursive digital filters.

An input terminal is added to the adder 1-1, and the output of the adder 1-1 is used as the output of the filter, and its transfer function H(Z
) becomes . However, a is the coefficient of multiplier 1-4, and b is the coefficient of multiplier 1-5. z-1=e-Jiff? where T is the sampling period, that is, the delay time f of registers -2, 1-3 is the frequency, and j=, /-x-. The coefficient is a”+4b
<O-(2), and if we put impulse into the input X, we get h〈-1
In this case, the output obtained by D/A converting the output Y is shown in Figure 2 (a).
The amplified oscillation occurs as shown in FIG. 2(b), and when b>-1, the attenuated oscillation occurs as shown in FIG. 2(b). When b=-1, steady oscillation can be achieved as shown in FIGS. 2 and 3(c). However, although steady oscillation is mathematically possible, in practice it is often impossible to select coefficients that will cause steady oscillation because of the effect of truncating data bits. Therefore, a second-order recursive digital filter cannot be used as it is in an oscillation circuit.

In the present invention, as described above, since the registers 1-2, 1-3 are provided with limiters, stable oscillation can be performed.

The coefficients of multipliers 1-5 are numbers slightly smaller than -1, for example, -1-2-" (-1,0000000 in binary)
00000001), and when the absolute value 1al of the coefficient a of multiplier 1-4 is less than 2, if the limiter is taken from register 1-2, if even one of the two registers takes a value other than O, the register's The output is amplified and oscillated little by little.

At this time, if a limiter is provided in the register 1-2, steady oscillation can be achieved. Note that if the oscillation frequency at this time is f Hz, a=-2cos (2πfT) - (3)
where T is the sampling period.

To stop the oscillation of this oscillation circuit, turn the two registers into
You can reset it to . To start oscillation from a state where oscillation has stopped, either add impulses to the adder or
If any value other than 0 exists in one of the two registers,
- Just do it. Also.

To change the phase of oscillation, it is sufficient to exchange the data in the two registers.

In FIG. 1(b), the multipliers 1-4 in FIG. 1(a) have variable coefficients, and by doing so, the oscillation frequency can be changed. In addition, Fig. 1 (Q) shows the first
A multiplier is provided at the end of the register shown in the figure, and by doing so, the oscillation amplitude can be changed.

Note that since the oscillation amplitude is the same as the amplitude limited by the limiter, the oscillation amplitude can be changed by changing the amplitude limit value.

The configurations in FIGS. 1(a), (b), and (c) have multiplication functions.

Arithmetic unit ALU with addition function and comparison function, and RA
Needless to say, it can be easily realized using a circuit composed of M and ROM.

〔Effect of the invention〕

According to the present invention, an oscillation circuit can be realized simply by providing a limiter in a second-order recursive filter.

The circuit scale is very small. In addition, since one oscillation frequency and two amplitude phases can be easily changed, the subscriber circuit's PB
It is suitable for use in oscillation circuits, PLL VCOs, modem sine wave oscillation circuits, etc.

Note that an oscillation circuit with a circuit configuration in which a limiter is provided in a second-order recursive filter can be created using an analog circuit using switched capacitors, etc.
” Setting a very delicate coefficient such as
This is nearly impossible with the precision of analog circuits. If this coefficient cannot be achieved, it will not be possible to oscillate a sine wave with small distortion.

Furthermore, in an analog circuit, switching the coefficients of a multiplier requires a considerably large amount of hardware.6Therefore, the effect of implementing this circuit in a digital circuit is significant.

[Brief explanation of the drawing]

FIG. 1(a) is a block diagram of one embodiment of a digital oscillation circuit according to the present invention. In (b), the oscillation frequency is made variable, and in (c), the oscillation amplitude is made variable.6Figure 2 (
(a) is an output waveform when amplified oscillation is performed, (1,) is an output waveform when attenuated oscillation is performed, and (Q) is an output waveform diagram when regular oscillation is performed. 1-1.1-2...Adder, 1-2...Register with limiter, 1-3...Register, 1-4.1-5.
... Multiplier, 1-8.1-9.1-10 ... Variable coefficient multiplier, 1-6.1-7 ... Output terminal of oscillation circuit.

Claims (1)

[Claims] 1. The output of the first register is connected to the input of the multiplier and the output of the second register, the output of the second register is connected to the input of the second multiplier, and the output of the second register is connected to the input of the second multiplier. The output of the first multiplier and the output of the second multiplier are connected to the input of an adder, the output of the adder is connected to the input of the first multiplier, and the first register is provided with an amplitude limiting function ( 1. An oscillation circuit characterized in that the oscillation circuit is configured to include a limiter) and to use the output of the first register or the output of the second register as the output of the oscillation circuit. 2. The digital oscillation circuit according to item 1, characterized in that it is configured to vary the coefficients of the first multiplier. 3. The digital oscillation circuit according to item 1 or 2, characterized in that it is configured by providing a third multiplier at the output of the oscillation circuit.