JPS6255354U - - Google Patents

Info

Publication number
JPS6255354U
JPS6255354U JP1985146750U JP14675085U JPS6255354U JP S6255354 U JPS6255354 U JP S6255354U JP 1985146750 U JP1985146750 U JP 1985146750U JP 14675085 U JP14675085 U JP 14675085U JP S6255354 U JPS6255354 U JP S6255354U
Authority
JP
Japan
Prior art keywords
stud
heat dissipation
package
stage
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1985146750U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0333068Y2 (https=
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985146750U priority Critical patent/JPH0333068Y2/ja
Publication of JPS6255354U publication Critical patent/JPS6255354U/ja
Application granted granted Critical
Publication of JPH0333068Y2 publication Critical patent/JPH0333068Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
JP1985146750U 1985-09-26 1985-09-26 Expired JPH0333068Y2 (https=)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985146750U JPH0333068Y2 (https=) 1985-09-26 1985-09-26

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985146750U JPH0333068Y2 (https=) 1985-09-26 1985-09-26

Publications (2)

Publication Number Publication Date
JPS6255354U true JPS6255354U (https=) 1987-04-06
JPH0333068Y2 JPH0333068Y2 (https=) 1991-07-12

Family

ID=31059500

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985146750U Expired JPH0333068Y2 (https=) 1985-09-26 1985-09-26

Country Status (1)

Country Link
JP (1) JPH0333068Y2 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014013908A (ja) * 2006-04-06 2014-01-23 Freescale Semiconductor Inc 一体型スルーホール熱放散ピンを有するモールドされた半導体パッケージおよびその製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014013908A (ja) * 2006-04-06 2014-01-23 Freescale Semiconductor Inc 一体型スルーホール熱放散ピンを有するモールドされた半導体パッケージおよびその製造方法

Also Published As

Publication number Publication date
JPH0333068Y2 (https=) 1991-07-12

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