JPS6254258B2 - - Google Patents

Description

[Detailed description of the invention]

TECHNICAL FIELD The present invention relates to a vehicle optical communication system that transmits signals from switch operations for operating vehicle equipment such as car radios and air conditioners via optical fiber cables. Conventionally, car radios, air conditioners, etc. have been operated by operating switches on the control panel installed on the front seat side of the passenger compartment, but it would be more convenient if passengers in the rear seats could also operate the car radio, air conditioner, etc. For this reason, it is being considered to install a car radio and air conditioner control panel on the rear seat side of the passenger compartment. In such cases, conventionally, multiple signal lines were wired between the operation panel installed on the rear seat side and the in-vehicle equipment on the front seat side, depending on the number of operation items on the switch. In order to reliably prevent the effects of noise and the like, shielded wires are generally used. However, in signal transmission using signal lines, the number of signal lines increases depending on the type of operation signal to be transmitted, and wiring space is limited, which limits the number of signal lines that can be wired, resulting in cost reduction. It also tends to be expensive. On the other hand, optical communication systems using optical fiber cables are attracting attention as signal transmission lines for vehicles because they are not affected by electrical noise and are lightweight. Operation signals from the control switch panel for the air conditioner and car radio are transmitted via optical fiber cables to a receiving unit installed at the front of the vehicle interior, and based on the operation signals received by this receiving unit, the car radio, air conditioner, etc. Optical communication systems that can operate are being considered. FIG. 1 shows the optical communication system described above, which includes a transmitting unit 1 equipped with a plurality of operation switches a, b, c, and d, and a receiving unit connected to the transmitting unit 1 via an optical fiber cable 2. 3
It consists of a transmitting unit 1 and a receiving unit 3.
In order to synchronize the signal transmission between I try to do it. First, to explain the transmitting unit 1, each output of the operation switches a to b is outputted from the shift register 6, P ₁ , P ₃ ,
The other input terminals P _{2 , P 4 ,} P ₆ , and P ₈ of the shift register 6 are connected to the stabilized power supply 7.
is connected to and pulled up to H level,
Input terminals P ₁ , P ₃ , P ₅ , and P ₇ serve as input terminals into which signals at a predetermined level (H level) are input. The shift register 6 performs photoelectric conversion using a phototransistor 8 and outputs the input levels of the input terminals P ₁ to _{P 8} sequentially to a light emitting diode 10 in accordance with a clock pulse obtained by performing waveform shaping using an amplifier circuit 9 and transmitting the input levels to an optical fiber cable 2. Due to the operation of the shift register 6, data pulses and synchronization pulses are alternately output to the optical fiber cable 2. Binary counter 10 has 64 clock pulses.
The frame period of the transmission signal is set by producing an output for each bit and clearing the shift register 6 to its initial state. On the other hand, the receiving unit 3 photoelectrically converts the optical signal received via the optical fiber cable 2 using the phototransistor 12, and inputs the converted signal to the data terminal D of the shift register 14 via the amplifier circuit 13. The data pulse and synchronization pulse received in synchronization with the rise of the clock pulse from unit 4 to H level are again converted into parallel and outputted to output terminals _Q1 to _Q8 . As shown in the time chart of FIG. 2, the signal waveform appearing at the output terminals Q ₁ to _{Q 8} of the shift register 14 is, for example, “0111011” when operating switch b is turned on in the transmitting unit 1.
Since the signals are sequentially received, the outputs _Q1 to _Q8 of the shift register 14 become "0111011" when the synchronization pulse of the last bit _P8 is received by a shift operation synchronized with the rising edge of the clock pulse. Among the outputs of this shift register 14, Q ₁ ,
Q ₃ , Q ₅ , Q ₇ are synchronization pulses, and the remaining Q ₂ ,
Since Q ₄ , Q ₆ , and Q ₈ are data pulses,
The data pulse is input to the latch circuit 15, while the synchronization pulse is input to the AND gate 16.
AND gate 1 when all sync pulses are received
All the inputs of 6 become H level, and therefore the AND gate 16 produces an H level output, for example, at time t.
A latch command is applied to the latch circuit 15 at timing _o to hold the data pulse output, and the output circuit 1
7, the load corresponding to the ON operation of the operation switch b which is producing an H level output is driven. In addition, 18 is the ignition switch,
19 is a stabilized power supply, and 20 is a light emitting diode for clock. In this way, by transmitting a sequential combination of data pulses and synchronization pulses, when a predetermined number of synchronization pulses have been received, the parallel conversion output of the data pulses will drive the load, so the sending side The receiving side can be reliably synchronized with the operating switches a to d and the operating loads in a one-to-one correspondence. Furthermore, even if pulsed noise P _N1 with a short pulse width as shown in Fig. 2 enters the power supply line on the transmitting side, it is removed by the stabilized power supply and is configured to be less susceptible to the effects of noise. . By the way, in addition to high-frequency surges with relatively short pulse widths as mentioned above, pulse noise that is added to in-vehicle equipment includes chattering noise from ignition switches, chattering from operating switches of on-vehicle equipment, etc. A surge voltage with a width of several milliseconds may occur on the power supply line. If such a surge pulse cannot be removed by the stabilized power supply on the transmitting side and is applied to the shift register, the signal levels of the data pulse and synchronization pulse transmitted from the transmitting unit 1 will change. That is, as shown in the time chart of Fig. 2, if a surge pulse P _N0 with a pulse width exceeding the 8-bit serial data is applied, even though only the data bit corresponding to operation switch b is "1". Regardless, the data bits corresponding to operation switches c and d also become "1" due to the surge pulse P _N0 . On the other hand, since all the synchronizing pulses are "1", they are not affected by the surge pulse P _N and the output Q ₁ of the shift register 14 at time t _o
~ _Q8 becomes “11111110” and operation switch c,
There is a problem in that the load is erroneously operated even though d is not turned on. The present invention has been made in view of the above, and is a device that sequentially transmits drive command signals for each of a plurality of loads in synchronization with a clock pulse, and drives the corresponding loads on the receiving side. In order to prevent the load from malfunctioning due to fluctuations in the transmitted signal due to surge voltage mixed in, a pulse signal that combines low and high levels is sent between the transmitted pulses, and the signal at the low level is This system prohibits the sending of the drive command signal to the load when the receiving side does not determine the drive command signal. Hereinafter, the present invention will be explained based on the drawings. FIG. 3 is a block diagram showing the overall configuration of the optical communication system according to the present invention. The objects to be operated are a car radio and an air conditioner. For the air conditioner, air conditioning units are installed independently at the front and rear of the vehicle. The fan speed of the rear air conditioning unit of the so-called dual type air conditioner installed is adjusted. First, to explain the configuration, in the transmitting unit 1 as a rear unit, 22 is a switch panel equipped with a radio switch 22a and an air conditioner switch 22b, 23 is a switch from the switch panel 22, and a high or low level depending on whether it is turned on or off. an input circuit that sets the level of a data signal and a synchronization pulse to be combined with the data signal; 6 a shift register that sequentially converts the parallel input of the data and synchronization pulse level from the input circuit into serial data in synchronization with the rising edge of the clock pulse; 11 is a light emitting diode that converts the data pulse and synchronization pulse from the shift register 6 into light and outputs it to the optical fiber cable 2; 8 is a phototransistor that photoelectrically converts the optical signal of the clock pulse sent via the optical fiber cable 5; 9 is a phototransistor 8
10 is a binary counter that outputs a command to determine the shift start and end of the shift register 6 every time the clock pulse is counted by 64 bits. Incidentally, the operation items for the car radio and air conditioner by operating the switches on the switch panel 22 are as shown in the following table, for example.

[Table] Next, to explain the reception unit that is the front seat unit, 12 is a phototransistor that converts the optical signal received via the optical fiber cable 2 into an electrical signal, and 13 is a phototransistor that amplifies the received signal from the phototransistor 12. 14 is a shift register that converts sequentially input data pulses and synchronization pulses into parallel outputs; 16a is an amplifier circuit that determines that a predetermined number of synchronization pulses have been received; Discrimination circuit that outputs
15 is the output of the discrimination circuit 16a and the shift register 1
4 is a latch circuit that latches the output of 4, 17 is an output circuit for a car radio, 27 is a car radio installed in an instrument that operates according to the data output from output circuit 17, and 4 is an external device that outputs a 1024 Hz clock pulse. 28 is a clock pulse input circuit; 29 is a noise removal circuit for removing noise mixed in the clock pulse; 30
3 is a fan switch circuit that changes the fan speed of the rear seat air conditioning unit in accordance with the air conditioner data output from the latch circuit 15, 31 is a rear seat air conditioning unit operation panel provided on the front seat side, 32 is an input circuit, and 33 is a latch circuit. A selection circuit 34 selects the fan speed command data from 15 and the fan speed command data from the operation panel 31, and 34 is an output circuit. Note that the command signal to the fan motor 37 of the rear seat air conditioning unit is sent using the signal line 35.
The drive current flowing through the fan motor 37 is changed by energizing the relay coil of the relay unit 36 and switching the contacts. On the other hand, as for the power supply system, the stabilized power supply 1 of the receiving unit 3 is connected from the battery 26 via the ignition switch (turned on in the ACC position) 18.
9, 24, and the stabilized power source 7 of the transmitting unit 1, the battery voltage is supplied to each of the stabilized power source 2.
A reset circuit 25 is provided at the output of 4 to initialize the shift register 14 and latch circuit 15 when the power is turned on. FIG. 4 is a circuit block diagram showing the main parts of the present invention in the system of FIG. 3. First, to explain the configuration, 1 is a transmitting unit equipped with a plurality of operation switches a, b, c, and d (taking four switches as an example to simplify the explanation);
2 is an optical fiber cable that transmits optical signals according to data pulses and synchronization pulses output from the transmitter unit, 3 is a receiver unit, and 4 is a clock pulse (1024Hz) for synchronization that is supplied to transmitter unit 1 and receiver unit 3. The timer unit 5 is an optical fiber cable that transmits an optical signal according to the clock pulse to the transmitting unit 1, and the basic configuration thereof is the same as that of the conventional device shown in FIG. The transmitting unit 1 has a shift register 6 that converts parallel input data into serial data and outputs the serial data.
Operation switches a to d are connected to the input terminals P ₁ , P ₃ , P ₅ , P ₇ of the shift register 6 to input data, and among the other input terminals P ₂ , P ₄ , P ₆ , P ₈ , P ₂ ,
P ₆ and P ₈ are connected to the stabilized power supply 7 and pulled up to H level, but P ₄ is connected to ground and pulled down to L level. Since these input terminals P ₂ , P ₄ , P ₆ , and P ₈ set the level of the synchronization pulse to be combined with the data pulse, the synchronization pulse output from the shift register 6 is "1011", and the three H level pulse and 1
It consists of two L level pulses. The shift operation of the shift register 6 is performed using the clock pulse extracted by the amplifier circuit 9 after photoelectric conversion by the phototransistor 8, and also by the output of the binary counter 10 which outputs the 64th bit of the clock pulse. The shift register 6 is cleared to the initial state, and the frame period of serial data is determined. The output of the shift register 6 is adapted to drive a light emitting diode 11, and by driving the light emitting diode 11 with the data pulse and synchronization pulse, an optical signal is sent to the receiving unit 3 via the optical fiber cable 2. The receiving unit 3 includes a phototransistor 12 that converts an optical signal received via the optical fiber cable 2 into an electrical signal, and a data pulse that is shaped and amplified from the photoelectric conversion signal and combined with a synchronization pulse, which is converted into parallel and output. output terminal Q ₂ ,
Parallel output of data pulses can be obtained at Q ₄ , Q ₆ , and Q ₈ , so they are connected to the output circuit 17 via the latch circuit 15 , and the output terminals Q ₁ , Q ₃ , and Q ₅ of the shift register 14 , _Q7 , a synchronizing pulse consisting of a predetermined code bit "1011" is output, so the output terminals _Q1 , _Q5 , _Q7 are input to the AND gate 16 as a discriminating circuit, and if the code bit is "0". The output terminal Q ₃ is inverted to the H level, that is, "1" by the inverter 21, and is input to the AND gate 16. Therefore, the AND gate 16 produces an H level output when a parallel conversion output of the synchronizing pulse of "1011" is obtained, and instructs the latch circuit 15 to latch the data pulse. Note that 18 is an ignition switch, 19 is a stabilized power supply, and 20 is a light emitting diode for clock transmission. Next, the operation will be explained with reference to the time chart shown in FIG. Now, temporarily turn on operation switch b in transmitting unit 1, and turn on other operation switches a, c,
Assuming that d is off, the input terminals Q ₁ to _{Q 8} of the shift register 6 become parallel inputs of "01100101" in combination with the preset synchronization pulse level. In this input state, the shift register 6 sequentially outputs the switch operation signal and synchronization signal applied to the input terminals P ₁ to P ₈ in synchronization with the rising edge of the clock pulse, drives the light emitting diode 11, and transmits the optical fiber as an optical signal. Send to cable 2. On the other hand, in the receiving unit 3, the optical signal received via the optical fiber cable 2 is photoelectrically converted by the phototransistor 12, and the data shown in the time chart in FIG. 5 is sent via the amplifier circuit 13 to the data terminal of the shift register 14. The shift register 14 bit-shifts the input data sequentially in synchronization with the rising edge of the clock pulse from the timer unit 4, and when the last bit shift, which is the 8th bit, is completed, the outputs _Q1 to _Q8 are transferred to the transmitting unit 1.
A parallel conversion output of "01100101" that matches the parallel data input to the shift register 6 is produced. At this time, all the inputs of the AND gate 16 become H level, and for example, the H level output at the timing t _o commands the latch circuit 15 to latch, causing the data pulse to be latched, and the latch circuit 1
Since the outputs a to b of the circuit 5 become "0100", the latch output b, which is at the H level, drives the load via the output circuit 17 in response to the ON operation of the operating switch b. Next, the operation when a surge pulse exceeding an 8-bit pulse width is applied will be explained. Assuming that a surge pulse P _N0 is applied via the power line having the ignition switch 18 as shown in the time chart of FIG. 5, the input terminal Q 1 of the shift register 6 of the transmitting unit ₁
~ _Q8 are all affected by the surge pulse P _N0 , except for the data of the operating switch a which has already finished sending data when the surge pulse P _N0 occurs, and the operating switches c, d and L level which are in the OFF state are affected by the surge pulse P N0. The set synchronization pulse is surge pulse P _N
0 pulls it up to H level, so
Serial data of "01111111" is transmitted to the receiving unit. Therefore, when the final data, which is the 8th bit, is received, the shift register 14
The parallel outputs Q ₁ to _{Q 8} of are “01111111”, and all the synchronization pulses are also “1111”. However, the synchronization pulse of _Q3 output is inverted by inverter 21 and becomes L
Therefore, even if a predetermined number of synchronization pulses are received, the output of the AND gate 16 remains at the L level. Therefore, no latch command is issued to the latch circuit 15, and the data pulse destroyed by the surge pulse P _N0 is not outputted, so that the load will not malfunction. In the above embodiment, one of the plurality of synchronizing pulses is an L level pulse and the other is an H level pulse, but the number and combination of L and H can be arbitrarily determined. Further, although the case where an optical fiber cable is used as a signal transmission line has been described, the present invention can be similarly applied to serial multiplex transmission using a normal signal line. As described above, according to the present invention, the configuration is such that data pulses representing ON or OFF of each of a plurality of load drive switches are alternately combined with a predetermined number of synchronization pulses and sequentially converted into optical signals. When it is determined that a predetermined number of synchronization pulses have been received, the device outputs the received data pulses to the optical fiber cable and drives the on-vehicle load according to the data. Since at least one of the pulses is outputted to the optical fiber cable at a level susceptible to surge pulses, low-frequency surges or induced surges with a pulse width exceeding the number of bits of data pulses transmitted in series can Even if the data is destroyed, the receiving side can detect a code bit error in the synchronization pulse and prohibit the output of the data pulse.
This has the effect of reliably preventing load malfunctions due to surge pulses and improving reliability.

[Brief explanation of the drawing]

Figure 1 is a circuit block diagram showing an example of a conventional device using an optical fiber cable, and Figure 2 is a circuit block diagram of an example of a conventional device using an optical fiber cable.
3 is a block diagram showing the system configuration of the present invention. FIG. 4 is a circuit block diagram showing the main parts of FIG. 3. The figure is a time chart showing the signal waveform of FIG. 4. a, b, c, d...operation switch, 1...transmission unit, 2, 5...optical fiber cable, 3...reception unit, 4...timer unit, 6, 14...shift register, 7, 19, 24...stabilized power supply ,8,
12... Photo transistor, 9, 13... Amplifying circuit, 10... Binary counter, 11, 20... Light emitting diode, 15... Latch circuit, 16... AND gate, 17, 34... Output circuit, 16a... Discrimination circuit, 18... Igni Power switch, 21... Inverter, 22... Switch panel, 22a... Car radio switch, 22b... Air conditioner switch,
23, 28, 32...Input circuit, 25...Reset circuit, 26...Battery, 27...Car radio, 29
...Noise removal circuit, 30...Fan switch circuit,
31...Operation panel, 33...Selection circuit, 35...Signal line, 36...Relay unit, 37...Fan motor.

Claims (1)

[Claims] 1. In a device that sequentially transmits the drive command signal level of each of multiple loads in synchronization with a clock pulse, and drives the corresponding load on the receiving side, the low and high levels are combined between the transmitted pulses. An optical communication system for a vehicle, comprising means for transmitting a pulse signal in between, and means for prohibiting transmission of a drive command signal to a load when the low level signal is not recognized on the receiving side. .