JPS6253784B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital signal conversion circuit that performs arithmetic processing on a pulse signal in a signal processing system, converts it into a normal logic signal at the final stage of a control circuit, and outputs the signal.

Recently, due to the demand for more compact control devices, control devices have been made stationary. For example, even systems that are important and require high reliability, such as the safety systems of nuclear power plants, are becoming increasingly stationary. However, since the number of parts used for stationary operation increases significantly, the possibility of failure of these parts, wiring, etc. in the control system increases. Even in the case of such a failure, consideration must be given to ensure that the control device operates safely, but in order to make it easier to determine whether or not the control device is at fault, dynamic coding methods are used for these control devices. It is being This is processed as a pulse signal in the processing system of the control device, and converted into a normal logic signal at the final stage. By doing so, if any signal in the processing system of the control device ceases to be a pulse signal, it can be determined that there is a failure within the control device.

If this dynamic coding method is used, a dynamic coupling circuit for converting a pulse signal into a normal logic signal is necessarily required at the final stage, that is, the output stage of the control device. Conventionally, an analog type dynamic coupling circuit, as shown in FIG. 1, has been used.

That is, the calculation result processed by the processing system of the control device is represented by a pulse signal a. This pulse signal a is first differentiated by a resistor 1 and a capacitor 2 of the dynamic coupling circuit, and at the moment of the rise of the signal b. , makes transistor 4 conductive. Then, the integrating circuit constituted by resistors 5 and 6 and capacitor 7 is discharged. Here, when the input signal a changes over time, the transistor 4 repeats conduction and non-conduction, so that the charge charged in the integrating circuit does not exceed a certain level. Further, if the transistor 4 continues to be non-conductive, after a certain period of time determined by the time constant of the integrating circuit, the transistor 10 is made conductive through the Zener diode 8, and the output potential e becomes the common level. On the other hand, when the input signal a changes over time at regular intervals, the charge in the capacitor 7 is discharged each time, and therefore cannot exceed the Zener potential of the Zener diode 8, so the transistor 10
is not conductive and the output potential e becomes the DC power supply potential.

FIG. 2 shows the waveforms of the main parts of the dynamic coupling circuit. An analog integration circuit is an important element in this dynamic coupling circuit. However, there were drawbacks in terms of reliability, such as the capacitance of the capacitor making up the device was not stable depending on environmental conditions, and reliable operation could not be expected during long-term use.

The purpose of the present invention is to solve the drawbacks of the conventional analog type, and by digitalizing it, it is possible to integrate it with a simple circuit configuration, and to ensure high reliability with reliable operation stability. An object of the present invention is to provide a signal conversion circuit.

The present invention applies waveform shaping to an input signal using a flip-flop circuit, such as a J-K flip-flop, and further uses the J-K flip-flop to generate a signal whose phase is shifted by half a period based on the shaped signal. Dynamic coupling is performed by exclusive ORing the reference signal and the phase-shifted signal.

Hereinafter, one embodiment of the present invention will be described with reference to FIGS. 3 and 4. The input signal f is waveform-shaped first through the first JK flip-flop 13 using a timing pulse g synchronized with the input signal f to obtain a reference signal h. Here, the time-varying portion of the input signal f is converted into a pulse signal with a duty cycle of 50%. Then, through the second JK flip-flop 14, a signal i whose phase is shifted by one period of the timing pulse g is obtained. That is, the signals h and i are the Q outputs of the first and second JK flip-flops 13 and 14, and as shown in FIG. 4, the signals h and i have different levels in the time-varying portion. In the parts that do not change over time, the signals are at the same level. These signals h and i are input to an exclusive OR element 15, which distinguishes between time-varying parts and time-invariant parts, and converts the input signal f into a normal logic signal e. Note that the third J-K flip-flop 17
is provided for waveform shaping and for removing spikes expected to occur in the output of the exclusive OR 15. This flip-flop 17
The clock pulse uses a timing pulse k which is synchronized with and out of phase with the timing pulse g. Of course, if spikes do not affect the operation of the circuit, the inverter 16, JK flip-flop 17, and timing pulse k are unnecessary. Further, although a JK flip-flop is used in this embodiment, it can be replaced with a circuit having an equivalent function.

As explained above, according to the present invention, dynamic coupling using digital quantities can be realized with a simple circuit configuration, and sufficiently high reliability can be obtained compared to the analog type.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram showing a conventionally used analog dynamic coupling circuit, and Figure 2 is a circuit diagram of the analog dynamic coupling circuit shown in Figure 1.
3 is a circuit diagram showing an embodiment of the digital signal conversion circuit of the present invention, and FIG. 4 is a digital dynamic coupling circuit shown in FIG. 3. FIG. 3 is a characteristic diagram showing waveforms of various parts in the example. 1,5,6,9...Resistor, 2,7...Capacitor, 3...Diode, 4,10...Transistor, 8...Zena diode, 11...DC constant voltage power supply, 12,16...Inverter ,13,1
4,17...J-K flip-flop, 15...
Exclusive OR element.

Claims (1)

[Claims] 1. In a digital signal conversion circuit provided at the output stage of a control device and for converting output pulses of the control device into normal logic signals, a first flip-flop that shapes the waveform of the output pulses to obtain a reference pulse signal; a second flip-flop that obtains a pulse signal obtained by shifting the phase of the reference pulse signal by half a period; and exclusive OR of each output of the first and second flip-flops to obtain the normal logic signal. A digital signal conversion circuit consisting of elements.