JPS6253581A - Encoding device for sound multiplexing television signal - Google Patents

Abstract

PURPOSE:To simplify the constitution of hardware and to reduce the volume of transmitting information and to eliminate the trouble of mutual interference due to a synchronism by generating a sampling clock for a sound signal phase locked to the period of a multiplexed frame to be outputted to a transmission line. CONSTITUTION:The sound signals of channel 1 and channel 2 from input terminals 12 and 13 are converted to digital signals d1 and d2 at sound signal encoders 31 and 32, being stored on a memory 5. These sound data are read out alternatively from a memory 5 by sampling unit in the sequence of the channel 1 and the channel 2, and are multiplexed with a television signal data V having the share of one horizontal scanning section outputted from a television signal encoder 2 at a multiplexing part 6, and a frame synchronizing signal is added on them and they are put together in one digital frame, outputted from the multiplexing part 6. Thereby, a buffer memory for sound, a control circuit for the buffer memory and a complicated control or an interpolation filter, etc. are not required, the constitution of the hardware is simplified.

Description

[Detailed description of the invention]

[Industrial Application Field] The present invention relates to an encoding device that converts an audio signal and a television video signal (hereinafter referred to as a "television signal") into a digital signal and transmits the digital signal. [Prior Art] Generally, a television signal is sampled and encoded in synchronization with a synchronization signal of the television signal. The encoding method is P
There are methods such as CM and DPCM. In the encoded digital data, data for one scanning line of a television signal or an integral multiple thereof is combined into one digital frame, multiplexed with audio data, etc., and transmitted. Generally, the sampling clock for audio encoding is chosen independently of the sampling clock for the television signal. Therefore, in order to multiplex audio signal data into a frame based on the television signal clock, speed matching is required, and for this purpose, a buffer memory and a backup memory control circuit are used. Furthermore, since the number of samples of audio data multiplexed into one digital frame is not constant, it is necessary to send the number of samples to be sent. [Problems to be Solved by the Invention] The above-mentioned conventional device for multiplex transmission of audio signals requires a buffer memory and a buffer memory control circuit, making the device configuration complicated and control complicated as well. Moreover, it is necessary to send the number of audio samples for each digital frame, and there is a drawback that decoding is troublesome at the receiving section. Against this

[-1 If the sampling clock for the audio signal is synchronized in phase with the period of the digital frame, the audio signal data will match the speed of the digital frame, so no buffer memory is required, and the number of samples sent per digital frame can be kept constant. Moreover, if the clock system is shared with the clock system for television signals, the hardware configuration will be further simplified. However, even in this method, unless the ratio of the sampling frequency of the television signal and the sampling frequency of the audio signal is an integer, the sampling points of the audio signal must be determined by processing such as interpolation, and the hardware The software configuration becomes complicated. The reason for this will be explained below using an example. In this method, the sampling frequency feB of the audio signal is a multiple of the horizontal synchronization frequency f[of the television signal, for example, fvs=A*fH
Settings are made so that audio signals of A samples can be multiplexed and transmitted on K selected 1 digital frames. For example, A=2.5
, f H=15.784KHz, 'vs'
39.88'kG3z (Audio signal band=15KHz
), it is possible to multiplex 5 samples of audio data into a digital frame every 17 frames. Since the sampling frequency fVB is created from the sampling clock of the television signal system, f B / f depends on the value of the sampling frequency fI3 of the television signal.
V8 may not be an integer. For example, r s =18.4 MI (Z (=852 f
In case of H), f s/ fvs = 852 f yt/
2.5 f H2 840.8. In such cases, the sample points of the audio signal cannot actually be realized, so processing such as interpolation becomes necessary. Means for Solving Problem C] The audio multiplex television signal encoding device of the present invention extracts a horizontal synchronization signal from a television video signal, and performs sampling for the television video signal phase-synchronized with the horizontal synchronization signal. A clock, a clock circuit that generates an audio signal sampling clock that is phase-synchronized with a predetermined digital frame cycle, and a television video signal that converts the television video signal into a digital signal using the television video signal sampling clock. a signal encoder; an audio signal encoder that converts an audio signal into a digital signal using the audio signal sampling clock; a memory that stores an output of the audio signal encoder; and a television video signal sample. a multiplexing section for multiplexing a fixed number of samples of audio data output from the memory and the output of the television video signal encoder onto the digital 71/- frame according to a digitalization clock; It has a line interface unit that sends output to a transmission line. In this way, DigiMelf 1 has a clock circuit that generates a sampling clock for audio signals that is phase-synchronized with the period of the multiplexed frame (digital frame) output to the transmission path. By multiplexing, (1) the hardware configuration is simplified by eliminating the need for audio buffer memory and backup memory control circuits, and (2) the number of samples sent out per digital frame is constant, so the receiving side There is no need to send the number of samples to be sent, and the amount of transmitted information is reduced. ■If the period of the digital frame is synchronized with the sampling clock of the television signal system,
Problems caused by mutual interference due to non-synchronization are eliminated. [Embodiment] An embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows an embodiment of the audio multiplex television signal encoding device of the present invention (number of channels n = 2, number of samples m =
5), FIG. 2 is a block diagram showing the configuration of the clock circuit 4 in FIG. 1, FIG. 3 is a block diagram showing the configuration of the phase synchronized clock generator 42 in FIG. 2,
FIG. 4 is a time chart of each signal. The audio multiplex television signal encoding and converting device of this embodiment is as follows:
As shown in FIG. 1, input terminals 11, 12, 13, a television signal encoder 2, and an audio signal encoder 81+82.
, a clock circuit board, a memory 5 , a multiplexing section 6 , a line interface section 7 , and an output terminal 8 . The clock circuit 4 extracts a horizontal synchronizing signal a (frequency fH) from the television signal inputted from the input terminal 1]-5, and a sampling clock h (frequency fB) for the television signal whose phase is synchronized with the horizontal synchronizing signal a. is generated and outputted to the television signal encoder 2 and the multiplexer 6, and the horizontal synchronizing signal a
K phase-synchronized audio signal sampling clock b (88 in frequency) is generated and output to audio signal encoders 31 and 32.
1'ro. The television signal encoder 2 converts the television signal input from the input terminal 11 into a digital signal using the television signal sampling clock h. The audio signal encoders 81 and 82 receive channels 1. The audio signals CI and C2 of channel 2 are converted into digital signals (audio data) using the audio signal sampling clock b.
Convert to dx and d2. Memo! J511 Store these audio data d1 * d2. The multiplexing unit 6 receives the audio data d output from the memory 5.
l s d2 and the digital signal output from the television signal encoder 2 are multiplexed using the television signal sampling clock h to construct a predetermined digital frame f. The line interface section 7 converts the signal level of the output e of the multiplexing section 6 to match the transmission path, performs speed matching, and sends it from the output terminal 8 to the transmission path. As shown in the second diagram, the clock circuit 4 includes a phase synchronized circuit 4i1 and a phase synchronized clock generator 42. The phase synchronization circuit 41 extracts the horizontal synchronization signal of frequency fH (=1-5.734 KHz) from the television signal input from the input terminal ], performs phase synchronization with the horizontal synchronization signal of frequency fH (=1-5.734 KHz), Generates the .453 MHz sampling clock h for television signals and other control signals. The phase synchronization clock generator 42 inputs the horizontal synchronization signal a generated by the phase synchronization circuit 41, and generates an audio signal with a frequency of 89.8361G1z so that the multiplexer O multiplexes 5 samples of audio data into one digital frame. sampling clock b
occurs. The phase synchronized clock generator 42, as shown in FIG.
Frequency divider circuit 421, phase comparator 422 and voltage controlled oscillator 4
23 and a frequency dividing circuit 424. On the back of the frequency dividing circuit 42, the frequency fH input from the phase synchronization circuit 41 is 15.7341
The frequency of the horizontal synchronizing signal a of 0 (z is divided by 2 (=n). The frequency of the frequency dividing circuit 4241d is divided by 5. The output of the voltage controlled oscillator 423 is divided by 5. The voltage controlled oscillator 423 is controlled by the output of the phase comparator 422 so that its frequency becomes 89.836 IG (Z), and is synchronized in phase with the horizontal synchronization signal, and the frequency f'ss
outputs the aforementioned audio signal sampling clock b of 39.886 Kl(Z).Next, the operation of the audio multiplex television signal encoding apparatus of this embodiment will be explained with reference to FIGS. 1 and 4. The audio signals of channel 1 and channel 2 from the input terminal 12.13 are sent to the memories 5 to 5 by the audio signal encoder 31.32.
Channel 1 in sample units. Channel 2 is read out alternately, and the multiplexer 6 multiplexes it with the TV signal data V for one horizontal scanning section output from the TV signal encoder 2. A frame synchronization signal F is added. digital frame f
and output from the multiplexer 6. In this embodiment, the period of the digital frame is equal to the period of the horizontal synchronizing signal a, and the period of the sampling clock h of the television signal system is
The phase synchronization is 1-, but the phase synchronization is not necessarily required. [Effects of the invention] As explained above, the great invention has the advantage of increasing the number of output channels to the transmission line.
By having a clock circuit that generates an audio signal sampling clock that is phase-synchronized with the period of an i-frame (digital frame), (1) audio buffer memory, buffer memory control circuit, and complex power control or (2) Since the number of audio samples transmitted in multiplexed frames (digital frames) is constant, there is no need to send the number of samples to the receiving side. If the period of the C31 digital frame is synchronized with the sampling clock of the television signal system, all the signals are synchronized, and there is no problem due to mutual interference due to non-synchronization. effective.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the audio multiplex television signal encoding device of the present invention, FIG. 2 is a block diagram showing the configuration of the clock circuit 4 in FIG. 1, and FIG. FIG. 2 is a block diagram showing the configuration of the phase synchronized clock generator 42, and FIG. 4 is a time chart of each signal. 11s Cm C...Input terminal, 2...Television signal encoder, 31.32...Audio signal encoder, 4...Clock circuit, 5...Memory, 6...Multiplexing Part, 7... Line interface part, 8... Output terminal to transmission path, a... Horizontal synchronization signal, b... Sampling clock for audio signal, 01.02... Audio signal, di , d2...Output of audio signal encoder 31, 32 (
(audio data), 2...Output of the TV signal encoder 2, e...Output of the multiplexer 6, f...Digital frame, h...Sampling clock for the TV signal.

Claims (1)

[Claims] A sampling clock for a television video signal that extracts a horizontal synchronization signal from a television video signal and is phase-synchronized with the horizontal synchronization signal, and a sampling clock for an audio signal that is phase-synchronized with the period of a predetermined digital frame. a clock circuit that generates a sampling clock; a television video signal encoder that converts the television video signal into a digital signal using the television video signal sampling clock; and a television video signal encoder that converts the television video signal into a digital signal using the audio signal sampling clock. an audio signal encoder for converting into a digital signal; a memory for storing the output of the audio signal encoder; and a predetermined number of samples of audio output from the memory by the television video signal sampling clock. An audio multiplexing television signal encoding device comprising: a multiplexing unit that multiplexes data and the output of the television video signal encoder onto the digital frame; and a line interface unit that sends the output of the multiplexing unit to a transmission path. .