JPS6253372U - - Google Patents
Info
- Publication number
- JPS6253372U JPS6253372U JP14429085U JP14429085U JPS6253372U JP S6253372 U JPS6253372 U JP S6253372U JP 14429085 U JP14429085 U JP 14429085U JP 14429085 U JP14429085 U JP 14429085U JP S6253372 U JPS6253372 U JP S6253372U
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- crosstalk
- wiring pattern
- display
- waveform
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004088 simulation Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 4
- 239000000523 sample Substances 0.000 description 1
Landscapes
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
- Feedback Control In General (AREA)
Description
第1図は、この考案の実施例である配線クロス
トーク観察装置の構成図、第2図、第3図、第4
図は、上記実施例の動作を説明するための表示例
示図、第5図、第6図、第7図は、配線クロスト
ークの一般的な説明図、第8図は、従来例装置の
構成図である。
1は被テストプリント基板、2はカードテスタ
、3はシンクロスコープ、4はプローブ、5はコ
ンソール、6は磁気デイスク、7は配線パターン
記憶部、8は配線経路表示・移動・変更機構、9
はCRT、10はタブレツト、11はデータ・カ
ーソル、12は配線クロストーク模擬・表示機構
、13は中央演算処理部(CPU)、14はイン
タフエイス、15は信号Aの通る配線パターン、
16は信号Bの通る配線パターン、17は信号C
の通る配線パターン、18はクロストークを与え
る信号A,Bの波形表示部、19はクロストーク
を受ける信号Cの波形表示部。なお、図中、同一
符号は同一、又は相当部分を示す。
Figure 1 is a configuration diagram of a wiring crosstalk observation device that is an embodiment of this invention, Figures 2, 3, and 4.
The figure is a display example diagram for explaining the operation of the above embodiment, Figures 5, 6, and 7 are general explanatory diagrams of wiring crosstalk, and Figure 8 is the configuration of a conventional device. It is a diagram. 1 is a printed circuit board to be tested, 2 is a card tester, 3 is a synchroscope, 4 is a probe, 5 is a console, 6 is a magnetic disk, 7 is a wiring pattern storage section, 8 is a wiring route display/movement/change mechanism, 9
is a CRT, 10 is a tablet, 11 is a data cursor, 12 is a wiring crosstalk simulation/display mechanism, 13 is a central processing unit (CPU), 14 is an interface, 15 is a wiring pattern through which signal A passes,
16 is the wiring pattern through which signal B passes, 17 is signal C
18 is a waveform display section for signals A and B that give crosstalk, and 19 is a waveform display section for signal C that receives crosstalk. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.
Claims (1)
動・変更機構と、表示手段と、これらを支配する
中央演算処理部とを含む配線クロストーク観察装
置において、配線クロストーク模擬・表示機構を
設け、前記表示手段は複数個の互いに関連のある
所望の配線パターンと夫々の配線パターンを流れ
る信号の波形とが表示されるものであり、前記配
線パターンの部分的な変更が前記配線パターン表
示・移動・変更機構によつてなされ、これに伴な
う信号の波形の変化が前記配線クロストーク模擬
・表示機構によつて模擬的に表示されるようにし
た配線クロストーク観察装置。 (2) 前記表示手段は、配線パターンの表示のた
め、および、前記配線パターンを流れる信号の波
形の表示のために個別に設けられている実用新案
登録請求の範囲第1項記載の配線クロストーク観
察装置。[Claims for Utility Model Registration] (1) In a wiring crosstalk observation device including a wiring pattern storage unit, a wiring route display/movement/change mechanism, a display means, and a central processing unit controlling these, A crosstalk simulation/display mechanism is provided, and the display means displays a plurality of mutually related desired wiring patterns and the waveform of the signal flowing through each wiring pattern, and the display means displays a plurality of mutually related desired wiring patterns and the waveform of the signal flowing through each wiring pattern. A wiring crosstalk in which a change is made by the wiring pattern display/movement/change mechanism, and a corresponding change in the signal waveform is displayed in a simulated manner by the wiring crosstalk simulation/display mechanism. Observation device. (2) The wiring crosstalk according to claim 1, wherein the display means is separately provided for displaying the wiring pattern and for displaying the waveform of the signal flowing through the wiring pattern. Observation device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14429085U JPS6253372U (en) | 1985-09-24 | 1985-09-24 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14429085U JPS6253372U (en) | 1985-09-24 | 1985-09-24 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6253372U true JPS6253372U (en) | 1987-04-02 |
Family
ID=31054746
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14429085U Pending JPS6253372U (en) | 1985-09-24 | 1985-09-24 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6253372U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1999059089A1 (en) * | 1998-05-14 | 1999-11-18 | Fujitsu Limited | Noise checking method and device |
-
1985
- 1985-09-24 JP JP14429085U patent/JPS6253372U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1999059089A1 (en) * | 1998-05-14 | 1999-11-18 | Fujitsu Limited | Noise checking method and device |
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