JPS6253115B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a color synchronization circuit for synchronizing a color subcarrier signal applied to a color demodulator of a color television receiver with a color burst signal in a color television signal.

The above color synchronization circuit generally compares the output of a voltage controlled oscillator (VCO) for color subcarrier generation with a color burst using a phase comparator (phase detector), and controls the oscillation frequency and phase of the VCO based on the output. It is configured as a so-called PLL type.

By the way, a sweep voltage that repeats at a constant cycle is superimposed on the output voltage of the phase comparator in such a color synchronization circuit, and the combined voltage after superimposition is used for color subcarrier generation.
The applicant has filed a patent application for a sweep type PLL type color synchronization circuit which is given as a control signal to the VCO.
It has been filed separately as No. 55-127583. Therefore,
First, the reason for providing this sweep type color synchronization circuit will be explained.

That is, a color burst signal in a color video signal from a video tape recorder, a video disc player, etc. differs from that in a television broadcast signal, and may have a large frequency and phase shift. Therefore, in order to synchronize the color synchronization circuit even with such burst signals, for example, by using a low Q value resonant element in the VCO for the color subcarrier, its variable frequency can be adjusted. It is only necessary to set a wide range, and thus a wide pull-in range of the color synchronization circuit. However, if the pull-in range is too wide, the color synchronization circuit will respond to noise in a weak electric field and malfunction, so it is necessary to prevent the output voltage of the PLL phase comparator from becoming too large to avoid malfunction. There is. However, this makes it difficult for the color synchronization circuit to synchronize, especially immediately after channel switching or power-on, so by superimposing a sweep voltage on the output voltage of the phase comparator, the control voltage to the VCO can be changed. This temporarily increases the VCO's oscillation frequency, thereby forcibly changing the VCO's oscillation frequency and pulling it into the synchronous lock point.

Incidentally, the output of a phase comparator whose reference input is a color burst signal that appears every 1H period is intermittent and not continuous. Therefore, the discharging of the integrating circuit constituting the low-pass filter for smoothing the comparative output, that is, the discharging that occurs from once this integrating circuit is charged by the above comparative output until it is charged again is: This causes jitter in the color synchronization circuit. At this time, in the above-mentioned sweep type color synchronization circuit, this discharge is performed via the output impedance of the sweep voltage generation circuit connected to the integrating circuit (low-pass filter), so in order to suppress the above-mentioned jitter, It is only necessary to devise measures such that the output impedance of the above-mentioned sweep voltage generating circuit becomes a sufficiently high impedance.

Therefore, the present invention is directed to the above-mentioned sweep method.
In a PLL type color synchronization circuit, a voltage obtained by superimposing a sweep voltage on the low-pass output voltage of a phase comparator is applied to a VCO for color subcarrier generation via an unbiased emitter follower transistor. , to solve the above problem.

The following will explain the embodiments shown in the drawings.

First, FIG. 1 shows the color synchronization circuit of the present invention together with related circuits, and numeral 1 is a color amplifier that amplifies a composite color signal (carrier color signal and color burst) provided via a bandpass circuit. Manual gain adjustment means and ACC (Automatic
(Color Control) It is equipped with a function that automatically changes the gain depending on the voltage. 5 is a voltage controlled oscillator to generate a color subcarrier of 3.579545 MHz, and its output is sent to an R-Y demodulator via a taint control circuit 6 and a phase shifter 7 to enable manual hue adjustment. 2 and BY demodulator 4 with a fixed phase difference (generally 90 degrees), and also to phase comparator 9. A phase comparator 9 compares the phase of the color burst extracted by the burst gate 8 from the composite color signal appearing at the output of the color amplifier 1 with the color subcarrier, and the output is passed through a low-pass filter 10 to a voltage-controlled oscillator 5.
is given as a control voltage. A sweeper circuit 11 is provided to ensure color synchronization by the output of the phase comparator 9, and outputs a stepped sweep voltage waveform as described later. Reference numeral 12 denotes a means for applying a pulse voltage of a constant frequency (for example, the repetition frequency of a color burst, fH/16 where fH is the horizontal frequency) to make the output of the sweeper circuit 11 stepwise. 1 4 receives the output of the B-Y demodulator 4 and the color burst period output of the R-Y demodulator 2 or G-Y demodulator 3, and performs the function of the color amplifier 1 when receiving monochrome broadcasts or abnormally receiving color broadcasts. The output of this color killer circuit 14 is simultaneously supplied to the sweeper circuit 11, and when color broadcasting is normally received (for example, when color synchronization is achieved), the output of the color killer circuit 14 is supplied to the sweeper circuit 11. The circuit 11 is stopped, otherwise it is activated. 13, even when the pulse P ₂ disables the killer output to the color amplifier 1 during the color burst period or the horizontal retrace period including the color burst, and the color amplifier 1 should be stopped, it is stopped at least during the color burst period. This is a killer nullification method to prevent this from happening.

The voltage-controlled oscillator 5 is constructed as shown in FIG. 2, but instead of the conventional crystal oscillator, a oscillator 15 (hereinafter referred to as "LiTa oscillator") made of LiTaO ₃ as a base material is used as the oscillator. I am using it. Third
The equivalent circuit of this LiTa resonator is shown in the figure, and the fourth
The figure shows its input/output characteristics (horizontal axis is frequency, vertical axis is phase and output), but compared to conventional crystal oscillators, the Q value is low and the frequency shift up to the 3dB attenuation point, △f ₁ , △ There is also an f ₂ of about 1 to 2.6KHz.

In FIG. 2, consider the operation assuming that points a and b of the oscillation loop are open and signal ei is input from point b. First, R _B /R _B +R ₃₃ ei is input to the base of one transistor T ₂₅ forming a differential pair until the impedance of the LiTa vibrator 15 becomes 0 at the resonance frequency. The other transistor of the differential pair T ₂₄
Since ei is input as is to the base of , the differential pair transistors T ₂₄ and T ₂₅ amplify the input difference voltage (1-R _B /R _B +R ₃₃ )ei. If the collector outputs of T ₂₄ and T ₂₅ are e ₂₄ and e ₂₅ , respectively, then e ₂₄ and e ₂₅ are out of phase.
180° different. e ₂₄ and e ₂₅ are input to the emitter follower transistors T ₃ and T ₄ respectively, but the resistors R ₁₂ , R ₁₃ and R ₁₈ are selected so as to satisfy the relationship R ₁₂ + R ₁₃ = R ₁₈ . , there is no residual signal at point d, and no signal is input to transistor _T17 . e ₂₄ is emitter follower transistor T ₃
Phase shift circuit 1 consisting of R _A and C _A from point e through
Enter 6. If the signal voltages applied to both ends of R _A and C _A are e _R and ec, respectively, when the impedances of R _A and _CA are equal, e _R and ec have a phase difference of 90°.
These e _R and ec are differential pairs T ₁₄ , T ₁₅ , T ₁₆ ,
Join _T17 . By differential pairs T ₁₄ , T ₁₅ , T ₁₆ , T ₁₇
180° inverted me _R , nec (m, n are constants) is f
The sum is added at point k(e _R +ec) (k is a constant) and is output to point a via emitter follower transistors T ₂₁ and T ₂₃ . When points a and b are short-circuited, the output is added to ei at point b, and the same operation is performed to oscillate. FIG. 5 shows a vector diagram in this case.

Next, FIG. 6 shows a phase comparator 9 and a burst gate 8, which are integrally formed as a double-balanced differential circuit, and one of the lower differential pairs T ₁₃₀ and T ₁₃₁ . The base of T ₁₃₁ is fixedly biased by Vo ₁ , while the base of T ₁₃₀ is provided with a composite color signal from color amplifier 1. Since the constant current source transistor T ₁₃₂ is supplied with a burst gate pulse to its base and becomes conductive only during the burst gate pulse period, only the color burst is extracted from the composite signal and the lower differential pair T ₁₃₀ ,
It occurs in the collector of T ₁₃₁ , and the upper differential pair T ₁₂₆ , T ₁₂₇ ,
It is supplied to the emitters of T ₁₂₈ and T ₁₂₉ . Upper differential pair
Among T ₁₂₉ , T ₁₂₇ , T ₁₂₈ , and T ₁₂₉ , a fixed bias Vo ₂ is given to the bases of T ₁₂₇ and T ₁₂₈ , and T ₁₂₆ ,
The color subcarrier CW from the voltage controlled oscillator 5 is applied to the base of T ₁₂₉ , and a phase comparison (by multiplication) between the color burst and the color subcarrier is performed. As a result, the first output appears at point g, where the collectors of T ₁₂₆ and T ₁₂₈ are commonly connected, and the second output appears at point h, where the collectors of T ₁₂₇ and T ₁₂₉ are commonly connected. The first and second outputs are in opposite phase to each other, and the first output is a transistor
Consisting of transistors T ₁₃₃ , T ₁₃₄ , T ₁₃₅ and resistors R ₁₅₃ , R ₁₅₄ , R ₁₅₅ through a current mirror circuit 17 formed of T ₁₂₀ , T ₁₂₁ , T ₁₂₂ and resistors R ₁₄₆ , R ₁₄₈ , R ₁₄₈ It appears at point i from the current mirror circuit 18 as the collector output of the transistor _T135 .
On the other hand, the second output is the transistor T ₁₂₃ , T ₁₂₄ ,
T ₁₂₅ , resistors R ₁₄₉ , R ₁₅₀ , and R ₁₅₁ pass through a current mirror circuit 19 to output the transistor T ₁₂₄ to point i.

Figure 7 shows the switching operation of the transistor due to the color burst and the color subcarrier CW, and the output waveform based on the switching operation.
Taking the case where the CW (FIG. 7B) is shifted by -1/2 fH as an example, the signals of those beat frequencies, that is, the phase comparison output, appear as shown in FIG. 7C. This output signal is transmitted from point i (Figure 6) as a double time constant circuit (R _C and C _D in Figure 6 form a high frequency filter, and R _C and C _C form a low frequency filter). The voltage is supplied as a control voltage to the voltage controlled oscillator 5 through the formed low-pass filter 10. In FIG. 8, the horizontal axis is time, and the vertical axis is the control voltage, but A simply represents the output of the phase comparator 9, when it is not applied to the PLL loop, that is, when automatic color synchronization is not applied. be. If we now consider the case where automatic color synchronization is applied, t ₀ to _{t 6}
Since the control voltage is positive during the period t 6 to t 12 , the oscillation frequency of the voltage controlled oscillator 5 increases and the beat frequency decreases, while during the period t ₆ to _{t 12} the control voltage is negative, so the beat frequency increases. It will look like B in Figure 8. The control voltage curve B crosses the potential E that stably oscillates at 3.579545MHz at two points Z ₁ and Z ₂ , but the slope of the above curve is positive at Z ₁ point is an unstable point and the slope is negative Z ₂ Since the point is a stable point, when the control voltage reaches the _Z2 point, the voltage controlled oscillator 5 changes the oscillation frequency.
Locked to 3.579545MHz.

By the way, as mentioned earlier, the LiTa resonator 15 is used as the resonator of the voltage-controlled oscillator 5, but when such a LiTa resonator is used, the price of the resonator is comparable to that using a crystal resonator. Not only can you enjoy the advantage of being much cheaper than in the case of
There are also benefits such as: In other words, if the frequency of the color burst at the broadcasting station deviates from the regular 3.579545MHz, the color subcarrier generated by the voltage controlled oscillator 5 must match that color burst. In such cases, a voltage-controlled oscillator using a LiTa resonator with a low Q can suitably deal with the problem. This is because if Q is high, the gain will drop significantly at the shifted color burst, but if Q is low, the gain will drop only slightly. The frequency variable range depending on the control voltage of a voltage controlled oscillator using a LiTa resonator is
Since the Q of the LiTa resonator 15 is small, it has a wide frequency range of approximately ±7 kHz, which is approximately 10 times as wide as the frequency variable range of a conventional voltage controlled oscillator using a crystal resonator, which is approximately ±700 Hz. A schematic representation of the frequency spectrum of color bursts is shown in Figure 9, where they appear at _fH intervals centered at 3.579545MHz. Of these, only the frequency of 3.579545MHz is required,
± from 3.579545MHz to the next frequency component
Since there is an interval of 15.75 KHz (=f _H ), even in a voltage-controlled oscillator using a LiTa resonator, the color synchronization circuit will not malfunction due to adjacent frequency components. However, as mentioned above, the frequency variable range of a voltage-controlled oscillator using a LiTa resonator is about 10 times that of one using a crystal resonator, so a voltage-controlled oscillator using a LiTa resonator is used. The PLL loop pull-in range is also approximately 10 times larger. If the frequency pull-in range is wide, there is a problem in that the noise resistance in a weak electric field deteriorates (noise is generally intense in a weak electric field, but the device operates even with this noise). Therefore, we focused on the fact that the oscillation frequency variable range of the voltage-controlled oscillator is proportional to the amplitude of the beat signal generated at the output of the phase comparator, and we applied the beat signal to a low-pass filter formed as a double time constant circuit as shown in Figure 6. 10, it is sufficiently attenuated (for example, to 1/10) to narrow the frequency pull-in range, and the noise resistance characteristics in a weak electric field are improved to the same level as when using a crystal resonator. By the way, the resistance R _C of low-pass filter 10 is 390Ω, and the capacitor C _C is
4.7μF, C _D is 10000PE, R ₁₅₂ is 500Ω.
In addition, since the beat signal amplitude is reduced in this way, as shown in FIG.
This will cause a problem that the loop will not reach the stable potential E of 3.579545MHz and therefore will not be locked to 3.579545MHz.In order to solve this problem, a sweeper circuit 11 is provided to control the beat signal and sweep voltage. The beat signal is superimposed with
To reach a stable potential of 3.579545MHz,
Lock the PLL loop. In this case, the sweep voltage waveform is not a mere sawtooth waveform but a step waveform as described later. If the PLL is locked by inputting a continuous wave as a reference signal, a sawtooth waveform will be fine, but if an intermittent signal such as a color burst is used as a reference signal for automatic color synchronization, a sweep voltage waveform is acceptable. This is to solve the inconvenience that automatic color synchronization is not locked even when superimposed. For example, in a PLL using an intermittent signal as a reference signal as shown in Fig. 12 (b), if a simple sawtooth wave voltage is used as the sweep voltage to be superimposed as shown in Fig. ₁₁ , it will be stable at point X in Fig. 12. An attempt is made to lock to potential E, but since the information as a reference signal is intermittent, the phase detection output of the PLL loop is insufficient and lock is not achieved.The same happens at the next falling point of the sawtooth wave at point _X2 . It is not possible to lock. It goes without saying that locking cannot be achieved at the rise of the sawtooth wave because it is steep. Furthermore, in a PLL that uses a continuous signal as a reference signal instead of an intermittent signal, the detection output and therefore the control output are sufficient, but even in this case, there is still the drawback that locking is difficult to achieve by simply superimposing a sawtooth wave voltage. This is because, as shown in FIG. 13, even if the control voltage B reaches the stable potential E at point _Z3 , the sweep voltage S is falling, so there is a high possibility that it will not be locked.

On the other hand, if a stepwise sweep voltage waveform is used as shown in FIG. 14 (in the embodiment, only the falling edge is used, it is sufficient to make the stepwise waveform only for the falling edge), the sweep voltage S is does not decrease, so the stable potential E as shown in Figure 15
During the T period close to , the comparison output of the phase comparator 9 (color burst and color subcarrier beat signals) crosses the stable potential E many times and has the opportunity to be locked at points Z ₄ , Z ₅ , and Z ₆ . Moreover, in reality, the T period is selected to be long (about 8 times the horizontal period), so the color burst, which is an intermittent signal, has multiple lines of 8H and is used for the T period. A sufficient signal will be obtained, and locking to the stable potential E will be ensured.

Next, the sweeper circuit 11 will be explained with reference to the embodiment shown in FIG.

In Fig. 16, when the capacitor C _C of the low-pass filter 10 is not charged, if the potential at point k is E ₁ , the potential at point l is E ₁ −Vf (where
Vf represents the base-emitter voltage when the transistor is conductive. Since capacitor C _C is not charging, the potential at point m is 0, and the transistor
T ₂₇ and T ₂₉ are in the cut-off state. In this case n
When calculating the potential at the point, k point → R ₂₄ → R ₂₇ → R ₃₄ → T ₂₈
→R ₃₅ →A current flows through the earth path, and this current is
Determined by D ₅ , E ₆ , D ₇ , T ₂₈ , R ₃₅ , i=2Vf/R
₃₅ , the potential _E2 at point n is _E2 = _E1 -i( _R24 + _R27 )= _E1-2Vf / _R35 ( _R24 + _R27 ). Therefore, let us design in advance so that E ₂ =E ₁ -Vf. Since E ₂ <E ₁ −Vf, T ₃₄ of the differential pair T ₃₄ and T ₃₅ is turned off and T ₃₅ is turned on. When T ₃₅ is on, current flows through resistor R ₄₁ and causes a voltage drop, turning on transistors T ₃₁ , T ₃₂ , and T ₄₀ . When the transistor T ₄₀ is turned on, current flows through the transistor T ₄₀ and the transistor T ₄₇
Since the base current is supplied to turn on the transistor _T47 , the collector potential of the transistor _T47 becomes 0V if the resistance between the collector and emitter is ignored, so no base current flows through the transistor _T30 . Transistor T ₃₀ is cut off. As mentioned above, since the transistor T ₃₁ is in the on state, a charging current flows into the capacitor C _C through the point m. At this time, since the transistor _T30 is in the cut-off state as described above, the current does not flow through the transistor _T30 . As the capacitor C _C is charged, the potential at point m increases, and accordingly, the potential at point n also increases. the transistor
Since the transistor T ₃₂ is also in the on state along with T 31 and T ₄₀ , the potential difference generated across _the resistor R ₄₆ increases and the potential at point l also rises, but when E ₁ is exceeded, the transistor T ₃₇ is turned off. , the transistor T ₃₉ turns on instead, so the potential at point l becomes E ₁ +
Clamped to the Vf value. When the n-point potential becomes higher than the l-point potential, in the differential pair T ₃₄ and T _{35, T 34 is} turned on and T ₃₅ is turned off. When T ₃₅ turns off, transistors T ₃₁ , T ₃₂ and T ₄₀ turn off. Then, since the transistor _T31 is turned off, no charging current flows to the capacitor _C.sub.C , so that the capacitor _C.sub.C is not charged but starts discharging. Transistor T ₄₀ turns off
No base-base current is supplied to T ₄₇ , and transistor T ₄₇ is also turned off. Therefore, a bias is applied to the base of the transistor _T30 , and the charge in the capacitor C _C is discharged along the path of point m -> collector of _T30 -> emitter of _T30 -> _R36 . Transistor T ₃₂
is turned off, the potential at point l becomes E ₁ −Vf
decreases to When the differential pair T ₃₄ is turned on, the transistor T ₃₃ is turned on, and current flows from the power supply (+V _CC ) to the ground through the low resistors R ₄₃ and R ₄₄ and the transistor T ₃₃ . This is when charging the capacitor C _C (+V _CC ) → R ₃₇ → T ₃₁ → point m → capacitor C _C
This is to prevent ripples from being added to the power supply (+V _CC ) by flowing the same amount of current as the current flowing through the route. When the capacitor C _C is discharged and the potential at point n becomes lower than the potential at point l, the above-described charging and discharging is repeated.

As mentioned above, in the embodiment shown in FIG. 16, the potential at point l changes by ±Vf around _E1 , and the potential at point n also changes accordingly, so the potential at point l changes by ±Vf.
If E ₁ ±Vf changes, the potential E ₃ at point q is E ₃ = (E ₁ ±Vf−E ₁ )×R ₂₄ +R ₂₇ +R ₃₄ /R ₂₄ +R ₂₇ = ±R ₂₄ +R ₂₇ +R ₃₄ /R ₂₄ +R
₂₇ Vf changes. The maximum amplitude of the sweep voltage waveform is e
[See Figure 14], eR ₂₄ +R ₂₇ +R ₃₄ /R ₂₄ +R ₂₇ (
2Vf). As far as the above explanation is concerned, the sweep voltage is a mere sawtooth wave as shown in FIG. 11, but the frequency is applied to the base of the transistor _Q36 from the pulse supply means 12 (FIG. , fH/16, this transistor _Q36 is turned on and off, and the transistor _T30 is turned off and on accordingly, so that the potential at point m and the potential at point q have a staircase waveform during the falling period. It will become. That is, since the transistor Q ₃₆ is off at the low level of the pulse from the pulse supply means 12, the transistor T ₃₀ is in the on state [power supply (±
V _CC ) → R ₄₉ → R ₃₉ → Since the base bias given by the path of the base of T ₃₀ is not nullified, it becomes an on state], and the charge of the capacitor C _C is transferred to the collector-emitter of the transistor T ₃₀ and the resistor R ₃₆ The potentials at points m and q drop because the discharge is caused to occur through the electrodes. At the high level of said pulse, the transistor
Q ₃₆ turns on, disabling the base bias of transistor T ₃₀ and setting it to 0V, so the discharge operation of capacitor C _C by transistor T ₃₀ stops, and the potential at points m and q stops dropping. In FIG _. 16, the bases of transistors T ₃₀ and T ₃₆ are also connected to the collectors of transistors T ₄₂ and _{T 43 ,} which are turned on and off by the output of the color killer circuit 14. Since the sweeper circuit 11 is turned off, the operation/non-operation of the sweeper circuit 11 is ultimately controlled by the output of the color killer circuit 14.

The color killer circuit 14 has R as shown in FIG.
A color killer signal is generated by the color burst period outputs of the -Y demodulator 2 and the BY demodulator 4.

In the color killer circuit shown in FIG.
-The output of the Y demodulator is applied from a line 20 through a low-pass filter 21 consisting of a resistor R ₁₀₁ and a capacitor C ₂ to the base of an emitter follower transistor T ₇₆ , and through a resistor R ₉₅ on the emitter side of this transistor T ₇₆ to a comparator 22. It is supplied to the base of the transistor T ₇₇ , forming a differential pair. On the other hand, the output of the B-Y demodulator is applied from a line 23 to the base of an emitter follower transistor T ₇₉ via a low-pass filter 24 consisting of a resistor R ₁₀₈ and a capacitor C ₁₀ , and from the emitter of this transistor T ₇₉ to the other side of the comparator 22 . is given directly to the base of the transistor T ₇₈ . Here, the DC bias from the demodulator applied to the lines 20 and 23 is the same, and the resistors R ₁₀₁ and R ₁₀₈ and the capacitors C ₂ and C ₁₀ are each selected to have the same value. and the B-Y path are under the same conditions, but since the R-Y demodulator output side is provided to the comparator 22 via the resistor _R95 , this resistance is more important than the B-Y demodulator output side. It will be added at a lower value by the voltage drop due to _R95 . This voltage drop is approximately 0.3V. The output of the comparator 22 is connected to the transistor T ₇₃ ,
The signal is applied to an integrating circuit 26 via a current mirror circuit 25 formed of T ₇₄ , T ₇₅ and resistors R ₉₂ , R ₉₃ , and R ₉₄ , and is smoothed by the integrating circuit 26 . Such a smoothed output is connected to a differential pair T ₇₀ and T ₇₁ via an emitter follower transistor T 72 (T ₇₀ as a supply bias) _.
A fixed voltage V ₁ is directly applied to the base of T ₇₁ , and a diode D ₁₀ , a resistor R ₈₇ and a transistor are connected to the base of T 71 .
through the base-emitter of T ₇₂ and the common-emitter transistor T ₆₉
is supplied from the collector of the transistor _T68 to the color amplifier 1 shown in FIG.
Supplied to the base of T ₄₂ and T ₄₃ . The comparator 2
Line 2 operates only during the burst gate pulse _P1 applied to the base of constant current source transistor _T83 , and is inactive at other times.
RY demodulator output given from 0,23 and B
- Outputs of the Y demodulator outputs other than the color burst period do not affect the color killer operation.

In FIG. 17, if we consider a case where there is no color burst (for example, when receiving a black and white broadcast), the comparator 2
Since the base potential of the second differential pair transistors T ₇₇ and T ₇₈ is selected in advance to be higher than that of T ₇₈ , T ₇₇ is off and T ₇₈ is on. Therefore, no current flows through the current mirror circuit 25, and since the capacitor C _E of the integrating circuit 26 is not charged, u
The potential at the point does not increase. Therefore, in the differential pair transistors T ₇₀ and T ₇₁ on the output side, T ₇₀ is on and T ₇₁ is off. The on-state of _T70 turns on the transistor _T69 , and a high level voltage is generated at the first output point _O1 to stop the color amplifier 1. [However, since the signal at the first output point _O1 is given through the killer nullifying means 13, the color amplifier 1 is not stopped at least during the color burst period]. On the other hand, due to the off state of the transistor _T71 , the transistor _T68 is off, and no voltage for stopping the sweeper circuit 11 is generated at the second output point _O2 , so that the sweeper circuit 11 is in the operating state.

Next, if we consider the case where there is a color burst and it is in a normal reception state, the color burst signal has a phase difference of 180° from the B-Y demodulation axis as shown in Figure 18, so if there is a color burst, Since the color burst demodulation output of the B-Y demodulator 4 becomes a negative voltage, the potential of the line 23 decreases, and therefore, when the base potential of the transistor T ₇₈ also decreases beyond a certain level, the states of the transistors T ₇₇ and T ₇₈ are reversed. T ₇₇ is on, T ₇₈ is off. When the transistor _T77 is turned on, a current flows through the current mirror circuit 25, and a current for charging the capacitor C _E flows through the point u, so that the potential at the point u rises. Due to the rise in the potential at point u, the base potential of the transistor _T71 also rises, turning off the differential pair transistor _T70 and turning on _T71 . Transistor T ₆₉ when T ₇₀ is turned off
is turned off, and no voltage is generated at the first output point _O1 that would stop the operation of the color amplifier 1. Therefore, the color amplifier 1 operates normally. On the other hand, turning on transistor T ₇₁ turns on transistor T ₆₈
is also turned on, a high level is generated at the second output point _O2 , and this high level voltage is applied to the bases of the transistors _T42 and _T43 of the sweeper circuit 11, so the transistors _T42 and _T43 are turned on and the transistors
Since the base potentials of T ₃₀ and T ₃₆ are clamped to the ground potential, transistors T ₃₀ and T ₃₆ are fixed off, and the sweep operation of the sweeper circuit 11 is stopped.

In FIG. 17, when the B-Y demodulator produces a color burst demodulation output in the positive direction or the R-Y demodulator produces a color burst demodulation output in the negative direction (therefore, when the color synchronization is disturbed) ) Auxiliary circuit 2 for generating a control voltage in the direction to stop color generation (because even if color occurs, it will mostly be color noise)
7, and its auxiliary circuit 27 is formed by differential pair transistors T ₈₁ and T ₇₂ , constant current source transistor T ₈₄ and resistor R ₁₀₂ , and backflow prevention diode D ₁₁ . The R-Y demodulated output and the B-Y demodulated output input to the auxiliary circuit 27 are given a level corresponding to that input to the comparator 22 described above. That is, the R-Y demodulator output is directly connected to the emitter of the emitter follower transistor _T76 .
_On the other hand, the B-Y demodulator output is applied to the base of the transistor _T81 from the emitter of the emitter follower transistor _T79 through the resistor _R100 with a voltage drop of 0.3V. It has an inverse magnitude relationship with the given demodulator output. The burst gate pulse _P1 is applied to the base of the constant current source transistor _T84 in common with the constant current source transistor _T83 for the comparator 22, so that the auxiliary circuit 27 is also applied during the color burst period. It only works on

Transistor T ₈₂ base potential
Since it is selected higher than the base potential of T ₈₁ , when there is no color burst and when there is a color burst, no positive output is generated as the color burst demodulation output of the B-Y demodulator (color burst and B- When the Y demodulator is in the relationship shown in FIG. 18), the transistor _T82 is on and the transistor _T81 is off, so it has no effect on the potential at point u. However, for example, when receiving a color broadcast in a weak electric field, the phase of the color burst tends to be random. When the color burst is disturbed in this way, a positive color burst demodulation output may be generated from the BY demodulator 4, or a negative color burst demodulation output may be generated from the RY demodulator 2. In such a case, since the transistor _T77 of the comparator 22 is off, the capacitor C _E will not be charged. However, when switching from a channel with a normal electric field to a channel with a weak electric field, the capacitor C _E will not be charged during normal reception. Since the charged charge remains for a while, color noise will occur on the screen during that time, but in such a case, the auxiliary circuit 2
7, the charge in the capacitor C _E is immediately discharged, so the color amplifier 1 is stopped and the color noise on the screen disappears immediately. That is, the auxiliary circuit 27
Transistor T ₈₁ turns on and capacitor C
This is because the charge on _E is immediately discharged through the capacitor C _E → diode D ₁₁ → transistor T ₈₁ → constant current source transistor T ₈₄ and resistor (R ₁₀₂ → ground). The color subcarrier generated in 5 is the regular 3.579545M
Even when there is a deviation of ±1/2 fH or ±1/4 fH from Hz, the color is erased and the sweeper circuit 11 is activated. For example, when the color subcarrier is 3.579545MHz, ±1/2fH=±7.875KHz
If the deviation occurs, the color burst demodulated output from the BY demodulator 4 will have its polarity inverted at 1H (one line) intervals, as shown in FIG.

In addition, the color subcarrier CW in A to O in Figure 19
FIG. 20 shows the phase relationship between the color burst and the color burst.
B- whose polarity is reversed at 1H intervals as shown in Figure 19
When the Y color burst demodulated output is input to the color killer circuit in Fig. 17, first in the part C of Fig. 19, the transistor _T77 of the comparator 22 is turned on, so a charging current flows through the capacitor _C. The potential at the point increases. Next, in the section E (same as the section A), the transistor _T77 of the comparator 22 is turned off, and the capacitor C _E is not charged.
On the other hand, in the auxiliary circuit 27, the transistor T ₈₁ is turned on, so the charge on the capacitor C _E is transferred to the diode D ₁₁
and is discharged through transistor _T81 . In this way, when the color subcarrier is shifted by ±1/2fH, the capacitor C _E is repeatedly charged and discharged every 1H, and the potential at point U is kept at a low level, so the first output point _O1 is at a high level. The voltage is generated and the color amplifier 1 is stopped during the scanning period (at least during the color burst period due to the killer nullification means 13), color noise does not appear on the screen, and a high level voltage is present at the second output point _O2 . Since this does not occur, the sweep circuit 11 continues the sweep operation.

This prevents the color synchronization PLL from becoming locked. In addition, in the above explanation, we explained the case where there is a deviation of ±1/2fH, but even if there is a deviation of ±1/4FH, B
-The color burst demodulation output by Y demodulator 4 is
By simply repeating positive → 0 → negative → 0 → positive at 1H intervals, it is possible to similarly prevent the color synchronization PLL from locking and also prevent color noise from appearing on the screen. Further, substantially the same operation is performed not only when the deviation is exactly ±1/2fH or ±1/4fH, but also when the deviation is close to these values. As described above, when the frequency or phase of the color subcarrier generated from the voltage controlled oscillator 5 deviates to some extent by the color killer circuit 14, the transistors T ₄₂ and T ₄₃ are held in the off state and the sweeper circuit 11 is turned off. Since it is not fixed in a stopped state, the sweeper circuit 11 performs the operation described above. On the other hand, if the frequency and phase of the color subcarrier are within a certain range, transistors T ₄₂ and T ₄₃ are turned on and the sweeper circuit 11 is activated. 11 is fixed in a stopped state and the color synchronization PLL is locked.

In the locked state, the output of the phase comparator 9 becomes 0 in DC terms. This is shown in the form of a current waveform in FIG. 21A.
Once the lock is applied, the frequency of the beat signal (color subcarrier and color burst beat) output from the phase comparator 9 is so low that it can be considered as approximately direct current, so the low pass filter 1 is used to prevent this direct current.
Since the time constant of 0 becomes large and the input impedance of the emitter follower transistors T ₂₇ and T ₂₉ (FIG. 16) is also large, the gain of the phase comparator 9 becomes large. In the locked state, as shown in FIG. 21B, a current flows in an amount corresponding to the phase and frequency shift (shaded area), and a voltage generated by this current is applied to the voltage controlled oscillator 5. In FIG. 21, the horizontal axis shows the shift amount of the color subcarrier, and the vertical axis shows the output of the phase detector. As shown in the implementation circuit of FIG. 16, the non-biased emitter followers T ₂₇ , T ₂₉
[An unbiased emitter grounded amplifier may be used in place of the emitter follower] as the load of the phase comparator 9, which makes the load high impedance, so unnecessary discharge of the low-pass filter 10 can be suppressed as much as possible, and the color Jitter in the synchronous PLL system can be corrected appropriately. That is, in a PLL system using a color burst as input, the phase detection output is intermittent and not continuous as described above. Therefore, the discharge of the integrating circuit of the low-pass filter 10 causes a large jitter, but in the case of the sweep voltage superposition method, the variable range of the voltage controlled oscillator 5 is larger than the pull-in range, so the jitter due to the discharge becomes even larger. However, as described above, by using emitter followers T ₂₇ and T ₂₉ (particularly non-biased type) or a non-biased emitter grounded amplifier, the jitter can be significantly reduced. Furthermore, since the charge of the capacitor C _C is hardly discharged by the emitter followers T _{27 and} T ₂₉ , the phase comparator 9 supplies enough current to charge the charge slightly discharged through the emitter followers T 27 and T ₂₉ . Since this current flows depending on the phase difference and frequency difference between the color burst and the color subcarrier, a current flows according to a 0.5 degree shift in frequency and phase of 1KHz. In this regard, in the conventional circuit,
Since it is not a high-impedance load like this, a large amount of current must flow to charge the discharged charge, and a current must be flowed in accordance with the frequency of 100 KHz and the phase shift of 5 degrees. Nakatsuta. Therefore, in this circuit, the tolerance for deviation of color subcarriers is about 100 times greater than that of the conventional circuit.

As described above, in the present invention, in the sweep type color synchronization circuit, the composite voltage of the low-pass output voltage of the phase comparator and the sweep voltage is transmitted through the unbiased emitter follower transistor that operates as a high impedance path. , for color subcarrier generation.
Since it is applied to the VCO, the low-pass output voltage does not drop significantly during the discharge period of the low-pass integrating circuit, and therefore jitter in the color synchronization circuit can be prevented.

[Brief explanation of the drawing]

All drawings relate to the present invention,
Figure 1 is a block diagram showing the color synchronization circuit together with its peripheral circuits, Figure 2 is a circuit diagram of the voltage controlled oscillator that forms part of it, and Figure 3 is an equivalent circuit of the resonant oscillator used in Figure 2. Figure 4 is a characteristic diagram of the resonant oscillator, Figure 5 is an explanatory diagram of Figure 2, and Figure 6 is an explanatory diagram of Figure 2.
The figure shows a circuit diagram of a phase comparator that constitutes a part of Fig. 1, Fig. 7, Fig. 8, Fig. 9, Fig. 10, and Fig. 11.
Figures 12, 13, 14, and 15 are explanatory diagrams of Figure 1, Figure 6, Figure 16, etc.
The figure is a circuit diagram showing a specific example of a sweeper circuit forming a part of Fig. 1, Fig. 17 is a circuit diagram of a color killer circuit forming a part of Fig. 1, Figs. 20 is an explanatory diagram of FIG. 17, and FIG. 21 is an explanatory diagram of FIG. 1, etc. 1...Color amplifier, 2...RY demodulator, 3
...G-Y demodulator, 4...B-Y demodulator, 5...
Voltage controlled oscillator, 7... Phase shifter, 8... Burst gate, 9... Phase comparator, 10... Low pass filter, 11... Sweeper circuit, T ₂₇ , T ₂₉ ...
...Emitsuta follower that forms a high impedance load.

Claims (1)

[Claims] 1 A sawtooth repeating at a constant cycle is applied to the low-pass output voltage of a phase comparator that compares the phase of the color burst with the output of a voltage-controlled oscillator for color subcarrier generation whose frequency variable range is set to be smaller than the repetition frequency of the color burst. In a sweep type PLL type color synchronization circuit in which a wave-like sweep voltage is superimposed and the superimposed composite voltage is applied as a control signal to the voltage controlled oscillator, the composite voltage acts as a high impedance circuit. 1. A color synchronization circuit characterized in that the voltage is applied to the base of a non-biased emitter follower transistor, and the voltage is applied from the emitter of this transistor to the voltage controlled oscillator.