JPS6252536B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a protection/control relay equipped with an electromagnetic output auxiliary relay, and more particularly to an operation inspection circuit for the relay.

Conventional static protection relays or control relays have been equipped with an operation check circuit shown in FIG. 1 or 2. Figure 1 shows the detected signal from the protected device as an input to the protection (or control) calculation circuit 1.
Inspection signal via inspection switch 2 in parallel with IN
INc is applied, and the relay output TOUT is locked by opening the reverse polarity switch 4, which is linked to the inspection switch 2, to operate the contact of the protective output auxiliary relay 3, which is operated by the protection output of the protection calculation circuit 1 by this inspection signal INc. This configuration makes it possible to inspect the operation of the output auxiliary relay 3 as well.

However, in the case of the one in Figure 1, the output is
In order to lock TOUT, the equipment to be protected must be left unprotected during this inspection operation, making it impossible to deal with actual accidents during this period.

As a device that can solve this problem, there is a protection (control) relay with a series duplex configuration shown in FIG. In the figure, the protection calculation circuits 1 ₁ and 1 ₂ use the detected signal IN as a common input, and _the inspection signals INc ₁ and INc ₂ are given with _a time difference.
The output contacts of the output auxiliary relays 3 ₁ and 3 ₂ are connected in series to obtain the relay output TOUT, and if an actual accident occurs during the inspection operation of one of the protection calculation circuits, the output TOUT is obtained and the inspection operation is performed. has the output
TOUT can be locked.

However, since the protection calculation circuit is duplicated, including the output auxiliary relay, it becomes an expensive relay. Furthermore, since the protection calculations are duplicated, both calculation operations have the function of checking each other's protection calculations, but on the other hand, a circuit failure in one circuit becomes the same as an output lock, reducing the reliability of the protection operation.

The conventional devices shown in Figures 1 and 2 are designed to be always inactive, but the problem is that they cannot be applied to control relays where the output state is not fixed and there are both constantly active and inactive states. There is. That is, if an attempt is made to give a check signal while the device is in an operating state, the check switch 4 in the device shown in FIG. 1 is opened and the output TOUT is momentarily cut off. Similarly, in the device shown in Figure 2, if the device is in operation, the output TOUT to the outside is cut off by the return inspection, and the inspection control circuit detects that it is in operation and uses the inspection input as the return inspection input. Although it was prepared, it was basically impossible to construct an inspection circuit.

SUMMARY OF THE INVENTION An object of the present invention is to provide an operation inspection circuit for a protection/control relay that can be used as an inspection circuit that eliminates the above-mentioned problems.

The present invention generates a check signal based on the relationship between the state of the auxiliary relay and the detected signal, and when a change in the drive signal of the auxiliary relay is detected by inputting the check signal, an inverted check signal is given to generate the check signal. It is characterized by detecting whether the operation is good or not based on the time from the start of the inspection until the inspection signal is disconnected.

FIG. 3 shows an embodiment of the invention. An operation check circuit consisting of 8 to 16 is provided in the main body of the protection (control) relay, which is composed of a protection (or control) calculation circuit 5 and a drive circuit 6 that drives an output auxiliary relay 7 with its on/off output. Auxiliary relay drive circuit 6
The driving state of the relay 7 is determined by the driving state detection circuit 8.
Detect with. This drive state detection circuit 8 detects the logic level using a switch circuit of a transistor TR1, for example, as shown in the figure. This detection signal is used as a polarity control signal of the inspection signal in the inspection signal generation circuit 9, and the inspection signal generation circuit 9 generates an inspection signal determined based on the relationship between the level of the detected signal IN and the operation/return state of the auxiliary relay 7. which obtains INc,
For example, the signal to be detected when the auxiliary relay 7 is in the reset state
When IN is on the low level side, inverter INV ₁ shown in the figure is installed to generate a high level inspection signal in the operating direction of the relay 7, and the detected signal when the auxiliary relay 7 is in the reset state is on the high level side. If so, a low-level inspection signal in the operating direction of the relay 7 is generated without providing the inverter INV ₁ .

The inspection signal output from the inspection signal generation circuit 9 is normally prevented from being input to the arithmetic circuit 5 by the analog switch circuit 10. The opening of the gate of the switch circuit 10 is performed by a signal from a memory circuit 11 such as an R-S flip-flop, which is set by the inspection start signal INcs, through a delay circuit 12. On the other hand, the level change of the inspection signal output from the inspection signal generation circuit 9 is detected by the signal change detection circuit 13. This signal change detection circuit 13 detects a change in the state of operation or recovery of the auxiliary relay drive circuit 6 in response to the inspection input by a change in the level of the inspection signal.
For example, as shown in the figure, it is composed of a CR time constant circuit and an exclusive OR Ex-OR.

The output of the signal change detection circuit 13 is AND gate 1
At step 4, the AND gate 14 is ANDed with the inspection start signal (output of the delay circuit 12), and the output of the AND gate 14 is used as a reset signal for the memory circuit 11, that is, an inspection end signal, and also enables automatic inspection of multi-stage relays. It is also used as an inspection start signal for the next-stage protection (control) relay (not shown).

If there is no reset signal within the time required for the inspection from the start of the inspection by setting the memory circuit 11 to the reset, an ON output is given to the timer circuit 15 whose time limit is set longer than the time required for the inspection, and a lamp indicates that the relay is malfunctioning. It is configured to display on a display 16 such as.

In the above configuration, the memory circuit 11 is set by the inspection start signal INcs, and the timer circuit 1
5 starts, the gate of the switch circuit 10 is opened via the delay circuit 12, and the inspection signal output from the inspection signal generation circuit 9 is sent to the arithmetic circuit 5 as an inspection signal.
Given as INc. In response to this inspection signal, if the auxiliary relay drive circuit 6 has been in a non-operating (returning) state, an operation check is performed, and if it is in an operating state, a return check is performed, and output including the drive state detection circuit 8 of the relay 7 is performed. It appears as a change.

This output change also changes the output of the inspection signal generation circuit 9, which is output as one pulse to the signal change detection circuit 13, and the inspection signal is inverted to quickly return the arithmetic circuit 5 to its pre-inspection state. The output of the signal change detection circuit 13 is different from the output of the delay circuit 12.
The AND condition is met and the memory circuit 11 is reset. After this reset, the gate of the switch circuit 10 is closed after the time limit of the delay circuit 12 has elapsed. Even when the gate of the switch circuit 10 is closed, the arithmetic circuit 5 and the drive circuit 6 are driven in the direction of returning to the current state by the detected signal IN and return to the state before inspection.

In the above-mentioned inspection operation, if there is a failure in the arithmetic circuit 5 or the drive circuit 6, the output of the inspection signal generation circuit 9 will not change and the memory circuit will not be reset, so the timer circuit will operate after a predetermined period of time. Displays a defect or sends an abnormal signal to the outside. Similarly, even if the coil of the output auxiliary relay 7 is disconnected, the drive detection circuit 8 can detect this because there is no change in the input level.

Note that when the inspection is not in progress, the relay 7 responds to a change in the detected signal IN and the signal change detection circuit 13 outputs an output, but since the memory circuit 11 is in the reset state, the gate of the AND gate 14 is closed. Therefore, the inspection start signal for the next stage will not be issued.

As explained above, in the present invention, if the auxiliary relay drive circuit 6 changes by applying the inspection signal, it is detected immediately and the inspection signal is inverted to return to the state before inspection. Since the change is instantaneous and does not occur until the final state of the auxiliary relay contact changes, inspections including disconnection of the auxiliary relay coil can be performed without locking the output. In addition, since neither the input lock nor the output lock is applied during the inspection, if there is an input change that should be responded to during the inspection, the input will not respond to the input and become unprotected, and there will be no contact failure due to the lock. This does not cause a decrease in reliability. In addition, there is no need to duplicate the relay main circuit, and the inspection circuit becomes an inexpensive inspection circuit that can be constructed with a small number of logic circuit elements. In addition, the inspection circuit can be inspected regardless of the operating state of the relay, and is a highly versatile inspection circuit that can be applied regardless of the type of control relay or protection relay.

[Brief explanation of the drawing]

1 and 2 are circuit diagrams showing a conventional inspection cycle, and FIG. 3 is a circuit diagram showing an embodiment of the present invention. 1, _{1 1} , 1 ₂ , 5... Protection (control) calculation circuit, 6... Drive circuit, 7... Output auxiliary relay,
8... Drive state detection circuit, 9... Inspection signal generation circuit, 10... Switch circuit, 11... Memory circuit,
12...Delay circuit, 13...Signal change detection circuit,
15...Timer circuit, 16...Display device.

Claims (1)

[Claims] 1 Memory circuit 1 that is set by an inspection start signal and stores the inspection start in a protection/control relay that changes the operating state of the output auxiliary relay according to the calculation result of the calculation circuit that receives the detected signal as input.
1, a switch circuit 10 which outputs a check signal to the arithmetic circuit using the memory output of this memory circuit, a drive state detection circuit 8 which detects the drive state of the auxiliary relay, and a detection signal of this drive state detection circuit is inputted. and a check signal generation circuit 9 that generates a check signal determined based on the relationship between the detection signal and the level of the detected signal and outputs it to the switch circuit, and a check signal generation circuit 9 that detects a change in the level of the check signal generation circuit. a signal change detection circuit 13; and a logic circuit 14 that brings the storage circuit into an inspection completed state when the signal change detection circuit has a detection output during the storage output of the storage circuit.
and a timer circuit 15 which obtains an operational malfunction detection output when a predetermined period of time or more elapses from the inspection start memory to the inspection end state of the storage circuit.