JPS6251861U - - Google Patents
Info
- Publication number
- JPS6251861U JPS6251861U JP14267785U JP14267785U JPS6251861U JP S6251861 U JPS6251861 U JP S6251861U JP 14267785 U JP14267785 U JP 14267785U JP 14267785 U JP14267785 U JP 14267785U JP S6251861 U JPS6251861 U JP S6251861U
- Authority
- JP
- Japan
- Prior art keywords
- high voltage
- crt
- rectifier circuit
- deflection
- voltage end
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 5
- 238000004804 winding Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 2
- 238000009499 grossing Methods 0.000 description 1
Landscapes
- Details Of Television Scanning (AREA)
Description
第1図は、本考案による偏向歪検出回路の一例
を示すブロツク図、第2図は、ビーム電流の径路
を示す等価回路図、第3図は、他の実施例を示す
ブロツク図、第4図は、従来の偏向歪検出回路の
例を示すブロツク図である。
主要部分の符号の説明、1……フライバツクト
ランス、3,8,14……ダイオード、4……平
滑コンデンサ、5……映像出力回路、6……CR
T、7……交流接地コンデンサ、9……ブリーダ
抵抗、11……偏向歪補正回路、12……ABL
抵抗、13,20……抵抗、40……偏向歪検出
回路、41……ABL電圧出力回路。
FIG. 1 is a block diagram showing an example of a deflection distortion detection circuit according to the present invention, FIG. 2 is an equivalent circuit diagram showing a beam current path, FIG. 3 is a block diagram showing another embodiment, and FIG. The figure is a block diagram showing an example of a conventional deflection distortion detection circuit. Explanation of symbols of main parts, 1...Flyback transformer, 3, 8, 14...Diode, 4...Smoothing capacitor, 5...Video output circuit, 6...CR
T, 7...AC grounding capacitor, 9...bleeder resistor, 11...deflection distortion correction circuit, 12...ABL
Resistor, 13, 20...Resistor, 40...Deflection distortion detection circuit, 41...ABL voltage output circuit.
Claims (1)
アノードに直流高電圧を印加する整流回路と、前
記整流回路に高圧端が接続された高圧巻線を含む
フライバツクトランスとを有するCRT受像桟の
偏向歪検出回路であつて、前記高圧巻線の低圧端
と基準電位点との間に接続された抵抗による電圧
降下を検出出力とすることを特徴とする偏向歪検
出回路。 Deflection of a CRT image receiving frame having a CRT that displays a two-dimensional screen, a rectifier circuit that applies a DC high voltage to the anode of the CRT, and a flyback transformer that includes a high voltage winding whose high voltage end is connected to the rectifier circuit. 1. A deflection distortion detection circuit characterized in that the detection output is a voltage drop due to a resistor connected between the low voltage end of the high voltage winding and a reference potential point.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14267785U JPS6251861U (en) | 1985-09-17 | 1985-09-17 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14267785U JPS6251861U (en) | 1985-09-17 | 1985-09-17 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6251861U true JPS6251861U (en) | 1987-03-31 |
Family
ID=31051629
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14267785U Pending JPS6251861U (en) | 1985-09-17 | 1985-09-17 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6251861U (en) |
-
1985
- 1985-09-17 JP JP14267785U patent/JPS6251861U/ja active Pending
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