JPS6251556B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a DC component regeneration circuit for a color signal processing circuit of a color television or the like.

When demodulating and reproducing color signals, in addition to the AC signal components of the three primary colors of light, red (R), blue (B), and green (G), there is a DC component depending on the signal level. Must be included and played. Normally, if the demodulation circuit is designed to be directly connected to the picture tube (hereinafter referred to as CRT) drive, the DC component will be regenerated naturally without any special consideration, but in this case
The DC level that drives the CRT is R, G, B,
If they are not uniform, the white balance of the CRT cannot be achieved.
There is a drawback that the entire screen is colored due to the imbalance of DC components. However, there are various circuits between the demodulation stage that handles small signals and the CRT drive stage, and since they are amplified, various offsets and gain differences occur, and the DC levels of the three color signal outputs may be uneven. I often get used to it. To compensate for this drawback, the DC component is temporarily cut off at an appropriate point near the final stage of the circuit, only the AC component is transmitted, and then a DC component regeneration circuit that roughly corresponds to the AC level is used to regenerate the DC component. There are many things. The present invention improves the operational drawbacks of such conventional DC regeneration circuits, and provides a new DC regeneration circuit that reduces the number of external terminals so that it is suitable for integrated circuits.

In recent years, with the advancement of integrated circuits, color signal processing circuits have come to include contrast control, color control circuits, etc.
When such a complex circuit system is included in the signal transmission system, a color matrix circuit demodulates the signal information of two of the three primary colors and the luminance signal Y sent from the transmitting side, and then outputs the remaining one primary color signal. In order to reproduce, two primary color signal information are input.In general, two color difference signals consisting of two primary color signals of red and blue and a luminance signal Y are input from a matrix circuit that adds R-Y and B-Y. = aR + bB + cG (a, b, c
is a constant) to create another primary color signal information G-Y, R-Y, B-Y, G-Y
Take out the three outputs. Already at this input stage, the DC offset between the two inputs may be large enough to exceed the linear operating range of the transistor. In such a case, the conventional DC regeneration circuit system becomes completely useless since it is already uncontrollable at the input stage. If, as a countermeasure to this problem, it is necessary to block the DC component at a stage before the color matrix stage, the capacitance of the coupling capacitor used as a means of blocking DC would be too large to be realized in an integrated circuit, so an external Therefore, it is necessary to prepare four extra terminals for two inputs in the package, which is contrary to the idea of reducing the number of pins in the package and has the drawback of increasing the size of the package.

In consideration of these points, the present invention corrects the offset by clamping the three primary color signal information outputs to a constant DC reference potential while keeping the transmission system directly connected, and provides a type of feedback to the input of the color matrix circuit. The present invention also provides a DC regeneration circuit that does not exceed the linear operating range.

Next, the present invention will be explained in more detail with reference to the drawings.

FIG. 1 shows an example of a conventional color signal processing circuit.
5 is a circuit including a color matrix, and has two input terminals for signals including R-Y and B-Y, and R-
These are Y, G-Y, and B-Y output terminals, and each output is connected to the input terminals of clamp circuits 6, 7, and 8, respectively. The operation of each clamp circuit 6, 7, 8 is turned ON by the clamp pulse input from terminal 9.
During the period, a control output is generated that changes the DC bias of the input terminal so that the output is equal to a predetermined internal reference voltage, and when the clamp pulse is OFF, the control output is held, and thereby the control output is maintained for the entire period. The DC bias voltage is the same as when the clamp pulse is ON, and the DC component is regenerated. Usually, a synchronizing signal or a delayed version of the synchronizing signal is used as such a pulse. The outputs of each clamp circuit 6, 7, 8 are connected to output terminals 10, 11, 12, respectively.
The two inputs of the circuit 5 including the color matrix are connected via DC blocking capacitors 3 and 4 to the preceding stages 1 and 2, which have large DC bias fluctuations and variations. If the capacitors 3 and 4 are not used and are directly connected, the bias of the matrix circuit will be distorted and normal operation will not occur. Conventionally, when converting the entire part shown in Figure 1 into an IC, four terminals were required for capacitors 3 and 4, which could not fit into one predetermined package and were realized as two ICs, resulting in high prices. It was.

Figure 2 shows the principle of the present invention, and shows the first
Components that are the same as those in the figure are given the same numbers. The front stages 1 and 2 are connected to the inputs (RY, B-Y) of the color matrix circuit 5 both in direct current and alternating current.
Its outputs are connected to output terminals 10-12 via clamp circuits 6-8. A clamp pulse is applied to the clamp circuit from terminal 9. The control outputs of the clamp circuits 6 and 8 are connected to the corresponding input terminals of the color matrix circuit 5, and the control output of the clamp circuit 7 is connected to the DC bias voltage of the G-Y output inside the matrix circuit 5 (including output terminals). It is connected in a place where it can be changed. The clamp circuit 6 controls the bias voltage of the R-Y input terminal of the color matrix circuit 5 so that it becomes a predetermined internal reference voltage while the clamp pulse input to the terminal 9 is ON, and when the clamp pulse is OFF. The DC component is regenerated by maintaining the above bias voltage. In this way, the bias voltage of the input terminal R-Y of the color matrix circuit 5 is determined by the combination of the output voltage of the previous stage 1 and the control output of the clamp circuit 6, and its value is determined by the R-Y output of the matrix 5. The R-Y input terminal bias voltage value (constant value) is automatically controlled so that the voltage becomes a predetermined value.
In other words, the control output of the clamp circuit 6 changes according to the output voltage of the front stage 1, thereby controlling the RY input bias voltage to a constant value. This shows that even if the output voltage of the front stage 1 during no-load changes greatly, it follows as described above. The clamp circuit 8 performs the same operation for B-Y.

When the above-mentioned new clamp circuit is configured for R-Y and B-Y, the G-Y output is inevitably determined by matrix calculation, but the error voltage is added to R-Y and B-Y, causing wrinkles. That will happen. However, since R-Y and B-Y are kept at almost constant values due to the automatic control mentioned above, the offset of the G-Y output is not enough to cause it to go out of the linear operation region, so only the G-Y output is changed as before. If the output voltage is clamped, G-Y DC regeneration can be performed. The clamp circuit 7 shown in FIG. 2 is for this purpose.

With the above configuration, a DC regeneration circuit that automatically follows fluctuations in the DC bias in the previous stage can be created. This eliminates the need for capacitors 3 and 4 in Figure 1, which could not be built into conventional ICs, and not only reduces the cost of external components, but also reduces the number of IC pins by four, allowing for more pins than conventional packages. This makes it possible to incorporate many functions into the IC, thereby improving the cost performance of the IC.

A more specific example will be shown using FIGS. 3 and 4. FIG. 3 shows an embodiment of the clamp circuit.
A differential transistor pair 22, 23 compares the voltage at the input terminal 21 with a predetermined reference voltage 28, and a clamp pulse input to the terminal 27 (in the figure, ON in the negative direction)
This is the pulse. It is possible to change the polarity using an inverting amplifier if necessary. ) is on, the transistor 24 turns on, and the transistor 24 supplies a constant current and the diode 2 that constitutes the active load.
9 and transistor 30, clamp pulse is OFF
A capacitor 31 that holds the output voltage of the differential amplifier when
4 and a resistor 2 that determines the current value of the transistor 24.
5 and a power supply 26.

When the clamp pulse is ON, if the voltage at the input terminal 21 is higher than the reference voltage 28, the transistor 23 turns ON, charges the capacitor 31, increases the current of the transistor 32, and lowers the voltage at the control output terminal 33. Since the voltage at the input terminal 21 is configured to change depending on the voltage at the control output terminal 33 (in FIG. 1, the voltage at the input terminal 21
and terminal 33 are at the same point and vary via matrix 5 in FIG. 2), the voltage at input terminal 21 falls. If the voltage at the input terminal 21 drops, the reverse operation is performed to increase the voltage at the input terminal 21. That is, the voltage at the input terminal 21 is automatically controlled to be equal to the reference voltage 28.

FIG. 4 shows an embodiment showing the color matrix circuit 5 in more detail, and the same parts as in FIGS. 1 and 2 are given the same numbers. Numerals 6, 7, and 8 are clamp circuits, for example, those in the embodiment shown in FIG. 3 can be used. R-Y from front stage circuit 1
A signal and a DC bias voltage are applied to the base of transistor 41 (clamp circuit 6 as described below).
) The transistors 41 and 4 forming the differential amplifier
2. A positive phase output voltage is generated in the load resistor 46 by the resistors 43 and 44 and the constant current source 45, and becomes the R-Y output voltage of the color matrix circuit 5 via the amplifier 57.
It is input to the clamp circuit 6. As described above, the operation of the clamp circuit 6 is performed by negative feedback operation so that when the clamp pulse input from the terminal 9 is ON, the DC voltage of the R-Y output of the color matrix circuit 6 becomes the internal reference voltage. Therefore, the bias voltage of the RY input terminal of the color matrix circuit 5 is controlled. Therefore, no matter what the output bias voltage of the front stage 1 is, the control output of the clamp circuit changes accordingly, and the base voltage of the transistor 41 becomes approximately equal to the bias voltage 56 of the transistor 42. If you use the clamp circuit shown in Figure 3 as the clamp circuit, subtract the product of the output internal resistance of the front stage 1 and the collector current of transistor 32 in Figure 3 from the output bias voltage of the front stage 1 (at no load). The value of transistor 41 in FIG.
becomes the base voltage of It has been confirmed through experiments that direct current reproduction can be performed correctly even when a color control circuit whose output voltage varies from 3V to 12V is connected as an example of the first stage. The same applies to the BY signal.

As is well known, the G-Y signal is composed of the R-Y signal and the B-
It is obtained as a composite voltage based on a predetermined ratio of the negative phase components of each Y signal, but in this embodiment, the negative phase component of R-Y generated in the resistors 47 and 48 due to the collector current of the transistor 41 and the collector It is obtained as the sum of negative phase components of B-Y generated in the resistor 47 by the current, and appears at the B-Y output terminal of the color matrix circuit 5 via the amplifier circuit 58. As mentioned above, the base voltages of the transistors 41 and 49 become approximately equal to the bias voltage 56 due to negative feedback, and as a result, the output DC voltage of the G-Y signal also becomes approximately constant, but it deviates due to a slight error voltage. Therefore, the clamp circuit 7 is used independently to regenerate the DC component. Note that 55 is a power source.

If we provide means to apply a Y signal in series to the power supply 55 (not shown), the color matrix output will be the primary colors (R, G, B), but when the clamp pulse is ON, it will be at the black level. Since the Y signal is 0,
The DC component can be regenerated in the same manner as shown in FIG.

The color matrix 5 can also achieve the same effect by selecting the polarity of the control output of the clamp circuit, even in the case where the inputs are R-Y and B-Y and the outputs are -R, -B and -G. It will be done. Further, the same applies to a configuration in which inputs are R and G, and outputs are R, B, and G.

According to the present invention, a color matrix circuit can be designed regardless of the DC bias of the previous stage, and
It is extremely advantageous in terms of the number of pins and external elements in the field of technology, and has a large effect.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an example of a conventional DC component regeneration circuit, Figs. 2 and 4 are block diagrams and circuit diagrams showing an embodiment of the present invention, and Fig. 3 is a circuit showing an embodiment of a clamp circuit. It is a diagram. 1, 2...previous stage, 3, 4...coupling capacitor,
5... Color matrix circuit, 6, 7, 8... Clamp circuit, 9... Clamp pulse input terminal, 10,
11, 12...Output terminal, 21...Input terminal, 2
2, 23, 24...Transistor, 25...Resistor, 26...Power supply, 27...Clamp pulse input terminal, 28...Reference voltage, 29...Diode,
30, 32...transistor, 31...capacitor, 33...control output terminal, 34...output terminal,
41, 42, 49, 50...transistor, 4
3, 44, 51, 52...Resistance, 45, 53...
Constant current source, 46, 47, 48, 54...Resistance, 5
5...Power supply, 56...Bias voltage source, 57,5
8,59...Amplifier.

Claims (1)

[Claims] 1 means for demodulating a chroma signal to generate first and second color information signals; and first and second color information signals to which the first and second color information signals are respectively supplied.
the input terminal, the first to third output terminals, the first
a first amplifier coupled to an input terminal of the amplifier for amplifying the first color information signal to generate first and second signals having opposite phases to each other; a second amplifier that amplifies the information signal to generate third and fourth signals having opposite phases; a combining circuit that combines the first and third signals to generate a third color information signal; a third amplifier that amplifies the second signal and supplies the amplified output to the first output terminal; a fourth amplifier that amplifies the fourth signal and supplies the amplified output to the second output terminal; , and a color matrix circuit having a fifth amplifier that amplifies the third color information signal and supplies the amplified output to the third output terminal;
a first clamp circuit coupled to the first output terminal, which compares the signal level of the first output terminal with a reference voltage during the application period of the clamp pulse and supplies the comparison result to the first input terminal; , said second
a second clamp circuit coupled to the output terminal of the second output terminal, which compares the signal level of the second output terminal with the reference voltage during the application period of the clamp pulse and supplies the comparison result to the second input terminal; Said third
a third clamp circuit coupled to the output terminal of the fifth amplifier, which compares the signal level of the third output terminal with the reference voltage during the application period of the clamp pulse and supplies the comparison result to the input of the fifth amplifier; A color reproduction device comprising: