JPS6322759B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is applicable to television receivers.
The present invention relates to a signal clamping device that can be used for DC reproduction of the three primary color signals of G and B, and is intended to provide a signal clamping device that can reduce the number of pins when integrated into an IC.

As shown in FIG. 1, in a television receiver, a composite video signal is input to a video input terminal 1, and the video is sent to a cathode ray tube (CRT) 5 via a video amplification circuit 2, a color signal processing circuit 3, and a video output circuit 4. When a video tape recorder, a personal computer, or the like is connected to this as an external additional device, a signal for display on the monitor is inputted to the input terminal 1 for use.
However, the output data of a personal computer
Even if an attempt is made to display the image on the CRT 5, the image quality that can be reproduced is limited by the circuits 2 and 3 due to the special nature of the television video signal, so the originally desired image quality is not achieved.

Therefore, the video output signals of personal computers include composite video signals and primary color signals (R, G,
Since both of B) are generally prepared, a method has been considered in which the R, G, and B signals are used to drive the CRT 5. An example of a configuration having such a function is shown in FIG.

This includes the outputs of the conventional television circuits 2 and 3, and the R, G, and B signals applied to the input terminal 6 from the outside.
A switching circuit 7 having means (mechanical or electrical) for switching between the television signal and the external R, G, B signal is provided, and the switching circuit 7 selects between the television signal and the external R, G, B signal.

A specific example is the one described in Japanese Patent Application Laid-Open No. 57-62680. The main parts of this circuit configuration include a plurality of input terminals, a plurality of signal conversion circuits that perform signal processing such as level and amplitude of a plurality of binary signals (digital signals) inputted from the plurality of input terminals, and a plurality of signal conversion circuits as described above. It is composed of a plurality of clamp circuits that clamp the output signals of a plurality of signal conversion circuits.

However, with the above configuration, (1) analog signal input cannot be supported (analog signals are not considered as input signals at all);

(2) If a signal processing circuit that varies the signal level (amplitude, DC voltage, etc.) is installed after the plurality of clamp circuits mentioned above, and an image is displayed on a cathode ray tube, variations in the clamp level will occur between each clamp circuit, causing each A difference occurs between signal levels, and the reproduction of brightness, hue, etc. differs from the brightness and hue that are originally intended to be reproduced.

There is this problem, and we have proposed a configuration as shown in Figure 3 to improve the above problem.

This device has a plurality of analog signal input terminals, a plurality of first clamp circuits that clamp the plurality of analog signals applied to these input terminals, and an output signal of the plurality of first clamp circuits. A plurality of amplifier circuits including a second clamp circuit that performs signal processing such as clamping and amplification of the plurality of analog signals, and an output signal and an internal reference voltage of each of the plurality of amplifier circuits are compared and detected during the horizontal synchronization signal period. A plurality of pedestal clamp circuits and a plurality of clamp filter capacitors are provided to supply output signals to the amplifier circuit, and the DC level of each analog signal is stabilized.

Below, referring to Fig. 3, the R, G, B primary color signals of analog signals from external additional equipment will be explained.
R _TX , G _TX , and B _TX are DC-cut by capacitors and input to terminals 8, 10, and 12, respectively. Three sets of clamp circuits are provided to perform DC reproduction of these primary color signals R _TX , G _TX , and B _TX .
They are clamp input circuits 14, 1, respectively.
5, 16, amplifier circuits 17, 19, 21, pedestal clamp circuits 18, 20, 22, and clamp filter terminals 9, 11, 13, which are connected to capacitors 42, 43, 44. The clamp pulse from the clamp pulse input terminal 30 is supplied to each of the above circuits via the pulse shaping circuit 23. To clamp the R, G, B input signals,
The above circuit is [14, 17, 18], [15, 19,
20], [16, 21, 22], three sets have the same circuit configuration, and three clamp filters are also provided individually [clamp filter terminals 9, 1
1 and 13 are approximate voltages]. The amplifier circuits 17, 19, and 21 are commonly controlled by an external control signal applied from a terminal 32, so that the gain can be changed and the contrast of the externally supplied image can be adjusted. In addition, in order to slightly change the DC level based on one clamp circuit (the circuit for the primary color signal G _TX in Figure 3) and absorb circuit variations, a DC level adjustment element is connected to terminals 31 and 33. This allows the DC level to be adjusted externally and the white balance on the CRT5 to be adjusted.

The DC reproduced primary color signals are input to signal switching circuits 27, 28, 29 via blanking circuits 24, 25, 26. Signal switching circuit 2
Input terminals 39, 40, and 7, 28, and 29 are connected to input terminals 39, 40,
41 are supplied with TV demodulated primary color signals R _TV , G _TV , and B _TV signals, and the external signals R _TX , G _TX , B _TX and TV signal R _TV , G _TV , B _TV
and one of the output terminals 38 and 3 is switched.
7,36. Those output signals are passed through the video output circuit 4 from the output terminals 36, 37, and 38.
It is added to the CRT5 to drive it.

In the case of the circuit shown in Figure 3 above, the two front and rear
Although it is possible to solve the drawbacks of the conventional example described above by having a clamp circuit in each stage, the circuit for clamping the primary color signals R _TX , G _TX , B _TX supplied from the outside is not suitable for the input signal. The number of filters required depends on the number of clamps, and the same number of clamp filters are also required. For this reason, when configured with an IC, there is a major drawback in that the number of terminal pins increases.

The present invention improves these conventional drawbacks, and even when processing and clamping multiple input signals from the outside at the same time, only one clamping filter is required. The object of the present invention is to provide a device that can reduce the number of devices.

Hereinafter, a block diagram of an embodiment of the present invention is shown in FIG. 4, and a specific circuit example thereof is shown in FIG. 5 for explanation. Note that the same parts as in FIG. 3 will be described with the same reference numerals. In the device of this embodiment, one external primary color signal (e.g. primary color signal
G _TX ) only, the clamp input circuit 15, amplifier circuit 19 and pedestal clamp circuit 45
A clamp circuit is constructed. In other words, a clamping voltage detection loop is provided only for the primary color signal _GTX , and the clamping voltage obtained at both ends of the clamping filter is also applied to the primary color signals _RTX and _BTX that do not constitute the other detection loops. Including R _TX , G _TX ,
B _TX three control amplifier circuits 17, 19, 2
In order to control each of the power supplies of 1, they are supplied in parallel as bias voltages for the current sources of the circuit. In this way, only one pin terminal 11 is required to add the capacitor 43 for the clamping filter outside the IC, and it can be realized with a minimum number of fractions.

In the specific circuit diagram of Fig. 5, the primary color signal G _TX
The amplifier circuit in the processing system is a transistor.
The emitter voltage of transistor Q ₄₅ , which is composed of Q ₄₀ to _{Q 47} and corresponds to the DC voltage change of its output signal, controls the terminal voltage of the clamping filter composed of transistors Q ₄ to _{Q 9} from one side, and at the same time, the emitter voltage of transistor Q The output of the pedestal clamp circuit 45 composed of _Q0 to _Q3 simultaneously controls the terminal voltage of the clamp filter. The voltage of the clamping filter (collector voltage of transistor _Q7 , that is, voltage at terminal 11) is the primary color signal R _TX , G _TX ,
It is added as a common base bias for current source transistors Q ₁₂ , Q ₁₅ , and Q ₁₈ that control transistors Q ₁₂ , Q ₁₄ , and Q ₁₇ for power supply control of three separate systems of B _TX . Transistor for clamp pulse, blanking pulse and amplifier of primary color signal G _TX
The voltage of the clamping filter that depends on the collector voltage of Q ₄₅ is the same as that of the transistors Q ₁₂ , Q ₁₄ , Q ₁₇
simultaneously control the emitter voltages of transistors Q ₂₉ , Q ₃₀ , Q ₃₁ , Q ₄₀ , Q ₄₁ , Q ₄₂ , Q ₅₂ , Q ₅₃ , respectively.
By changing the power supply voltage of _Q55 , the DC voltage level to the next stage, that is, the transistor _Q34 ,
The emitter voltage of Q ₄₆ and Q ₅₇ can be fixed at a constant pedestal voltage.

Note that the transistors Q ₁₉ , Q ₂₀ , Q ₂₁ and Q ₂₂ ,
Differential amplifier transistor consisting of Q ₂₃ and Q ₂₄
By connecting the collectors of Q ₂₀ and Q ₂₂ to the base circuits of the power supply control transistors Q ₁₂ (R _TX ) and Q ₁₇ (B _TX ), and controlling the base circuits of transistors Q ₁₉ and Q ₂₃ with DC current. , it is possible to adjust the white balance on the CRT by matching the potentials of the output terminals 38 and 36 with the potential of the output terminal 37. Current source transistor Q ₂₁ ,
Set the resistance value of the emitter resistor of _Q24 to 1/2 of the resistance value of the emitter resistor of the reference transistor _Q16 ,
The DC level of the red system and blue system can be adjusted in any direction (V _G± 〓) relative to the standard green system.

As described above, according to the present invention, the first clamp circuit clamps the plurality of analog signals applied to the plurality of input terminals, and the plurality of analog signals output from the first clamp circuit are clamped, amplified, etc. A plurality of amplifier circuits including a second clamp circuit, a plurality of amplifier circuits, an arbitrary output signal of the plurality of amplifier circuits, and an internal reference voltage are compared and detected during the period of the horizontal synchronization signal, and the output signal is supplied to the plurality of amplifier circuits. By providing a pedestal clamp circuit and a clamp filter capacitor, and supplying the filter voltage generated in this pedestal clamp circuit as the clamp voltage to the second clamp circuit in parallel, variations in the clamp level between each signal can be reduced. It is possible to reduce the size of the pins, provide a highly stable clamping effect, and reduce the number of pin terminals when integrated into an IC, greatly simplifying the circuit and reducing costs. The effect is great.

[Brief explanation of the drawing]

Figure 1 is a block diagram of a general television receiver, Figure 2 is a block diagram of a television receiver with a function that allows external RGB signal input switching, and Figure 3 is a block diagram of a television receiver with a function that allows switching of external RGB signal input.
Figure 4 is a block diagram of a television receiver having a signal clamping device that we proposed prior to the present invention; Figure 4 is a block diagram of a television receiver having a signal clamping device according to an embodiment of the present invention; The figure is a specific circuit diagram. 8, 10, 12...Input terminals for external primary color signals,
11...Clamp filter terminal, 14,1
5, 16... Clamp input circuit, 17, 19, 2
1... Amplifier circuit, 23... Clamp pulse input terminal, 24, 25... Blanking circuit, 43
...Capacitor, 45...Pedestal clamp circuit.

Claims (1)

[Claims] 1 A plurality of analog signal input terminals, a plurality of first clamp circuits that clamp the plurality of analog signals applied to these input terminals, and output signals of the plurality of first clamp circuits are input, and the A plurality of amplifier circuits including a second clamp circuit that performs signal processing such as clamping and amplification of a plurality of analog signals, and an arbitrary output signal of the plurality of amplifier circuits and an internal reference voltage are compared during the horizontal synchronization signal period. A pedestal clamp circuit and a clamp filter capacitor are provided to detect and supply output signals to the plurality of amplifier circuits, and the voltage generated by the pedestal clamp circuit is used as the clamping voltage for the plurality of second clamp circuits. A signal clamping device characterized in that the clamping voltage is supplied in parallel to the plurality of second clamping circuits.