JPS624955Y2 - - Google Patents

Info

Publication number
JPS624955Y2
JPS624955Y2 JP1982199643U JP19964382U JPS624955Y2 JP S624955 Y2 JPS624955 Y2 JP S624955Y2 JP 1982199643 U JP1982199643 U JP 1982199643U JP 19964382 U JP19964382 U JP 19964382U JP S624955 Y2 JPS624955 Y2 JP S624955Y2
Authority
JP
Japan
Prior art keywords
memory chip
substrate
flat coil
window
plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1982199643U
Other languages
Japanese (ja)
Other versions
JPS59104398U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP19964382U priority Critical patent/JPS59104398U/en
Publication of JPS59104398U publication Critical patent/JPS59104398U/en
Application granted granted Critical
Publication of JPS624955Y2 publication Critical patent/JPS624955Y2/ja
Granted legal-status Critical Current

Links

Description

【考案の詳細な説明】 (a) 考案の技術分野 本考案は円筒状磁区制御の記憶媒体としての
磁気バブルメモリデバイスに関する。
[Detailed Description of the Invention] (a) Technical Field of the Invention The present invention relates to a magnetic bubble memory device as a storage medium with cylindrical magnetic domain control.

(b) 技術の背景 例えば、ガーネツト単結晶薄板等からなるバ
ブルメモリチツプと、該メモリチツプに対する
発生バブル保持用のバイアス磁界、バブル転送
用の回転磁界等を与えるコイルおよびマグネツ
ト等を組立てたメモリデバイスは、小型軽量で
不揮発性のメモリ媒体として賞用されている。
(b) Background of the technology For example, a memory device that is assembled with a bubble memory chip made of a garnet single-crystal thin plate, etc., and a coil, magnet, etc. that applies a bias magnetic field for holding generated bubbles to the memory chip, a rotating magnetic field for bubble transfer, etc. It is prized as a small, lightweight, non-volatile memory medium.

本考案は、フラツトコイルを具える偏平状デ
バイス組立に係り、特にメモリチツプのパツケ
ージ封止構造についてその気密性の向上を図る
ものである。
The present invention relates to the assembly of a flat device including a flat coil, and particularly to improving the airtightness of a memory chip package sealing structure.

(c) 従来技術の問題点 第1図は、バブル転送用回転磁界を発生する
フラツトコイルと反射板とよりなる偏平パツケ
ージ体の基体構成を示す斜視図である。
(c) Problems with the Prior Art FIG. 1 is a perspective view showing the base structure of a flat package body consisting of a flat coil and a reflecting plate that generate a rotating magnetic field for bubble transfer.

図中、1はメモリチツプ、2は非磁性で且つ
導電性の金属薄板例えば銅板(メモリチツプ駆
動の周波数により異なるが約0.3mm程度の薄
板)等からなる反射板、3は反射板2の上方に
平行して配置される平面状のフラツトコイル
で、これは図示の様な積層されたXとYの平面
コイルCx,Cyよりなる。フラツトコイル3と
反射板2は、メモリチツプ1の上下からバブル
転送用の回転磁界を印加する。
In the figure, 1 is a memory chip, 2 is a reflective plate made of a non-magnetic and conductive metal thin plate, such as a copper plate (a thin plate of about 0.3 mm, although it varies depending on the frequency of driving the memory chip), and 3 is parallel to the upper part of the reflective plate 2. This is a planar flat coil arranged as shown in the figure, which consists of stacked X and Y planar coils Cx and Cy as shown in the figure. The flat coil 3 and the reflection plate 2 apply a rotating magnetic field for bubble transfer from above and below the memory chip 1.

又、図中の4はフエライト薄板もしくはパー
マロイ薄板等よりなる強磁性板で、通称ホモジ
ナイザと呼ばれる。5はメモリチツプ1内のバ
ブルを定常的に保持するバイアス磁界印加のマ
グネツトである。
Further, numeral 4 in the figure is a ferromagnetic plate made of a thin ferrite plate, a thin permalloy plate, etc., and is commonly called a homogenizer. Reference numeral 5 denotes a magnet for applying a bias magnetic field to keep the bubbles inside the memory chip 1 steady.

尚、前記フラツトコイルと反射板2との構成
方法並びに動作機能に就いては、「特公昭52−
061652号公報、磁気バブル駆動用コイル」に詳
細に説明されている。
Furthermore, regarding the construction method and operating functions of the flat coil and the reflector 2,
061652, ``Magnetic Bubble Driving Coil''.

ところで、従来のこの種のメモリデバイスは
携帯に便利な小型化特に薄形に重点指向があ
り、パツケージ内チツプの気密シールについて
は考慮されてなかつた。
By the way, conventional memory devices of this type have focused on miniaturization, especially thinness, for convenient portability, and no consideration has been given to airtight sealing of the chip inside the package.

(d) 考案の目的 本考案の目的は前記の問題点を解決すること
にある。
(d) Purpose of the invention The purpose of the invention is to solve the above problems.

即ち、メモリチツプの気密封止機能の充実を
図ると共に、併せてより薄形で組立性も一層良
好な磁気バブルメモリデバイスを実現するにあ
る。
That is, the objective is to improve the hermetic sealing function of the memory chip and to realize a magnetic bubble memory device which is thinner and has better assembly efficiency.

(e) 考案の構成 前記の目的は、磁気バブルメモリチツプと、
該メモリチツプ収容の貫通した窓を有する絶縁
基板と、バブル転送用回転磁界を発生する平行
配置のX,Y平面コイルが積層されてなるフラ
ツトコイルと非磁性で且つ導電性の金属からな
る反射板とを少なくとも具備し、前記基板には
前記メモリチツプ内の制御回路に接続する導体
回路が形成され且つその端部には外部引出し用
の外部端子が多数設けられて回路基板を構成し
ており、前記基板裏面には前記メモリチツプが
固定された前記反射板が該メモリチツブを前記
導体回路との接続のため前記窓内に位置させて
接合され、前記基板表面には前記窓を被う封止
板が接合されると共に前記フラツトコイルが載
置されてなることを特徴とした磁気バブルメモ
リデバイスにより達成される。
(e) Structure of the invention The above object is to provide a magnetic bubble memory chip;
An insulating substrate having a penetrating window for accommodating the memory chip, a flat coil formed by laminating X and Y plane coils arranged in parallel to generate a rotating magnetic field for bubble transfer, and a reflection plate made of a non-magnetic and conductive metal. At least the circuit board is provided with a conductor circuit connected to the control circuit in the memory chip, and a large number of external terminals for external extraction are provided at the end of the circuit board, and a circuit board is formed on the back surface of the board. The reflective plate to which the memory chip is fixed is positioned and bonded to the memory chip within the window for connection to the conductor circuit, and a sealing plate that covers the window is bonded to the surface of the substrate. This is achieved by a magnetic bubble memory device characterized in that the flat coil is placed thereon.

(f) 考案の実施例 以下、本考案の実施例図である第2図と第3
図とにより本考案を詳細に説明する。
(f) Example of the invention Below, Figures 2 and 3 are examples of the invention.
The present invention will be explained in detail with reference to the figures.

第2図はメモリデバイス構成の実施例を明示
する分解斜視図、又第3図は第2図の組立体斜
視図である。
FIG. 2 is an exploded perspective view showing an embodiment of the memory device configuration, and FIG. 3 is an assembled perspective view of FIG.

第2図に於て、メモリチツプ1、銅薄板から
なる反射板2、及びXとYの平面コイルCxと
Cyが積層されたフラツトコイル3等、前図と
同一参照番号が付された部分は同一機能を有す
る。
In Fig. 2, a memory chip 1, a reflection plate 2 made of a thin copper plate, and an X and Y planar coil Cx are shown.
Portions with the same reference numbers as in the previous figure, such as the flat coil 3 on which Cy is laminated, have the same functions.

尚、反射板2はフラツトコイル3と平行状に
配置されてなり、該コイル印加の交流磁界で渦
電流を生じ、該渦電流作用によりその間にある
メモリチツプ1に対しイメージコイルが存在す
る如き作用をなしてバブル転送用回転磁界を発
生する。
The reflector plate 2 is arranged parallel to the flat coil 3, and an eddy current is generated by the alternating magnetic field applied to the coil, and the eddy current effect acts on the memory chip 1 between them as if an image coil were present. generates a rotating magnetic field for bubble transfer.

第2図斜視図中、6は絶縁体例えばセラミツ
ク基板、7は基板6の両端部に設けた外部端
子、8は基板6の略中央部に明けられた長方形
の窓、及び9は基板6の窓8を表面側から被て
封止する封止板である。
In the perspective view of FIG. 2, 6 is an insulator such as a ceramic substrate, 7 is an external terminal provided at both ends of the substrate 6, 8 is a rectangular window opened approximately in the center of the substrate 6, and 9 is a rectangular window of the substrate 6. This is a sealing plate that covers and seals the window 8 from the front side.

尚、セラミツク基板6は図示せぬ多数の導体
回路が形成されて回路基板を構成しており、該
導体回路はメモリチツプ1内のバブル発生器、
バブル切換器、バブル検出器等の制御回路と外
部端子7とを接続するため、窓8の周辺部から
基板外周部へ導出している。
Note that the ceramic substrate 6 constitutes a circuit board on which a large number of conductor circuits (not shown) are formed, and the conductor circuits are connected to the bubble generator in the memory chip 1,
In order to connect a control circuit such as a bubble switch or a bubble detector to the external terminal 7, it is led out from the periphery of the window 8 to the outer periphery of the board.

メモリチツプ1は反射板2の略中央に接着等
により固定されており、基板6の下方から窓8
部分に嵌め込んで該基板6の裏面に反射板2を
接合する様にしている。
The memory chip 1 is fixed approximately in the center of the reflector plate 2 by adhesive or the like, and the window 8
The reflection plate 2 is fitted onto the back surface of the substrate 6 and bonded to the back surface of the substrate 6.

そして、基板6と反射板2とを該基板裏面で
例えばガラス接着技法により隈無く接合して一
方側の気密接合をする。他方、基板6の表面側
では窓8の周辺部に露出した前記導体回路の端
部とバブルメモリチツプ1の端子のパターンと
をワイヤ12でボンデイング接続した後、窓8
を閉塞する封止板9を被着して気密性を付与す
る。
Then, the substrate 6 and the reflecting plate 2 are thoroughly bonded to each other on the back surface of the substrate by, for example, a glass bonding technique to achieve an airtight connection on one side. On the other hand, on the front surface side of the substrate 6, after bonding the ends of the conductive circuits exposed around the window 8 and the terminal pattern of the bubble memory chip 1 with wires 12, the window 8 is closed.
A sealing plate 9 is attached to seal the area to provide airtightness.

図中、10は基板6の表面側に形成された凹
部であり、該凹部10に封止板9を被着後、そ
の上方からフラツトコイル3及びフエライト薄
板4とを順次積層し、該積層体を両端開放の強
磁性体からなるシールドケース11に嵌入して
デバイス組立が完了する。
In the figure, 10 is a recess formed on the surface side of the substrate 6. After a sealing plate 9 is attached to the recess 10, a flat coil 3 and a thin ferrite plate 4 are sequentially laminated from above, and the laminate is assembled. The device assembly is completed by fitting it into a shield case 11 made of a ferromagnetic material with both ends open.

尚、第2回の紙面に向つて左側の基板6は反
射板2に実装されたメモリチツプ1が窓8内に
位置するように該反射板2が基板6の裏面に接
合され、且つワイヤボンデイングによる基板6
とメモリチツプ1が接続された状態で封止板9
の被着前の状態を示し、右側の基板6は反射板
2や封止板9等の取付け前の状態を示す。
Note that the board 6 on the left side as viewed from the second paper has a reflector 2 bonded to the back surface of the board 6 so that the memory chip 1 mounted on the reflector 2 is located within the window 8, and wire bonding. Board 6
The sealing plate 9 is connected to the memory chip 1.
The substrate 6 on the right side shows the state before the reflection plate 2, the sealing plate 9, etc. are attached.

第3図は組立完了のデバイス斜視図である。 FIG. 3 is a perspective view of the assembled device.

この様な組立をすれば、気密性の良い安定性
に優れた薄形のデバイスが実現される。
By assembling in this manner, a thin device with good airtightness and excellent stability can be realized.

(g) 考案の効果 以上詳細に説明した本考案のバブルメモリデ
バイスによれば、フラツトコイルと反射板を備
えて構成する偏平型パツケージ体におけるメモ
リチツプの気密封止が実現され、又メモリチツ
プの外部への端子引出しを行なう基板を利用し
てその表裏面にフラツトコイルや反射板等の構
成部品を組付ける構成のため、フラツトコイル
と反射板間の間隔保持用のスペーサ部材等の別
部品を必要とせず組立性の向上が図れると共に
一層の薄形化が達成できるなど、その実用上の
効果は著しいものである。
(g) Effects of the invention According to the bubble memory device of the invention described in detail above, the memory chip is hermetically sealed in a flat package body comprising a flat coil and a reflector, and the memory chip is not exposed to the outside. Because the structure utilizes a board from which terminals are drawn out and assembles components such as flat coils and reflectors on the front and back surfaces of the board, there is no need for separate parts such as spacers to maintain the distance between the flat coil and reflector, making assembly easy. Its practical effects are remarkable, such as improved performance and further thinning.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はフラツトコイルと反射板とを備える従
来のメモリデバイス基本構成を説明する斜視図、
第2図と第3図は本考案の一実施例になるメモリ
デバイス組立構成を示す分解斜視図と組立完成体
斜視図である。 図中、1はメモリチツプ、2は反射板、3はフ
ラツトコイル、4とフエライト板、6はセラミツ
ク基板又は基板、8は窓、9は封止板、11はシ
ールドケースである。
FIG. 1 is a perspective view illustrating the basic configuration of a conventional memory device including a flat coil and a reflector;
FIGS. 2 and 3 are an exploded perspective view and a perspective view of a completed assembly, respectively, showing an assembled configuration of a memory device according to an embodiment of the present invention. In the figure, 1 is a memory chip, 2 is a reflector, 3 is a flat coil, 4 is a ferrite plate, 6 is a ceramic substrate or substrate, 8 is a window, 9 is a sealing plate, and 11 is a shield case.

Claims (1)

【実用新案登録請求の範囲】 磁気バブルメモリチツプと、該メモリチツプ収
容の貫通した窓を有する絶縁基板と、バブル転送
用回転磁界を発生する平行配置のX,Y平面コイ
ルが積層されてなるフラツトコイルと非磁性で且
つ導電性の金属からなる反射板とを少なくとも具
備し、 前記基板には前記メモリチツプ内の制御回路に
接続する導体回路が形成され且つその端部には外
部引出し用の外部端子が多数設けられて回路基板
を構成しており、 前記基板裏面には前記メモリチツプが固定され
た前記反射板が該メモリチツプを前記導体回路と
の接続のため前記窓内に位置させて接合され、 前記基板表面には前記窓を被う封止板が接合さ
れると共に前記フラツトコイルが載置されてなる
ことを特徴とした磁気バブルメモリデバイス。
[Claims for Utility Model Registration] A magnetic bubble memory chip, an insulating substrate having a through window for accommodating the memory chip, and a flat coil formed by laminating X and Y plane coils arranged in parallel to generate a rotating magnetic field for bubble transfer. The substrate includes at least a reflective plate made of a non-magnetic and conductive metal, a conductive circuit connected to a control circuit in the memory chip is formed on the substrate, and a large number of external terminals for external extraction are formed on the end of the conductive circuit. The reflection plate to which the memory chip is fixed is bonded to the back surface of the substrate by positioning the memory chip within the window for connection to the conductor circuit, and the reflection plate is bonded to the back surface of the substrate. A magnetic bubble memory device characterized in that a sealing plate covering the window is bonded to the flat coil and the flat coil is mounted on the flat coil.
JP19964382U 1982-12-28 1982-12-28 magnetic bubble memory device Granted JPS59104398U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19964382U JPS59104398U (en) 1982-12-28 1982-12-28 magnetic bubble memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19964382U JPS59104398U (en) 1982-12-28 1982-12-28 magnetic bubble memory device

Publications (2)

Publication Number Publication Date
JPS59104398U JPS59104398U (en) 1984-07-13
JPS624955Y2 true JPS624955Y2 (en) 1987-02-04

Family

ID=30425169

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19964382U Granted JPS59104398U (en) 1982-12-28 1982-12-28 magnetic bubble memory device

Country Status (1)

Country Link
JP (1) JPS59104398U (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5086939A (en) * 1973-12-01 1975-07-12
JPS5086937A (en) * 1973-12-01 1975-07-12
JPS52132746A (en) * 1976-04-30 1977-11-07 Fujitsu Ltd Magnetic bubble unit
JPS52143721A (en) * 1976-05-24 1977-11-30 Ibm Bubble memory package

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5086939A (en) * 1973-12-01 1975-07-12
JPS5086937A (en) * 1973-12-01 1975-07-12
JPS52132746A (en) * 1976-04-30 1977-11-07 Fujitsu Ltd Magnetic bubble unit
JPS52143721A (en) * 1976-05-24 1977-11-30 Ibm Bubble memory package

Also Published As

Publication number Publication date
JPS59104398U (en) 1984-07-13

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