JPS6248861B2 - - Google Patents

Description

[Detailed Description of the Invention] (1) Technical Field of the Invention The present invention relates to a test method for equipment equipped with a processor, and in particular, a method for testing a plurality of equipment controlled by a program, such as a terminal control equipment, at the same time. Regarding the test method used.

(2) Prior art and problems Terminal control devices with built-in processors are used to control various terminal devices.
Various terminal devices are connected to this terminal control device, and since it is also for online use, various control adapters are installed. Therefore, there are a wide variety of test programs for testing the terminal control device. For example, in the case of banking business, there are 5 types of terminal devices connected.
There are various types, other IPL tests, memory tests, etc.
A program such as a CPU test is required, and at least eight types of programs are required for such a test.

Moreover, the terminal control device is composed of many parts, and it is necessary to detect defects early by screening for initial defects, which requires long-term running tests at room temperature. In order to detect defects at the component stage early and in a short time, it is also necessary to perform a burn-in test (high temperature test), a low temperature start-up test in which the power is turned on in a low temperature state and the operating state is monitored.

In order to perform various tests under various conditions, there is a wide variety of test programs, and during running tests, it requires a lot of human labor, such as managing the test time of each adapter, replacing test programs, and recording errors when they occur. I was using . For this reason, it has been required to perform such tests with as little human intervention as possible.

(3) Purpose of the Invention In order to meet such requirements, the purpose of the present invention is to use a terminal control device as a test master device and provide an IPL program storage section in this master device along with a large number of test programs. We provide a test method for equipment equipped with a processor that first stores this IPL in the terminal control device under test, then uses this IPL to load the program yourself and performs the test based on this IPL. It is to be.

(4) Structure of the Invention In order to achieve this object, in a test method for a device equipped with a processor according to the present invention, in a test method in which a device having a processor tests another device having a processor, it is possible to IPL storage means for storing the IPL of the device on the test side, test program storage means for storing a plurality of test programs, test status monitoring means for monitoring whether or not the test has been carried out normally, and the program. The device under test is provided with a program sending means for sending out a program, and the device under test is placed in a constant temperature room having an environmental temperature control means, and the device under test is operated under the temperature condition set by the temperature control. The present invention is characterized in that a program is stored in its own memory, a test is performed based on the program, and the test result is reported to a testing device, and the reported result is monitored by the test status monitoring means.

(5) Embodiments of the Invention In the present invention, one basic adapter having line connection capability, such as an adapter for printing a bankbook, is used in the terminal control device.

An embodiment of the present invention will be described based on FIGS. 1 to 3.

FIG. 1 is a schematic configuration diagram of a test method for a device equipped with a processor according to the present invention, FIG. 2 is a schematic configuration diagram of a test terminal control section and a terminal control section under test, and FIG. 3 is a schematic configuration diagram of a test terminal control section according to the present invention. FIG. 2 is a configuration diagram of the main parts of the test terminal control section of FIG.

In the figure, 1 is the master terminal control device, 2
is a keyboard printing section with a typewriter (printer), 3 is a display section with a display similar to a cathode ray tube and a keyboard, 4, 4-a, 4-m, 4-
n is a slave terminal control device, 5 is a constant temperature test chamber, 6 is a temperature control section, 7 is a heating/cooling section, 1
0 is the system management section, 11 is the data reception section, 12
is a data decoding section, 13 is an error monitoring section, 1
4 is a priority/parallel processing decoding unit, 15 is a queue control unit, 16 is a queue storage unit, 17 is a status monitoring unit, 18 is a test progress status monitoring unit, 20
21 is a program sending determination unit, 21 is a program storage unit, 22 is a data transmission unit, 23 is a DIS data reception unit, 24 is a 1st IDIS decoding unit, 25 is a TYP data reception unit, 26 is a 1st TYP decoding unit, 27 is a time measurement unit part, 28 is the second TYP decoding part, 29 is
TYP data transmission section, 30 is the second DIS decoding section,
31 is a DIS data sending section.

A master terminal control device (hereinafter referred to as master T/C) 1 is a terminal control section for testing, and has a detailed configuration as shown in FIG.
That is, a cassette deck 1-0 in which an IPL (Initial Program Load) program and each test program are stored, a cassette control section 1-1 that controls this cassette deck 1-0, and an I/O that controls a terminal device. A control unit 1-2, a public line control unit 1-3, and a storage unit 1 in which a plurality of (for example, 8 types) test programs for IPL and various adapters read from the cassette deck 1-0 are stored.
-4, processor 1-5, and status notification setting unit 1
-6 and console section 1 for custom engineer
-7 and I/O channel sections #0 to #16 are provided. The number of I/O channels can be increased depending on the number of devices to be tested, making it possible to test up to approximately 40 devices, and the number of connected devices can be increased approximately three times by adding channels and changing programs. .

A typewriter-equipped keyboard printing section (hereinafter referred to as printing section) 2 prints out error information, for example, and is connected to the I/O control section of the master T/C.

The display section 3 displays the progress status of the test, for example, the test time, etc. on the cathode ray tube section, and also displays the error if it occurs, and is also provided with a keyboard for input.

Slave terminal control devices (hereinafter referred to as slave T/Cs) 4, 4-a, 4-m, 4-n (these have the same structure, and the detailed configuration diagram is shown in Fig. 2) are the test target. This is a terminal control device for testing, and has almost the same structure as the master T/C1, but the number of I/O channels can be increased or decreased depending on the user's specifications, and the capacity of the storage section 4-4 can also be increased or decreased depending on the user. There is. And master T/C
The channel section #0 is connected to the I/O channel section by cable C ₀ , and the other channel sections are connected by channel test cable C ₁ . Further, the public line control section 4-3 is connected as shown in the figure by a cable _C2 for local testing. And the cable _C0 connecting master T/C1 and slave T/C4 is 1
It can be extended up to Km.

Constant temperature test chamber 5 is slave T/C4-a, 4-
m, 4-n...... is tested by maintaining it under specific conditions, and can adjust the temperature to, for example, about 10°C to 50°C. A heating/cooling section 7 equipped with a heater and a cooling compressor is installed.

The system management section 10 comprehensively manages the master T/C 1 and operates as a main control section.

The data receiving section 11 is a receiving section that receives data transmitted from each slave T/C.

The data decoder section 12 is the data receiving section 11
It decodes the data input from.

The error monitoring unit 13 monitors the occurrence of errors.

The priority/parallel processing decoding unit 14 distinguishes between the data sent from the data decoding unit 14, which data has a high priority in terms of data processing, and outputs the high priority data immediately, while leaving other data waiting. The data is sent to the queue storage unit 16 via the queue control unit 15, and after the data with higher priority is output later, the data is controlled to be sent out in sequence. Here, the data with a high priority corresponds to error-related data and the like.

The queue control section 15 performs control to store the data transmitted from the priority/parallel processing decoding section 14 in the queue storage section 16, or to sequentially retrieve the stored data.

The queue storage section 16 is a data storage section that holds data transmitted from the priority/parallel processing decoding section 14, and uses the area of the storage section 1-4.

The status monitoring unit 17 monitors each slave T/C4-a, 4
-m, 4-n, . . . test status, and includes, for example, a counter that counts the number of tests performed using the same test program.

The test progress monitoring unit 18 monitors the test progress of the slave T/C, and has functions such as determining which program has been tested or which program is currently being tested.

The test progress state storage section 19 stores test results of each test program, and the test progress state storage section 19 stores test results of each test program.
A part of the -4 area is used.

The program sending determination unit 20 determines the program to be sent to the slave T/C, and selects test programs in sequence according to the progress of the test.

The program storage unit 21 stores various programs necessary for testing the slave T/C, and should be sent to the slave T/C.
The IPL, each test program, etc. are stored, and the area of the storage unit 1-4 is used. Each of these programs has been transferred from the cassette deck 1-0 prior to test execution.

The data transmitter 22 is a transmitter for transmitting various data necessary for test execution to the slave T/C.

The DIS data receiving section 23 receives data input from a keyboard or the like provided on the display section 3, and this received data is decoded by the first DIS decoding section 24.

The TYP data receiving section 25 receives data input from the typewriter-equipped keyboard printing section 2, and this receiving section data is decoded by the first TYP decoding section 26.

The time measurement unit 27 is connected to each slave T/C4-a, 4
-m, 4-n...... are used to measure the time during which they are tested, and the test time is measured for each slave T/C.

The second TYP decoding section 28 decodes the data to be output to the printing section 2, and this decoded data is sent to the printing section 2 via the TYP data transmission section 29 and printed out by the printer. .

The second DIS decoding section 30 decodes data to be output to the display section 3, and this decoded data is sent to the display section 3 via the DIS data transmission section 31, and is displayed on a cathode ray tube, for example. output on the screen.

Next, the operation of the present invention will be explained.

Operator uses slave T/C4 as master T/C
Connect it to the I/O channel section of 1 using cable _C0 , and set the status notification setting section of slave T/C4 to the state required for the test.

Next, the boot program is IPLed to the slave T/C 4 from the cassette deck 4-0.

The worker presses the activation key of the slave T/C4, and the slave T/C4 sends activation data to the master T/C1. This data is transmitted from the data receiving section 11 to the system management section 10, whereby the master T/C
It is determined that C is in the tested state.

In addition, the system management unit 10 stores this data as
2TYP decoding section 28 and second DIS decoding section 3
Send to 0. The second TYP decoding section 28 and the second TYP decoding section 28
The 2DIS decoding section 30 decodes this data and extracts the data to be printed and the data to be displayed, and the data to be printed is transmitted from the second TYP decoding section 28 to the printing section 2 via the TYP data transmission section 29. , the necessary data is output to the printer. Also, the data to be displayed is
2DIS decoding section 30 to DIS data sending section 30
The data is sent to the display section 3 via the , and necessary display is performed.

After confirming that the connection between the master T/C 1 and slave T/C 4 is complete, the operator inputs necessary information from the keyboard of the printing section 2 or the display section 3. For example, in the case of the first test, a test start signal indicating that the test is to be performed first and the name of the program to be tested first are input.

The input data is transmitted to the DIS data receiving section 23 and the first DIS decoding section 24 or
TYP data receiving section 25 and first TYP decoding section 2
6 to the system management section 10. Then, the system management section tests the program sending determination section 20 and stores the necessary test programs in the program storage section 20 in program units.
The data transmission section 22 outputs this to the slave T/C 4, and also instructs the time measurement section 27 to monitor the time for testing the slave T/C 4.

The slave T/C 4 stores this sent test program in its own storage section 4-4, and after the storage is completed, starts a test based on this.

The slave T/C executes the same test multiple times using this test program. Then, each time a test is completed, the results are mastered.
Report to C. This test result is transmitted to the data decoding section 12 via the data receiving section 11, and if an error is detected at the time of decoding, it is reported to the error monitoring section 13. In addition, other data is transmitted to the priority/parallel processing decoding section 14,
Data with high processing priority, such as error-related data, is immediately transmitted to the status monitoring section 17 and the error monitoring section 13. Other data is once stored in the queue storage unit 16 by the queue control unit 15.
After being set to , it is read out again by the queue control unit 15, transmitted to the status monitoring unit 17 via the priority/parallel processing decoding unit 14, and sent to the test progress status storage unit via the test progress status monitoring unit 18. 19. This stored data can be displayed on the display section 3 or printed out on the printing section 2, if necessary. In this manner, each time a test is completed, the results are analyzed. The number of times of this test is counted by the condition monitoring section 17. Furthermore, the error monitoring unit 13 transmits error information to the data transmitting unit 2.
2 to the slave T/C, it is also output to the printing unit 2 and display unit 3, and is reported to the system management unit 10.

If a predetermined number of tests are completed for one test program and the test result is good, the program sending determination section 20 transfers the next test program to the slave T/C 4 in units of programs. A similar test is then performed for this as well.

This kind of thing is repeated and the slave T/C
When the necessary tests have been completed, the operator sees this on the display section 3, etc., and inputs a command to stop the test by operating the keyboard.
As a result, the master T/C 1 knows that the test on the slave T/C 4 has been completed, and outputs the test data set in the test progress status storage section 19 to the printing section 2 or the display section 3 as necessary. You can also do it.

Although the explanation of temperature control was omitted in the above explanation, the test is performed while controlling the temperature of constant temperature room test 5 as necessary.

(6) Effects of the Invention According to the present invention, all test programs are stored in the master T/C, and the necessary programs are sent to the slave T/C each time according to the test progress status. Since the test results are monitored, it is possible to automatically replace the test program, record the running time and the occurrence of failures, etc. without any manual intervention. In addition, the connection with the master T/C is fast line speed,
Furthermore, it is possible to use an adapter that is the basic configuration of a slave T/C with many connection channels. Furthermore, since the processor of the slave T/C can be used to transmit and receive data in each slave T/C, the burden on the processor of the master T/C can be greatly reduced. What's more, it is possible to change the temperature of the same floor during a run, and it is also possible to perform tests that operate for 24 hours.

As a result, the man-hour burden for running test management is almost eliminated, temperature control tests enable early detection of initial failures and intermittent failures, and 24-hour operation tests enable early detection of failures and intermittent failures. This makes it possible to significantly reduce initial failures after delivery to the user.

[Brief explanation of the drawing]

FIG. 1 is a schematic configuration diagram of a test method for a device equipped with a processor according to the present invention, FIG. 2 is a schematic configuration diagram of a test terminal control section and a terminal control section under test, and FIG. 3 is a schematic configuration diagram of a test terminal control section according to the present invention. FIG. 2 is a configuration diagram of the main parts of the test terminal control section of FIG. In the figure, 1 is the master terminal control device, 2
is a keyboard printing section with a typewriter (printer), 3 is a display section with a display like a cathode ray tube and a keyboard, 4, 4-a, 4-m, 4-
n is a slave terminal control device, 5 is a constant temperature test chamber, 6 is a temperature control section, 7 is a heating/cooling section, 1
0 is the system management section, 11 is the data reception section, 12
is a data decoding section, 13 is an error monitoring section, 1
4 is a priority/parallel processing decoding unit, 15 is a queue control unit, 16 is a queue storage unit, 17 is a status monitoring unit, 18 is a test progress status monitoring unit, 20
21 is a program storage unit, 22 is a data transmission unit, 23 is a DIS data reception unit, 24 is a first DIS decoding unit, 25 is a TYP data reception unit, 26 is a first TYP decoding unit, and 27 is a time measurement unit. part, 28 is the second TYP decoding part, 29 is
TYP data transmission section, 30 is the second DIS decoding section,
31 is a DIS data sending section.

Claims (1)

[Claims] 1. In a test method for testing a device having a processor, one of the devices having the processor is tested.
One is a test device, and the test device includes an IPL storage means for storing the IPL of another device under test, a test program storage means for storing a plurality of test programs, and a test program storage means for storing a plurality of test programs. The device under test is provided in a constant temperature room having a test state monitoring means for monitoring whether the program has been performed and a program sending means for sending out the program, and also has an environmental temperature control means, Under the temperature condition set by the test program, the test program is stored in its own memory, a test is performed based on the test program, and the test result is reported to the test equipment, and the report result is sent to the test state monitoring means. 1. A test method for a device equipped with a processor, characterized in that the device is monitored by: