JPS6248385B2 - - Google Patents

Info

Publication number
JPS6248385B2
JPS6248385B2 JP15373380A JP15373380A JPS6248385B2 JP S6248385 B2 JPS6248385 B2 JP S6248385B2 JP 15373380 A JP15373380 A JP 15373380A JP 15373380 A JP15373380 A JP 15373380A JP S6248385 B2 JPS6248385 B2 JP S6248385B2
Authority
JP
Japan
Prior art keywords
annular groove
case
metal substrate
resin
bonded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP15373380A
Other languages
Japanese (ja)
Other versions
JPS5778157A (en
Inventor
Makoto Okazaki
Noritoshi Kotsuji
Toshiki Kurosu
Yoichi Nakajima
Tatsuo Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Hitachi Power Semiconductor Device Ltd
Original Assignee
Hitachi Ltd
Hitachi Haramachi Electronics Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Haramachi Electronics Ltd filed Critical Hitachi Ltd
Priority to JP15373380A priority Critical patent/JPS5778157A/en
Publication of JPS5778157A publication Critical patent/JPS5778157A/en
Publication of JPS6248385B2 publication Critical patent/JPS6248385B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/10Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1301Thyristor

Description

【発明の詳細な説明】 本発明は樹脂封止型半導体装置に係り、特に改
良された構造の容器を有する樹脂封止型半導体装
置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a resin-sealed semiconductor device, and more particularly to a resin-sealed semiconductor device having a container with an improved structure.

第1図に本発明が適用できうる樹脂封止型半導
体装置の従来例として樹脂封止型サイリスタを示
す。
FIG. 1 shows a resin-sealed thyristor as a conventional example of a resin-sealed semiconductor device to which the present invention can be applied.

第1図に於いて、少なくとも一つのpn接合を
有する半導体チツプ1は図示しないろう材を介し
てアノード電極2、カソード電極3、ゲート電極
4と接着され、各リードはそれぞれアノードリー
ド5、カソードリード6、ゲートリード7と図示
しないろう材を介して接着されている。上記アノ
ードリード5、カソードリード6、ゲートリード
7は銅板8を介して熱伝導率の大きなAl2O3等の
絶縁板9にろう付され、さらに該絶縁板9は通電
時に発生する熱損失を放熱するための熱伝導性の
優れた金属基板10にろう材11を介して接着さ
れている。さらに一体ろう付された半導体チツプ
等を覆うようなケース12を金属基板10上に設
けられた環状溝10aにはめ込み、シアノアクリ
レート系等の接着剤13で接着し、半導体チツプ
1等を電気的および機械的に保護するためにケー
ス12の内部をエポキシレジン等のレジン14に
よつてモールドしている。
In FIG. 1, a semiconductor chip 1 having at least one pn junction is bonded to an anode electrode 2, a cathode electrode 3, and a gate electrode 4 via a brazing material (not shown), and each lead is connected to an anode lead 5, a cathode lead, and a cathode lead. 6. It is bonded to the gate lead 7 via a brazing material (not shown). The anode lead 5, cathode lead 6, and gate lead 7 are brazed to an insulating plate 9 made of Al 2 O 3 or the like having high thermal conductivity via a copper plate 8, and the insulating plate 9 prevents heat loss that occurs when electricity is applied. It is bonded via a brazing material 11 to a metal substrate 10 with excellent thermal conductivity for heat dissipation. Furthermore, a case 12 that covers the integrally brazed semiconductor chip, etc. is fitted into the annular groove 10a provided on the metal substrate 10, and is adhered with an adhesive 13 such as cyanoacrylate. The inside of the case 12 is molded with a resin 14 such as epoxy resin for mechanical protection.

第2図は第1図のAに示す部分の拡大図であ
る。
FIG. 2 is an enlarged view of the portion indicated by A in FIG. 1.

第2図に於いて、金属基板10は機械的強度を
得るために数mmの厚みがあり、セラミツク等の絶
縁板9と金属基板10との熱膨張率の差が大き
く、熱疲労耐量を確保するために、ろう材11の
厚みを増す必要がある。ろう材11を厚くする
と、絶縁板9の端部にろう材のはみ出し11aが
生じ、ケース12の接着の為に設けられた環状溝
10aの内部にはみ出したろう材11aが進入
し、ケース12と金属基板10との係合接着に支
障をきたし、外部からの水分の浸入が問題となつ
ていた。
In Fig. 2, the metal substrate 10 has a thickness of several mm to obtain mechanical strength, and there is a large difference in thermal expansion coefficient between the insulating plate 9 made of ceramic or the like and the metal substrate 10, ensuring thermal fatigue resistance. In order to do this, it is necessary to increase the thickness of the brazing filler metal 11. When the brazing material 11 is thickened, the brazing material 11a protrudes from the end of the insulating plate 9, and the protruding brazing material 11a enters the annular groove 10a provided for adhering the case 12, causing the case 12 and the metal to be bonded together. This has caused problems in engagement and adhesion with the substrate 10, and the intrusion of moisture from the outside has been a problem.

また同時に、ケース12と金属基板10の係合
接着の際に使用する接着剤13がケース12の内
部に浸透することがあり、かつ絶縁板9に含浸し
て絶縁耐力を劣化させることがあつた。
At the same time, the adhesive 13 used for engagement and adhesion between the case 12 and the metal substrate 10 may penetrate into the inside of the case 12 and impregnate the insulating plate 9, degrading the dielectric strength. .

本発明の目的は、上記欠点を除去し、絶縁板を
金属基板に接着するためのろう材が上記金属基板
の上記環状溝に流れ込んだときも、ケースと金属
基板の係合接着には何ら支障をきたさず、かつ、
ケースと金属基板との係合接着の際に用いられる
接着剤がケース内部に浸透することを防止する、
優れた耐湿性を有する樹脂封止型半導体装置を提
供することにある。
An object of the present invention is to eliminate the above-mentioned drawbacks, and even when a brazing material for bonding an insulating plate to a metal substrate flows into the annular groove of the metal substrate, there is no problem in the engagement and adhesion of the case and the metal substrate. without causing
Prevents the adhesive used when bonding the case and metal substrate from penetrating inside the case.
An object of the present invention is to provide a resin-sealed semiconductor device having excellent moisture resistance.

上記目的を達成する本発明樹脂封止型半導体装
置の特徴とするところは、一方の主表面に環状溝
を有する金属基板と、上記金属基板の一方の主表
面の環状溝によつて包囲された部分上にろう材を
介して接着された絶縁板と、少なくとも一つの
pn接合を有し上記絶縁板に固着された半導体チ
ツプと、断面が上記環状溝と略同形状をなし、一
端で上記環状溝に係合接着されたケースと、上記
金属基板と上記ケースによつて形成される容器内
に少なくとも上記半導体チツプが被われる程度に
充填されたレジンと、上記半導体チツプと電気的
に接続され上記レジンより外部に突出されている
リードとを具備するものに於いて、上記ケースの
一端外周側に、上記環状溝の開口部外周側に係合
接着する段部を形成し、上記環状溝は上記ケース
を係合接着した状態で上記ケースの一端と上記環
状溝の底面及び内周面との間に間隙を有する様に
形成することである。
The resin-sealed semiconductor device of the present invention that achieves the above object is characterized by: a metal substrate having an annular groove on one main surface; and a metal substrate surrounded by the annular groove on one main surface of the metal substrate. an insulating plate bonded via a brazing material on the part; and at least one
A semiconductor chip having a p-n junction and fixed to the insulating plate, a case whose cross section has approximately the same shape as the annular groove and which is engaged and bonded to the annular groove at one end, and the metal substrate and the case. a resin filled in a container formed by the semiconductor chip to at least cover the semiconductor chip, and a lead electrically connected to the semiconductor chip and protruding from the resin, A stepped portion is formed on the outer periphery of one end of the case to be engaged and bonded to the outer periphery of the opening of the annular groove, and the annular groove is connected to the one end of the case and the bottom surface of the annular groove in a state where the case is engaged and bonded. and the inner peripheral surface so as to have a gap therebetween.

本発明に於いて、金属基板の一方の主表面上に
設けられた環状溝は、環状に限らず、矩形状であ
つても、環状、矩形状の組み合わせであつてもよ
く、無端状であれば任意のもので良い。
In the present invention, the annular groove provided on one main surface of the metal substrate is not limited to an annular shape, but may be rectangular, a combination of annular and rectangular shapes, or endless. It can be anything you like.

以下本発明の実施例を図面を用いて説明する。 Embodiments of the present invention will be described below with reference to the drawings.

第3図は本発明の一実施例である樹脂封止型半
導体装置の第1図のAに示す部分に相当する部分
の拡大図である。第3図に於いて、金属基板10
上の環状溝10aとケース12の一端外周側に設
けられる段部12aとの関係を除いては前述の第
1図に示した従来型と同様の構造である。
FIG. 3 is an enlarged view of a portion corresponding to the portion A in FIG. 1 of a resin-sealed semiconductor device according to an embodiment of the present invention. In FIG. 3, a metal substrate 10
Except for the relationship between the upper annular groove 10a and the stepped portion 12a provided on the outer peripheral side of one end of the case 12, the structure is similar to that of the conventional type shown in FIG. 1 described above.

同図に於いて、ケース12を係合した状態で、
ケース12の一端と環状溝10aの底面及び内周
面との間は、はんだ11が流れ込める程度の間隙
が設けられている。ケース12と金属基板10は
ジアノアクリレート系等の浸透性の良い接着剤1
3によつて接着される。
In the figure, with the case 12 engaged,
A gap is provided between one end of the case 12 and the bottom and inner circumferential surfaces of the annular groove 10a to allow the solder 11 to flow therein. The case 12 and the metal substrate 10 are bonded with a highly permeable adhesive 1 such as dianoacrylate.
3.

本実施例によれば、絶縁板9を金属基板10に
接着させるために用いられるはんだ等のろう材1
1が金属基板上の環状溝10aに流れ込んだ場
合、ケース12の一端と環状溝10aの底面及び
内周面との間の間隙にろう材11が流れるので、
金属基板10とケース12を係合接着する際、支
障をきたすことはない。
According to this embodiment, a brazing material 1 such as solder used to bond an insulating plate 9 to a metal substrate 10
1 flows into the annular groove 10a on the metal substrate, the brazing filler metal 11 flows into the gap between one end of the case 12 and the bottom and inner peripheral surface of the annular groove 10a.
There is no problem when the metal substrate 10 and the case 12 are engaged and bonded together.

また、上記の様な間隙を設けているので、接着
剤13がケース12の内部に浸透しない。
Further, since the above-mentioned gap is provided, the adhesive 13 does not penetrate into the inside of the case 12.

本発明者等は、ジアノアクリレート系の接着剤
を使用した場合、上記ケース12の一端と環状溝
10aの底面及び内周面との間を0.15mm以上離す
ことによつて、接着剤13が毛管現象によつてケ
ース12の内部に浸透することがないことを確認
した。
The present inventors have found that when using a dianoacrylate adhesive, the adhesive 13 can be easily It was confirmed that there was no penetration into the interior of the case 12 due to capillary action.

第4図から第7図に本発明の他の実施例を示
す。
Other embodiments of the present invention are shown in FIGS. 4 to 7.

環状溝10aの内側と外側では金属基板10が
同一平面にある必要はなく、第4図及び第5図に
示す様に段差が存在してもよい。
The metal substrate 10 does not need to be on the same plane inside and outside the annular groove 10a, and there may be a step difference as shown in FIGS. 4 and 5.

また、第6図,第7図に示す様に環状溝10a
の側面は金属基板10の主面に対して垂直である
必要はなく適当な傾きを持つていてもよく、さら
に第7図に示す様に金属基板10とケース12の
接着面は一面だけでもよい。
Further, as shown in FIGS. 6 and 7, the annular groove 10a
The side surface of the metal substrate 10 does not need to be perpendicular to the main surface of the metal substrate 10 and may have an appropriate inclination, and furthermore, the bonding surface between the metal substrate 10 and the case 12 may be only one surface as shown in FIG. .

また、上述に於いてはサイリスタを例にとつて
説明したが、これに限らずダイオード、トランジ
スタ等の樹脂封止型半導体装置にも本発明は適用
できる。
Furthermore, although the above description has been made using a thyristor as an example, the present invention is not limited to this, and can also be applied to resin-sealed semiconductor devices such as diodes and transistors.

以上述べた様に本発明によれば、金属基板の環
状溝はケースを係合接着した状態でケースの一端
と環状溝の底面及び内周面との間に間隙を有する
様に形成するので、絶縁板を金属基板に接着する
ためのろう材が金属基板の環状溝に流れ込んだと
きも、ケースと金属基板との係合接着には何ら支
障をきたさず、かつ、ケースと金属基板との係合
接着の際に用いられる接着剤がケース内部に浸透
することを防止する、優れた耐湿性を有する樹脂
封止型半導体装置を得ることができる。
As described above, according to the present invention, the annular groove of the metal substrate is formed so that there is a gap between one end of the case and the bottom and inner peripheral surface of the annular groove when the case is engaged and bonded. Even when the brazing material for bonding the insulating plate to the metal substrate flows into the annular groove of the metal substrate, there is no problem in the engagement and adhesion between the case and the metal substrate, and the engagement between the case and the metal substrate is maintained. It is possible to obtain a resin-sealed semiconductor device that has excellent moisture resistance and prevents the adhesive used in bonding from penetrating into the inside of the case.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例である樹脂封止型半導体装置を
示す断面図、第2図は第1図のAに示す部分の拡
大断面図、第3図は本発明の一実施例である樹脂
封止型半導体装置の第1図のAに示す部分に相当
する部分の拡大断面図、第4図から第7図は本発
明の他の実施例である樹脂封止型半導体装置の第
1図のAに示す部分に相当する部分の拡大断面図
である。 1…半導体チツプ、2…アノード電極、3…カ
ソード電極、4…ゲート電極、5…アノードリー
ド、6…カソードリード、7…ゲートリード、8
…銅板、9…絶縁板、10…金属基板、11…ろ
う材、12…ケース、13…接着剤、14…レジ
ン。
FIG. 1 is a sectional view showing a conventional resin-sealed semiconductor device, FIG. 2 is an enlarged sectional view of the portion indicated by A in FIG. 1, and FIG. 3 is a resin-sealed semiconductor device according to an embodiment of the present invention. FIGS. 4 to 7 are enlarged cross-sectional views of a portion corresponding to the portion A in FIG. 1 of the sealed semiconductor device, and FIGS. It is an enlarged sectional view of a part corresponding to the part shown in A. DESCRIPTION OF SYMBOLS 1... Semiconductor chip, 2... Anode electrode, 3... Cathode electrode, 4... Gate electrode, 5... Anode lead, 6... Cathode lead, 7... Gate lead, 8
...Copper plate, 9...Insulating plate, 10...Metal substrate, 11...Brazing material, 12...Case, 13...Adhesive, 14...Resin.

Claims (1)

【特許請求の範囲】[Claims] 1 一方の主表面に環状溝を有する金属基板と、
上記金属基板の一方の主表面の環状溝によつて包
囲された部分上にろう材を介して接着された絶縁
板と、少なくとも一つのpn接合を有し上記絶縁
板に固着された半導体チツプと、断面が上記環状
溝と略同形状をなし、一端で上記環状溝に係合接
着されたケースと、上記金属基板と上記ケースに
よつて形成される容器内に少なくとも上記半導体
チツプが被われる程度に充填されたレジンと、上
記半導体チツプと電気的に接続され上記レジンよ
り外部に突出されているリードとを具備するもの
に於いて、上記ケースの一端外周側に、上記環状
溝の開口部外周側に係合接着する段部を形成し、
上記環状溝は上記ケースを係合接着した状態で上
記ケースの一端と上記環状溝の底面及び内周面と
の間に間隙を有する様に形成することを特徴とす
る樹脂封止型半導体装置。
1 a metal substrate having an annular groove on one main surface;
an insulating plate bonded via a brazing material onto a portion of one main surface of the metal substrate surrounded by the annular groove; and a semiconductor chip having at least one pn junction and fixed to the insulating plate. a case having a cross section substantially the same shape as the annular groove and having one end engaged and bonded to the annular groove, and at least the semiconductor chip being covered within a container formed by the metal substrate and the case; and a lead electrically connected to the semiconductor chip and protruding outward from the resin, the opening outer periphery of the annular groove being located on the outer periphery side of one end of the case. forming a stepped portion that engages and adheres to the side;
The resin-sealed semiconductor device is characterized in that the annular groove is formed so as to have a gap between one end of the case and a bottom surface and an inner circumferential surface of the annular groove when the case is engaged and bonded.
JP15373380A 1980-11-04 1980-11-04 Resin-sealed semiconductor device Granted JPS5778157A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15373380A JPS5778157A (en) 1980-11-04 1980-11-04 Resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15373380A JPS5778157A (en) 1980-11-04 1980-11-04 Resin-sealed semiconductor device

Publications (2)

Publication Number Publication Date
JPS5778157A JPS5778157A (en) 1982-05-15
JPS6248385B2 true JPS6248385B2 (en) 1987-10-13

Family

ID=15568901

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15373380A Granted JPS5778157A (en) 1980-11-04 1980-11-04 Resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JPS5778157A (en)

Also Published As

Publication number Publication date
JPS5778157A (en) 1982-05-15

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