JPS6247697A - Touch controller for electronic musical apparatus - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] Technical Field> The present invention relates to a touch control device for controlling the volume of musical tones produced by the musical instrument according to the pressing speed of a key in an electronic musical instrument equipped with a keyboard device. During the period when the key is in the depressed state, that is, during the key jumping period, the touch value representing the amount of sound corresponding to the key depression speed is calculated, and the key is shifted to the depressed state. This is an improved touch control device that directly obtains the touch value related to the pressed key at the moment the key is pressed all the way down. It is known that the pitch is inversely proportional to the square of the jump period, and performers can skillfully utilize this characteristic to control the pitch and volume with their fingertips to create delicate musical expressions. It is something that can be done.

In recent years, in the field of electronic musical instruments, electronic pianos have been proposed that have the same musical expression as pianos, and in such electronic pianos, the key press speed, that is, the key jump y, y There is a need to generate musical tones whose volume changes while maintaining a specific functional relationship with the period. In order to meet this demand, in conventional electronic musical instruments, touch sensors that output analog voltages that have a specific functional relationship with the key jumping period are often arranged for each of the six keys. Ta.

However, conventional touch control devices with such a large number of touch sensors require a capacitor to accumulate and hold an analog voltage for each touch sensor, making the configuration complex and expensive. , which had the disadvantage of reduced reliability.

Furthermore, since a large number of wirings connecting the six keys and the touch sensors and adjustment of the large number of touch sensors are required, there is also the problem that both the manufacturing process and the adjustment process become complicated.

On the other hand, as a solution to the above drawbacks and difficulties,
Publication No. 6-181594 discloses that a unique touch counter is assigned to six keys in a time-sharing manner, and the jumping period of the six keys is counted in digital quantities. A touch control device is disclosed in which touch control is performed intermittently only during a basic state cycle when a pass line is in an unused state.

However, this conventional device is configured to once measure the period of the key depression state, that is, the period of the key jump, so in addition to the only touch counter, the count value of the counter (the period of the key jump) This method requires a search processing means or the like to convert a period) into a touch value that has a specific functional relationship with the touch value, which has the disadvantage that the configuration cannot be thoroughly simplified.

Therefore, in Japanese Patent Application No. 59-101184, the present applicant proposes a touch response system that calculates touch values representing the sound volume corresponding to the key press speed using real-time processing based on key status signals output from a touch responder. A touch control device including a value calculation processing means has been proposed, but in such a touch control device, the touch value calculation means and the key assigner regularly perform operations on the upbeat and backbeat of the reference state period, regardless of the key state. Due to the time-division operation, the key assigner's operation to read the touch value was wasted, and the response time from when the player pressed a key until the sound corresponding to the pressed key was lengthened.

In addition, during the top beat of the standard state period, the operation must be assigned to the calculation process in the touch value calculation processing means in order to detect a new transition to key press or key release, and during this period, the key assigner Since the latter is in a stopped state, not only is the amount of work that can be loaded on the key assigner restricted, but also the key assigner and the touch value calculation processing means must be configured in a complementary drive type, which reduces design freedom. There was also the drawback that the degree was limited.

<11> The purpose of the present invention is to solve the problem of insufficient simplification of the configuration based on the above-mentioned prior art, as well as the lack of responsiveness of pronunciation and constraints on the workload of the key assigner based on the prior invention, as well as the design In view of the difficulty of limiting the degree of freedom above, in response to the detection of a key press by key scanning, the touch values of the 6 keys are directly calculated using real-time calculation processing during the key press state of the 6 keys. At the same time, the touch value is stored, and upon transition to the key press completion state, key scanning and touch value calculation processing are interrupted, and the touch value of the key that has reached the key press completion state is read out to the key assigner. It is an object of the present invention to provide a touch control device which eliminates the above-mentioned drawbacks and difficulties, has excellent pronunciation responsiveness, expands the workload of a key assigner, and has a large degree of freedom in design.

Structure of the present invention in accordance with the above object, as shown in FIG. Outputs the key state signal Sl, and in response, the subsequent touch value calculation processing means B performs the following touch value calculation processing means B during the period in which the pressed key is transitioning to the key pressed state, that is, during the key jumping period. , a touch value representing the sound volume corresponding to the key pressing speed of the key is calculated by real-time arithmetic processing according to a desired function that is easy to change, the touch value is stored, and then the tuffless boner A calculates the sound volume corresponding to the key pressing speed. Key status signal S1 indicating completion status
In response to this, key scanning and touch value calculation processing are interrupted, the stored touch value is read out to the key assigner, and the key assigner supplies it to the sounding means, A musical tone with a pitch corresponding to the pressed key is produced at a volume corresponding to the touch value. On the other hand, after reading out the touch value to the key assigner, the touch responder A resumes key scanning and responds to the touch. The gist is that the value calculation processing means B restarts the touch value calculation process again.

<Embodiment> Next, the structure and operation of the first embodiment of the present invention will be explained based on FIGS. 1 to 6 as follows.

FIG. 2 is a block diagram showing the hardware configuration. A divider 2 is connected to a clock pulse generator 1 that oscillates a clock pulse with a period of about 1 μs, and the lowest digit (LSB) to the third digit From the output terminal of
4 bits (4 bits) that can identify the 10 operating states described below
A machine cycle signal line 3a extends to a clock signal terminal of an arithmetic processing unit 5 consisting of a microcomputer. Further, seven address signal lines 4 extend from the output terminals of the fourth digit to the maximum digit (MSB) of the divider 2, and are connected to the address signal terminals of the decoder 6 and the first input terminal of the first multiplexer 7. , respectively, are connected.

The address bus 8 from the arithmetic processing unit 5 is divided into seven trees (8a) for lower digits and two trees (8b) for upper digits.
a) is connected to the second input terminal of the first multiplexer 7 and the latter (8b) is connected to the first input terminal of the second multiplexer 10 together with the 7-tree address signal line 9 from the first multiplexer 7. connected to the terminal.

Further, a control signal terminal of the first multiplexer 7 is connected to a control signal 8c from the arithmetic processing unit 5.

Further, the output data bus 11 and the input data bus 12 of each of the seven trees connected to the arithmetic processing device 5 are commonly connected to the touch value memory 13, the continuous am duration memory 14, and the arithmetic command data memory 15, respectively. and an address signal I6 extending from the output terminal of the second multiplexer 1o.
are commonly connected to the memories 13, 14, and 15 as an address bus.

A seventh bit signal line 12a extends from each of the seventh bits of the output terminals of the memory 14.15 and is connected to the arithmetic processing unit 5. A control signal line 17 extends from the arithmetic processing bag m5 to a control signal terminal for the operation.

The arithmetic processing device 5, the first and second multiplexers 7.10, the touch value memory 13, the sequential LIM memory 14, and the arithmetic command data memory 15 collectively constitute a touch value arithmetic processing means B. are doing.

On the other hand, a tuftless boner A is connected to each output terminal of the decoder 6 (one of which is shown in the figure), and the tuftless boner consists of a key switch 18 that opens and closes in conjunction with the corresponding key. The movable contact 18c is connected to one output terminal of the decoder 6, the break contact 18b is connected to the break bus bar BB, and the make contact 18m is connected to the make bus bar MB.

Then, B and BB are attached to both passers by a large number (not shown).
It is commonly connected to a number of touch responders (the number corresponding to the number of keys), and further extends to the input port 15a of the arithmetic processing unit 5.

Reference numeral 19 denotes a key assigner consisting of a microcomputer, and an output data bus 21 connectable to the input 2 taper 12 is connected to the key assigner 19a.
Furthermore, among the output terminals of the touch value memory 13, from that of the 7th bit, the 7th focus signal line +2
b extends and is connected to the input port.

Key Assigner 18 Selection Address Signal Capo 119
A selection address signal line 2o extends from b and is connected to a second input terminal of a second multiplexer 10.

The key assigner 19 has a key code output boat 19d,
It has an output port 19e for touch value gate signals and an output port 18F for synthesizer module address signals, and these output ports are connected to corresponding input terminals of data processing section 22. Data processing section 2
The output terminal 2 is connected to the input terminal of the musical tone signal generating device 23, and the specific configurations of the data processing section 22 and the musical tone signal generating device 23 are shown in detail in FIG.

In FIG. 3, the data processing device 22 includes a key code digital/analog converter 22a connected to a key code converter 19d, and a key code converter 22a connected to a key code converter 19d.
Analog multiplexer 22b for key voltage connected to
, a key voltage sampling hold circuit 22c connected to the multiplexer 22b, and a touch value.
A touch value digital/analog converter 22e connected to the gate signal output terminal 19e, and a touch voltage analog multiplexer 22f connected to the converter/hatter 22e.
A touch voltage sampling hold circuit 22g connected to the multiplexer 22f, and a gate signal digital multiplexer 22h connected to the gate signal output terminal of the touch value gate signal output terminal 19e.
and a latch circuit 2 connected to the multiplexer 22h.
2i, and multiplexers 22b and 22f.
, 22h, each address signal terminal has a synthesizer module address signal output capo) 19f.
Synthesizer module address signal line 22j from .

Furthermore, the musical tone signal generating device 23 includes a group of synthesizer modules whose number is considerably smaller than the number of keys connected to one set of the key voltage sampling and holding circuit 22c, the touch pressure sampling and holding circuit 22g, and the latch circuit 22i. 23a, and a mixer 23c connected to each musical tone signal output terminal 23b of the module.

These key assigner 19, data processing section 22, and musical tone signal generation device 23 collectively constitute a sound generation means.

Returning to FIG. 2, the seventh bit signal line 5d of the output data bus 11 and the seventh bit signal line 12b of the input data bus 12
are both connected to the input terminal of the exclusive OR circuit 24, and the output terminal of the exclusive OR circuit 24 is connected to the D terminal of the D flip-flop circuit (hereinafter abbreviated as OFF) 25. , Furthermore, the CL terminal of 0FF25 is connected to output terminal 2a for a gate trigger signal that divides the least digit (LSB) output of the divider by 5 and goes to a low level during approximately the third beat of the least digit output. has been done. 0FF2
The Q terminal of 5 is commonly connected to the interrupt signal terminal fNT of the key assigner 19, the input terminal 2b for the operation stop signal of the divider 2, and the input terminal 10a for the switching signal of the multiplexer 10, and is connected to the reset terminal of 0FF25. RES
is connected to the output signal terminal RD for completing reading of the key assigner 19. Exclusive OR circuit 24 and DF
F25 constitutes touch value readout control means C as a whole.

In the above configuration, the clock pulse from the clock pulse generator 1 is frequency-divided by the vertical 11-stage binary circuit included in the divider 2, and the minimum digit is an 11-bit parallel signal that advances in synchronization with the clock pulse. Converted to CO to C10.

By decoding the 7 bits of the upper digit signals 04 to C1O, the decoder 6 sequentially and alternatively outputs "O ” to perform key scanning.

Touch responder A, which has received the key pulse, controls the states of make bus bar MB and break bus bar BH in the time slot that is the duration of the key pulse. That is, when the key corresponding to this touch responder is released (key a state) and the movable contact 18c of the key switch 18 is in contact with the break contact 18b, the make bus bar MB and the break bus bar BB are , "1", "When the OJ state is maintained, the key is pressed (key pressed state), and the movable contact 18c is jumping, -MB to the make bus and break bus bar BB are set to "1", respectively. ", "1", and when the key is pressed all the way (key press completed state) and the movable contact 18C is in contact with the make contact 18, the meter contact 18
, the make bus bar MB and the break bus bar BB are kept in the rQJ and "l" states, respectively.

In this way, both bus bars MB and BB represent the key states (key released state, key pressed state, key pressed completion state) of all keys by time division multiplex communication using the time slot of the key pulse from the decoder 6 as a time reference. The key state signal S1 and key information specifying the assignment of the pressed key to the time slot can be supplied to the arithmetic processing unit 5 via the input port 5a.

The arithmetic processing device 5, which has received the key status signal Sl and the key information, executes arithmetic processing for producing touch value according to the flowchart shown in FIG. 4, and in FIG. Realize the means for realizing each function within.

First, the arithmetic processing unit 5 determines whether or not the key assigned to a certain time slot is in the depressed state based on the key state signal S1 that has arrived at the input key 5a. a) If the determination result is YES (key pressed state), key pressed state information I-1 is output. This processing step (FIG. 4a) realizes a key depression state determining means.

Next, the processing device 5 reads the stored contents of the continuous maintenance period memory 14 (FIG. 4B), and determines whether or not the 0th to 7th bits are all "0" (FIG. 4C). ),
When the determination result is YES, continuous maintenance period end information [8, which will be described later], is output.

At that time, in the continuous maintenance period memory 14 to be read out,
A control signal designating a read operation is supplied from the processing device 5 through the control signal line I7 to enter the read operation state, and at this time, a control signal designating the read operation is supplied from the processing device 5 through the control signal line 8c to the first multiplexer 7. The address signal X supplied to the control signal terminal of the multiplexer 7 is "O", and the multiplexer 7 outputs the signal supplied to the first input terminal, that is, the address signal 04 to the decoder 6.
~C1O is selected and output.

Furthermore, during the time-sharing operation with the key assigner 19, which will be described later, during the basic state period assigned to the touch value calculation processing means B side, the second multiplexer 10 receives the signal supplied to the first input terminal of the multiplexer. , that is, the output signal of the first multiplexer 7, and in other words, the address signals 04 to C to the decoder 6.
IO is selected and supplied to the address signal terminals of each memory 13, 14, and 15 through the address signal line 1G, so reading out the storage contents from the memory 14 described above is performed by distributing the key pulse from the decoder 6 at that point. The process is executed for the address fixedly assigned to the key associated with the touch responder A being supplied, in other words, the key associated with the key status signal St supplied to the arithmetic processing unit 5.

In synchronization with the technology of time division multiplex communication for each key of the key status signal Sl and the assignment of keys to time slots in the time division multiplex communication, the address of the memory is incremented to set each address of the memory. Techniques for assigning keys are already known, for example, as disclosed in Japanese Patent Application Laid-open No. 58-155995.
Disclosed in the issue.

The arithmetic processing in the arithmetic processing unit 5 is executed for six keys, and FIG. 4 is a flowchart for the arithmetic processing for one of the keys.

Therefore, since the above-mentioned determination result (FIG. 4C) is YES, the memory contents of the address assigned to the key that is currently in the pressed state are output (the fourth Figure d).

Next, the arithmetic processing unit 5 sends an address signal X of "1" to the first multiplexer 7 via the output port 5b.
(FIG. 4e), causing the multiplexer to selectively output the signal supplied to the second input terminal.

Then, address signals A4 to A10 are supplied from the output capacitor 5c of the arithmetic processing unit 5 to the address signal terminals of the memories 13, 14, and 15.

In this state, the processing device 5 operates the touch value memory 1
Specify the address represented by the touch value read from 3 (FIG. 4 d) and read out the stored contents of the calculation command data memory 15 (FIG. 4 f), and then return the address signal X to "0". (Fig. 4g), address signal 04
~010 can be supplied to the memory 13, 14, and 15, and the calculation command data I-2 is supplied to the touch value continuation maintaining means, which will be described later.

These arithmetic processing steps (Fig. 4 e-g) realize an arithmetic command data read control means.

Subsequently, the arithmetic processing device 5 stores the arithmetic instruction data memory 15.
The arithmetic command data read out from the key is written to the duration memory 14 by commanding the address assigned to the key being processed (Fig. 4h), and is further written to the touch value constant amount subtraction means described later. After supplying the operation command data I-2, subtract 1 from the memory content of the address assigned to the key being processed in the touch value memory 13 and write it to the same address to update the value to 11. i) Temporarily end the calculation.

During the above processing operation, a control signal is supplied from the arithmetic processing unit 5 to the touch value memory 13 and the continuous sustain period memory 14 through the control signal line 17 in order to control the read operation and write operation of the memory.

The arithmetic processing steps (d, i in FIG. 4) realize touch value constant amount subtraction means.

On the other hand, even if the stored content of the address assigned to the key being processed in the continuation maintenance period memory 14 (represented by 8 bits from the Oth bit to the 7th bit) is (0), it is (255).
If not, the judgment result in C and j of FIG. 4 is NO, and the touch value stored in the address assigned to the key being processed in the touch value memory 13 is continuously maintained at the same value without being updated. From the address assigned to the key being processed in the continuous maintenance period memory 14,
The stored content is read out, 1 is subtracted from it (updated to a -1 value) (Fig. 4k), and the operation is temporarily terminated.

After that, regarding the processing of the key, the key state signal S1 representing the state of the key in the next cycle of key scanning, in other words, the key pulse of the next cycle to the touch responder A linked to the key. Up to the point of supply, a continuous maintenance period in which the touch value does not change progresses, and such arithmetic processing steps (Fig. 4 a-c, j"k
) is implemented repeatedly to realize touch value continuation maintenance means.

Then, as will be described later, when the desired continuous maintenance period specified by the operation command data has elapsed, the storage content of the address assigned to the key being processed in the continuous maintenance period memory 14 is reduced to (0). The judgment result in Figure 4C is YES.
The Tauchi value continuation maintenance means outputs the above-mentioned continuation maintenance period end information 1-8.

Regarding the actual real-time calculation processing in which each of the above-mentioned processes is repeatedly executed multiple times while the key is pressed, the operation of the above embodiment will be explained with reference to FIGS. 5 and 6 and numerical examples. of,
A more specific explanation is as follows.

When the arithmetic processing unit 5 determines the key depression state (FIG. 4a)
, the continuous maintenance period memory 14 is read (FIG. 4b), but at this time, the memory has been previously cleared and is set to (0) (FIG. 5(A) a).

Therefore, the subsequent determination result (FIG. 4C) is YES (FIG. 5(A)b), and then the touch value memory 13 is read (FIG. 4d), but this memory has also been previously cleared. and it becomes (0) (Fig. 5(B)C).

Next, when the calculation command data memory 15 is read using the memory content (0) of the memory 13 as an address (Fig. 4 e-g),
The memory content is "0OO00001" (6th
Figure a, Figure 5 (C) d), write this into the memory 14 (5th IN (A) e), and then update the touch value stored in the memory 13 to 11 value (Figure 4 i
, FIG. 5(B) f).

At that time, the touch value stored in the memory is the O-th
The 6th bit consists of 7 bits (the 7th bit is assigned to the key-on signal);
Since the touch value represented by the ~6th bit is (0) (FIG. 5(B)c), its -1 value is (127).

When processing the key state signal in the second cycle of key scanning, as long as the key is kept in the pressed state, the arithmetic processing unit 5 reads the memory 14 (FIG. 4b);
Since the stored content of the memory is (1) (Fig. 5 (A)
g) The determination result in FIG. 4C becomes NO, and then the determination in FIG.
Slightly updated (Fig. 4k, Fig. 5(A)h).

Therefore, in this cycle of processing, no reading is performed with respect to the calculation command data memory 15 (see Fig. 5).
C:)i).

When processing the key status signal in the third cycle of key scanning, the memory 14 is similarly read (FIG. 4b), but at this time, since the stored content of the memory is (0) (the fifth
(A)j), the arithmetic processing unit 5 reads the memory 13 (Fig. 4d), but at this time, the stored contents of the memory are (1).
27) (Fig. 5(B) k).

Next, when the memory 15 is read using the stored content (12?) of the memory 13 as an address (Fig. 4 e-g), the stored content is r 0OOOOOOOOJ (Fig. 6 b).
, FIG. 5(C) l), This is written to the memory 14 (FIG. 5(A) ffi), and then the touch/heryu stored in the memory 13 is updated to 1 value (FIG. 5(A) ffi).
B)n).

In this way, one fraction Δ1 of the touch value curve (a function curve that defines the relationship between the key jump period and the touch value) consisting of the continuous maintenance period 2T of the key scanning cycle length and the unit decrease amount U is calculated. .

Thereafter, the same process is repeatedly executed, and in the i-th cycle, the stored content of the memory 14 is (0) (FIG. 5 (A) a'), and then when the memory 13 is read, (6
) (FIG. 5(B) b'), and the stored content of the memory 15 at address (6) is r ooo.

0000'' Note (Figure 6 C1 Figure 5 (C)C')
, (0) is written in the memory 14 (Fig. 5(A)
d'), the touch value decreases from (6) to (5) (Fig. 5(B) e').

In the continuation<(t+1)th cycle, the stored content of the memory 14 is (0) (FIG. 5 (A) f'), so when the memory 13 is read, it is (5) (FIG. 5 CB )g'
), Furthermore, since the stored content of the memory 15 at address (5) is r 00000001J (Fig. 6d).

After (1) is written in the memory 14 (FIG. 5 (A) i'), the touch value becomes (5).
to (4) (Fig. 5 (B) j').

In this way, one of the two parts Δk of the touch value curve consisting of the continuous maintenance period IT of one cycle length of key scanning and the unit decrease amount U is calculated.

In the following (i+2)th cycle, since the stored content of the memory 14 is (1) (Fig. 5 (A) k'), 1 is then subtracted from the stored content of the memory 14 (Fig. 5 (A) k').
A) D) Wait for two cycles to pass without updating the touch value.

In the following (i+3)th cycle, the stored content of the memory 14 is (0) (Fig. 5(A)+*'), so when the memory 13 is then read, it is (4) (Fig. 5(A)+*'). B)n
'), Furthermore, the memory contents of the memory 15 at the address (4) are "00000010" (Fig. 6 e, 5
(C) O'), after (2) is written to the memory 14 (Fig. 5 (A) p'), the touch value decreases from (4) to (3) (Fig. 5 CB) q').

Thus, as described above, +1 is added to both parts of the continuous maintenance period 2T.
is calculated.

In the following (i+4)th cycle, since the storage content of the memory 14 is (2) (FIG. 5(A) r'), 1 is then subtracted from the storage content of the memory 14 (FIG. 5(A)).
)S'), and then waits for 3 cycles until the memory content of the memory 14 becomes (0), and in the (i+6)th cycle, the touch value decreases from (3) to (2) ( Figure 5 (B) t').

In this way, +2 is calculated for one two parts Δ consisting of the continuous maintenance period 3T having a length of 3 cycles and the unit decrease amount U.

Because of such arithmetic processing, by setting and storing an appropriate arithmetic command data group in advance at each address of the arithmetic command data memory 5, both parts of each cycle length can be arranged in various ways, and the key can be kept in the depressed state. During the transition period, it is possible to calculate the desired touch value curve using real-time processing,
If the calculation of the touch value curve is stopped at the point (cycle) when the key being processed is pressed completely and the key press is completed, and the touch value stored in the touch value memory 3 is read at that point, The touch value is obtained by converting the period during which the key remains depressed in accordance with the desired touch value curve.

By the way, in the above calculation flow, if the key is pressed extremely gently and the key press state continues for a long time, the touch value memory 3 is updated to a -1 value (Fig. 4 i, Fig. 5 (B) When the number of times (e', j', ', t') increases and the touch value finally reaches (0), in the next cycle, the touch value represented by 7 bits of binary number goes around and becomes 127. Therefore, there is an inconvenience that the touch value fluctuates cyclically thereafter.

In order to avoid such inconveniences, the lowest touch value corresponding to extremely slow key presses is determined in advance, and the value of the lowest touch value plus 1 is stored in the memory 15. Write (255) in the address.

If such a minimum touch value is determined to be (2), for example, and (255) is written to address 3 of the memory 15 (FIG. 6 f), the operation that follows the above operation example will be explained. It is as follows.

In the following (i+s)th cycle, the stored content of the memory 15 is (0) (FIG. 5(A) U'), so when the memory 13 is then read, it is (3) (FIG. 5(B)). )v
'), and since "11111111" is written as the memory content of the memory 15 at address (3) (6th
Figure f, Figure 5 (C)), in the memory 14 (255)
is written (FIG. 5(A)!'), the touch value (3) decreases to (2) (FIG. 5(B) t').

At that time, (255) is temporarily stored in the memory 14, so from then on, the determination result in FIG. 4C is always NOl, and
The determination result in FIG. 4j is always YES.

Therefore, the stored contents of the memory 13 will not be updated to 1 value by proceeding to the steps after d in FIG. 4, and the stored contents of the memory 14 will not be updated to 1 value by proceeding to the steps shown in FIG. The arithmetic processing unit 5 is not updated, and therefore the arithmetic processing unit 5 is
Steps c and j will be repeated, and during that time,
The touch value is maintained at the lowest value (2).

Returning to FIG. 4 again, refer also to the time chart in FIG. 7 to see the effects in the case where the key is pressed all the way to the key press completion state and when the key is released and the key release state is reached. A brief explanation is as follows.

In the unimplemented example, when processing a key state signal in each cycle, the time (key time) allocated to one processing of one key state signal is determined by the clock signal output from the least significant digit (LSB) of the divider 2. 5 beats P1 to P5 (FIG. 7(a)), and the arithmetic processing unit 5 can access any of the memories 13 to 15 during 6 beats in this key time.

Now, when the key press is completed, the movable contact 18c contacts the meter contact 18m, so a key status signal Sl representing the key press complete status is supplied to the input port 5a, and the processing unit 5 responds to the key status signal S1. Then, a gate flag indicating the key press completion state is set at the seventh bead/ ). When the gate flag indicating the key press completion state is set, the output data path 1
1 appears on the 7th bit signal line 5d of 1 (see Fig. 7).
F)) is supplied to the exclusive OR circuit 24 as one input signal thereof.

However, at this point, touch value memory 1
From 3 onwards, the gate flag (state of the 7th bit) from the previous cycle stored here has not yet been read out, so this is sent to the exclusive OR circuit 24 as another input signal. It will never be supplied.

Not only that, at this point, the arithmetic processing unit 5
is not at the timing (beat) to execute read access to the touch value memory 13, so the 0FF 25 following the exclusive OR circuit 24 is kept inactive, and the OR circuit 24 has no meaning. cannot provide an accurate output signal.

As will be described in detail later, this exclusive OR circuit 24 allows the subsequent DFF 25 to receive a gate trigger signal at its CL terminal at the third beat when the arithmetic processing unit 5 accesses the touch value memory 13. It operates meaningfully only when the gate flag is activated, and the difference in the state of the re-input signal (rl4 ro or "OJ rl"), that is, the difference between the state of the gate flag in this cycle and that in the previous cycle. In other words, a newly generated key press completion state (or a newly generated key release state) is detected and "1" is output. And its function is l in Figure 4.
, m, n, u, v, 0. For example, when a new key press occurs, the arithmetic processing unit 5 responds to the key state signal St to determine whether the key is in the pressed state or not. When this determination is made (FIG. 4a), the key is fully pressed and the determination result is NO, so it is then determined whether or not the key depression is completed (FIG. 41). Since the result of this determination is YES, the arithmetic processing unit 5 (
No processing operation is performed at the first beat P1 and second beat P2 of the second hour, and a readout operation is commanded through the control signal line 17 at the third beat P3.

In accordance with the designation of address signals 04 to Cl0 (FIG. 7(B)) already supplied to the address signal line 16, the touch value (first cycle) of the key related to the key status signal S1 is stored from the touch value memory 13. Read out the gate flag (7th bit) (0 to 6th bit) (4th bit)
Figure m and Figure 7(D)). Next, it is determined whether or not the 7th bit is "1" (Fig. 4 n), and if it is "0" in the previous cycle, the determination result is NO.
Then, key scanning is stopped (FIG. 4, 0), and an interrupt signal is issued to the key assigner 19 to start the assignment process (FIG. 4, p).

9B I, 1 Detect the gate flag "1" in the inter-machine cycle and set the determination result in Fig. 4 1 as YES.Furthermore, detect the gate flag "O" in the preceding cycle as shown in Fig. 4. By setting the determination result of n to NO, it is possible to detect a newly generated key press completion state. and,
Even if the key time for that key starts again after the key press has already been completed, when the touch value memory 13 is read in the process step m of FIG. 4, the gate flag set in the previous cycle is "1" is the 7th bit signal 11
2d, the output of the exclusive OR circuit 24 cannot shift to a high level. In other words, the determination result of the processing step (n in FIG. 4) realized by the exclusive OR circuit 24 is YES. Therefore, the arithmetic processing device 5 does not interrupt touch value calculation.

Here, I would like to add that the first beat P1 in one hour is
For example, the second beat P2 is assigned to the time slot for accessing the memory 14 (FIG. 4b) in the arithmetic processing process for calculating the touch value, and the second beat P2 is assigned to the time slot for accessing the memory 14 in the key release state processing (described later). Figure t, Figure 7 (
C)) and,
The fourth beat P4 is assigned to a time slot for writing access to the memory 13 (FIG. 7(j)).

Now, when the touch value data including the gate flag (seventh bit) in the previous cycle is read from the touch value memory 13, at the third beat P3 of the key time, the seventh bit line 12b of the input data bus 12 is read out. Since rOJ appears (FIG. 7(E)), at this point, the re-input terminal of the exclusive OR circuit 24 receives "1" through the seventh bit signal line 5d of the output data bus 11. "O" through the seventh bit signal line 12b of the input data bus 12 is applied simultaneously. In other words, it is determined whether the gate flag (seventh bit) in the preceding cycle, which is read from the touch value memory 13 at the time of the third beat P3 in the key time, is "1" (the fourth bit). n), the result of this determination is NO, so the exclusive OR circuit 24 supplies rlJ to the terminal of OFF 25.

Subsequently, at the leading edge of the rising edge of the third beat P3 between the keys, the voltage at the gate trigger signal output terminal 2a of the divider 2 shifts to a low level (FIG. 7(G)), which corresponds to the third beat P3.
When returning to high level at the trailing edge of 3, the gate trigger signal rises again and activates llFF25 mC.
If the input signal to the D terminal is "1", it can be latched).This makes the exclusive OR circuit 24
The output of is latched to the OFF 25 (Fig. 7 (H)
), as a result, the voltage at the Q terminal of the DFF 25 shifts to a high level, and the deactivation signal S2 and the switching signal S'2 are supplied to the divider 2 and the multiplexer IO, respectively.

Then, in response to this, the divider 2 stops its function and interrupts the key scanning (FIG. 4 O), while the multiplexer 10 connects the selected address signal line 20 to the address signal line IB. .

From the Q terminal of OFF 25, the key assigner 1
9 is supplied with an interrupt signal S3 (FIG. 4 p and FIG. 7 (
H)) In response, the key assigner-19
starts reading the touch value. That is, the key assigner 19 sequentially increments the selected address signal 84.
~B12 is output, and each address of the touch value memory 13 is scanned. Touch value data whose address is specified by the address signals 84 to B12 and read from the touch value memory 13 is read into the key assigner 19 through the input data bus 12, the internal bus of the arithmetic processing unit 5, and the output data bus 21. . Key Assigner-19.

It is determined whether or not the seventh bit is rlJ, and while the determination result is NO, the readout scan of the touch value data from the touch value memory 13 is increased to the maximum while advancing the address signals 84 to B12. Execute one entry for all addresses (Fig. 4g).

When the key assigner 19 determines the touch value data in which the seventh bit is "1", the key assigner 19 stores the data, that is, the touch value and gate flag of the key that has reached the key press completion state, and further stores these data. The address (corresponding to the pitch) that was previously stored is stored in the internal memory, and the voltage of the read end signal terminal RD is shifted to a low level (FIG. 7 (■)). In response to this, the OFF 25 is reset, the voltage at its Q terminal shifts to low level again, the interrupt to the key assigner 19 is released (Fig. 7 (H)), and the divider 2 is switched to its Q terminal. restore function,
Multiplexer 10 restores the connection between address signal lines 9 and 16.

Along with the restart of the function of the divider 2 (Fig. 4r), the arithmetic processing unit 5 also restarts its function and commands the write operation to the memory 13 through the control signal line 17 at the fourth beat P4 of the time period ( 7(J)), as a result, "1" of the gate flag appearing in the seventh bit (m5d) of the output data bus 11 is changed to the address signals 04 to C10 of the memory 13.
is written to the address specified by , and the seventh
"1" is stored in the bit (FIG. 4S).

On the other hand, after the interrupt is released, the key assigner 18 gives a command to the data processing device 22 based on the information taken into the internal memory to cause the musical tone signal generating device 23 to generate a musical tone signal.

That is, the address of the touch value memory 13 from which the touch value data (the gate flag is set to rlJ) taken into the internal memory of the key assigner 19 was read out, in other words, the key represented by the selected address signal that specified it. A code (representing the pitch of the key) is formed, which is supplied to the key code digital-to-analog converter 22a and converted into an analog quantity of key voltage corresponding to the key code representing a specific key, and is converted to an analog quantity of key voltage corresponding to the key code representing a specific key. 22b.

At the same time, the touch value related to the specific key represented by the key code is supplied from the touch value gate signal output capo 19e to the touch value digital gold analog compactor 22e, and the analog amount of touch corresponding to the touch value is supplied to the touch value digital gold analog compactor 22e. The voltage is converted into a voltage and supplied to the touch voltage analog multiplexer 22f.

In addition, touch value gate signal output capo) 1
A gate signal representing the state of the gate flag outputted from 9e is also supplied to the digital multiplexer 22h at the same time.

At this time, as a result of the assignment calculation process based on the synthesizer module assignment logic by the key assigner 19, the synthesizer module to be generated is specified, and the synthesizer module address signal for specifying the module is sent to the output port tsr for the synthesizer module address signal. from the multiplexer 22b, 22
f, 22h, and each of the multiplexers distributes and supplies the input key voltage, touch, voltage, and gate signal to a specific output terminal specified by the synthesizer module address signal.

In this way, each of the key voltages, touch voltages, and gate signals distributed and supplied to specific output terminals is used for key voltages arranged corresponding to the specific synthesizer module 23a specified by the synthesizer module address signal. It is once stored in each of the sampling and holding circuit 22c, the touch voltage sampling and holding circuit 22g, and the latch circuit 22i, and is continuously supplied to the specific synthesizer module 23a.

The specific synthesizer module 23a generates a musical tone signal having a pitch specified by the continuously supplied key voltage and an energization pattern specified by the touch voltage during the period when the gate signal is supplied. Signal output terminal 23
Output from b.

When a large number of keys are pressed at the same time, a large number of musical tone signals are simultaneously supplied to the mixer 23c from the musical tone signal output terminals of a large number of synthesizer modules within the range of the number of synthesizer modules disposed. A musical tone signal to be generated is obtained by mixing by a mixer.

Thus, by changing the amplitude of the musical tone signal obtained from the musical tone signal generating device 23 according to the touch voltage which has a specific functional relationship with the key pressing speed, the volume of the musical tone can be adjusted according to the pressing speed of the key. be.

Next, the operation when the player's finger leaves the key and the key is released will be described below with reference to FIGS. 2, 4, and 7.

In this case, since the key state signal S1 indicates the key release state, the arithmetic processing unit 5 returns the gate flag to "O",
In both processing steps a and l of FIG. 4, NO is determined. Then, due to the state change of the gate flag in the arithmetic processing unit 5, the seventh bit signal line 5d of the output data bus 11 becomes rQJ (FIG. 7(F)), but at this point, the data to the touch value memory 13 is Since the access has not yet been performed, exclusive OR circuit 24 cannot provide a meaningful output.

However, at the second beat P2 of the key hour, the arithmetic processing unit 5 instructs the memory 14 to write through the control signal line 17, and writes "O" to the address corresponding to the key that has been released. Writing (Figure 4E, Figure 7(C))
, prepare for processing when that key is pressed again.

Subsequently, at the third beat P3 of the key hour, a reading operation is commanded to the memory 13 through the control signal line 17 at the leading edge of the third beat P3, and the key specified by the address signals 04 to CIO is read out. , the touch value data is read from the address corresponding to the key that is in the released state (fourth step).
Figure U, Figure 7(D)). Then, as already explained, in the processing step of FIG. Therefore, the 7th bit signal line 1 of the input data bus 12
2b, the state of the gate flag that is meaningfully output at the third beat 23 is rlJ. Therefore, at this third beat, the gate flag rQJ of the current cycle and the gate flag "1" of the previous cycle are respectively applied to the re-input terminal of the exclusive OR circuit 24, so that the exclusive logic The determination result shown in FIG. 4 V by the sum circuit 24 is NO, and it is triggered by the gate trigger signal (FIG. 7 (G)) that falls at the leading edge of the third beat P3, and the DFF 25 is set, and its Q Terminal goes to high level.

As a result, an interrupt occurs in the key assigner 19, and processing steps θ' to r' corresponding to processing steps 0 to r are executed, and during this time, the gate flag "O" is read into the key assigner 19. In this way, in response to the read gate flag rQJ, the key assigner 19 eliminates the gate signal that was being supplied to the digital multiplexer 22h from the touch value ψ gate signal output port 19e, thereby causing the synthesizer module 2
The musical tone signal that was being output from step 3a is stopped.

In the meantime, the operation of divider 2 is resumed (4th VgJ
Further, at the fourth beat 24 of the key hour, the arithmetic processing unit 5 instructs the memory 13 to write through the control signal line 17, and writes the key specified by the address signals c4 to C16, i.e. , the touch value data of the address corresponding to the released key is rewritten to "0" (FIG. 4W, FIG. 7 (J)), in preparation for processing when the key is pressed again.

Even if the key time for that key starts again after the key has already been released, rQJ appears on the seventh bit signal line 12d after the processing step of FIG. Since the output of the OR circuit 24 cannot shift to a high level, in other words, the determination result of the processing step (V in FIG. 4) realized by the exclusive OR circuit 24 is YES, the arithmetic processing unit 5 rewrites the touch value data at the corresponding address in the memory 13 to rQJ at the 4th beat 24 without stopping the process (in this case, this address has already been rewritten to "0", so this process is special) has no meaning).

Next, with reference to FIG. 8, another example of the touch value calculation processing means realized by the calculation processing unit 5 as a machine part implementation means will be extracted and explained as a second example as follows. It is.

First, the arithmetic processing unit 5 determines the key press state as in the previous embodiment (FIG. 8a), outputs the key press state information 1-1, and realizes a key press state determination means. .

Next, the arithmetic processing unit 5 specifies the address allocated to the key being processed, reads out the storage contents of the continuous maintenance period memory 14 (FIG. 8b), and reads the 0th bit to the 6th bit.
It is determined whether or not the bit is "O" (FIG. 8C), and when the determination result is YES, continuous maintenance period end information 1'-8 is output.

Subsequently, the processing device reads the touch value memory 13.
The address of the key is read out (from d in FIG. 8, similarly to FIG. 4 e-g, the calculation processing data I'-2 is read out by the process that implements the calculation command data read control means. -g) Of the 8 bits composing the data, the 7th bit assigned to the continuation maintenance flag is “1”.
” (FIG. 8h). This processing step (FIG. 8h) realizes calculation command data discriminating means.

If the determination result (h in FIG. 8) is NO, update setting command information ■'-3 is output and the read calculation command data is assigned to the corresponding key in the touch value memory 13. (Fig. 8 i)
, the touch value is updated to the calculation command data I'-2, and the next key scanning cycle is waited.

The above processing steps (FIG. 8 d, f) realize the Tachi value update setting means.

On the other hand, when the above judgment result (Fig. 8h) is YES, the continuation maintenance command information function '-4 is output and the read operation command data is stored in the corresponding key of the continuation maintenance period memory 14. The assigned address is memorized as shown in FIG. 8N. Wait for next key scan cycle.

Then, until the stored content of the memory 14 becomes (0), the determination result in FIG. 8C becomes NO, and the processing device 5
Furthermore, it is determined whether or not the seventh bit of the memory content is "1" (Fig. 8k), but as a result of the processing in Fig. 8, the judgment result in Fig. 8C becomes NO. Therefore, on the first bus, the above discrimination result (Fig. 8k)
becomes YES, and the processing device selects the seventh one which is “1”.
While returning the bit to "O", 1 is subtracted from the memory content assigned to the key in the memory 14, updated and stored at the same address (Fig. 8q), and the quantitative subtraction command information I
'-5 is output.

Then, the processing device stores the touch value memory 13.
Read the stored content from the address assigned to the key (Fig. 8 r), subtract 1 from it, and store it at the same address (Fig. 8 S), and subtract touch value information 1.
'-7 and wait for the next key scan cycle.

From the next cycle onward, the seventh bit of the memory content of the continuous maintenance period memory 14 has already been returned to "0" (Fig. 8q), so the judgment result in Fig. 7 becomes NO, and the memory content is 1 from the memory contents of the memory I4 until it reaches (0).
When the process of subtracting (t in Figure 8) is repeated every key scanning cycle and the stored content becomes (0),
The determination result in FIG. 8C is NO, and the above-mentioned continuous maintenance period end information ■'-6 is output.

Then, the aforementioned processing steps (Fig. 8, c, j, and q)
, t), the touch value continuation maintaining means is realized, and further, the above processing steps (r, s in FIG. 8),
A touch value constant amount subtraction means is realized.

In addition, steps l-s, t, u, v, 0 to r' in FIG.
, W are the same as the processing steps indicated by the same reference numerals in FIG.

Therefore, the difference between the embodiment shown in FIG. 4 and the other embodiment shown in FIG.
5 accesses 5 times in other embodiments, it is sufficient to access 4 times in other embodiments, and as a result, the number of beats per hour for each key is 5 beats in one embodiment, whereas in other embodiments In the embodiment, four beats are sufficient.

Furthermore, FIG. 9 shows a modification of the configuration for reading out the calculated touch value data and the address of the touch value memory 13 where the touch value data is stored, that is, the key code, toward the key assigner 19. An example is shown and the third multiplexer 3
Address signal lines 4 from the divider 2 for the 4th to 10th digits are branched and connected to the first input terminal of the multiplexer 30, while the second input terminal of the multiplexer 30 is connected to the arithmetic processing unit. An output data bus 11 extending from 5 to a touch value memory 13 and a continuous sustain period memory 14 is branched midway and connected.

Furthermore, the output terminal of this multiplexer 30 is:

It is connected to the input port 19a of the key assigner 18 through another output data bus 21.

and the switching control signal quantity capo of the key assigner 19).
A switching M control signal &119h extends from 19g and is connected to the switching control terminal of the multiplexer 30.

The other constituent elements are the same as those indicated by the same reference numerals in FIG.

When reading touch value data to the key 7 siner 19, a new transition to a key pressed state or a key released state is detected, and the flip-flop 25 is set to "1", thereby causing an interrupt Signal S3 is key assigner 1
9, in response, the key assigner sends a switching control signal to the switching control terminal of the third multiplexer 30 via a switching control signal 119h via a switching control signal (capo) 9g. providing a signal St to cause the multiplexer to select an input signal from a first input terminal;
This allows the input port 19 to be connected to the input port 19 via the output data bus 21.
From a, read the output signal of the divider 2, that is, the address signals 04 to CL(l) at this point. During this time,
Since the divider 2 which receives the operation stop signal S2 from the flip-flop 25 set to 1" at its operation stop signal input terminal 2b is in a stopped state from that point on, the address signal at this point is 04 to C10 are nothing but key codes representing keys related to the detection of a key press or a new transition to a key release.

After reading this key code, the key assigner 19 then eliminates the switching control signal St and controls the third key code.
The multiplexer 30 selects the input signal from the second input terminal, thereby reading the calculated touch value data related to the read key code from the arithmetic processing device 5 via the output data bus 21.

Effects> As described above, according to the present invention, calculation command data is calculated in real-time processing during the period in which the key is pressed, that is, the period in which the key jumps, without once measuring the period. By configuring the touch value according to the touch value curve that is changeably defined based on the arrangement to be directly calculable, unlike the conventional technology, once the period of the key press state is timed, it can be further adjusted to the desired touch. Since there is no need for post-processing for conversion into touch values that follow a value curve, an excellent effect is achieved in that the configuration is thoroughly simplified.

Further, according to the present invention, the key scan causes a new transition of the key to the key press completion state, or 1aW! ! When a new transition to the state is detected, key scanning and touch value calculation processing are interrupted, and the touch value data including the gate flag related to the key is read from the touch value calculation processing means to the sound generation means. By providing a touch value readout control means that restarts key scanning and touch value calculation processing after completion of reading, unlike the conventional device, the calculation processing in the touch value calculation processing means and the sound generation means can be performed. The timing at which the touch value data is read from the arithmetic processing means to the sound generation means so that the allocation processing in the sound generation means is not performed on a regular time-sharing basis regardless of the key state, and the sound generation processing means performs the allocation processing. Since it is sufficient to interrupt the arithmetic processing in the touch value calculation processing means and the key scanning in the touch responder, it is possible to omit wasteful reading operations by the sound generation means, and to that extent, the number of key presses is reduced. The excellent effect of shortening the response time from the time to the sound production is achieved.

In addition, the period during which the sound generation means is constrained is reduced by the operation of reading touch value data from the touch value calculation processing means, so the amount of work that can be loaded on the sound generation means is increased. There are also advantages.

Furthermore, since it is no longer necessary for the touch value calculation processing means and the sound generation means to operate in a complementary manner, the microcomputers that can be adopted to realize both means are not limited to those of the complementary drive type, and there is greater freedom in design. There is also the advantage that it increases.

[Brief explanation of drawings]

1 to 7 relate to the first embodiment of this invention, and FIG. 1 is a functional block diagram (claim correspondence diagram);
2 and 3 are block diagrams showing the hardware configuration, FIG. 4 is a flowchart of a program executed by the arithmetic processing unit 115 and a program functionally equivalent to the touch value readout control means, and FIG. Figure 5 is a digital waveform diagram of the main part, Figure 6 is the calculation command data memory 15.
FIG. 7 is a time chart of the arithmetic processing unit 5. FIG. 8 relates to a second embodiment of this invention,
This is a flowchart of a program executed by the arithmetic processing unit 5. FIG. 9 is a two-dimensional diagram showing a modification of the configuration for reading touch value data to a key assigner in the first and second embodiments of the present invention. A...Touch responder B...
......Touch value calculation processing means C...
......Touch value reading control means D......Sounding means 13...Flag information storage means (touch value memory) 24......Key press completion state detection circuit (
Exclusive OR circuit) 25......Control signal generation circuit (D flip-flop circuit) Sl......Key status signal S2...
...... Tall value calculation stop signal (operation stop signal) S3 ...... Touch value read command signal (interrupt signal) Patent applicant Roland Corporation Fig. 5

Claims (2)

[Claims] (1) A touch that detects the release state, key press state, and key press completion state of each key by key scanning, and outputs key information specifying the pressed key and a key state signal S1 representing each of the above states. Responder A and, in response to the key state signal S1, a touch that indicates the sound volume corresponding to the key pressing speed of the key in real-time processing during the period when the pressed key is transitioning to the pressed state. touch value calculation processing means B that executes touch value calculation processing to calculate the value and stores the touch value of the calculation result;
A sound generating means C that produces sound at a volume corresponding to the touch value, and interrupts key scanning and touch value calculation processing when detecting a new transition to a key press completion state or a new transition to a key release state. At the same time, a touch value readout control means D reads the touch value related to the key from the touch value calculation processing means B to the sound generation means C, and restarts key scanning and touch value calculation processing after the reading is completed. Including touch control device. (2) The touch value calculation processing means B is capable of generating flag information indicating whether or not the key press is completed, and has a flag information storage means 13 for storing the flag information, and the touch value The read control means D is
A key press completion state detection circuit outputs the exclusive OR of new flag information and flag information already stored in the flag information storage means 13, and a touch is performed in response to an output from the key press completion state detection circuit. The touch control device according to claim 1, further comprising a control signal generation circuit that outputs a value calculation stop signal S2 and a touch value read command signal S3.