JPS6246996A - Production of thin film of single crystal having large area - Google Patents
Production of thin film of single crystal having large areaInfo
- Publication number
- JPS6246996A JPS6246996A JP18482685A JP18482685A JPS6246996A JP S6246996 A JPS6246996 A JP S6246996A JP 18482685 A JP18482685 A JP 18482685A JP 18482685 A JP18482685 A JP 18482685A JP S6246996 A JPS6246996 A JP S6246996A
- Authority
- JP
- Japan
- Prior art keywords
- silicon
- single crystal
- thin film
- silicon single
- wafers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
この発明は、ファクシミリ装置等に使用される密着型イ
メージセンサや薄膜型感熱ヘッド、駆動回路節に禾11
用盗れA士面渚蒲Hσ凰鈷晶つアハの製)告方法に関す
る。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application This invention is applicable to contact type image sensors, thin film type thermal heads, and drive circuits used in facsimile machines, etc.
Concerning the method of reporting the theft of Ashimen Nagisafu Hσ凰鈷書TSAha.
従来の技術
シリコン単結晶を用いた密着型イメージセンサとしては
、列えばNational Technical Re
port。Conventional technology As a contact type image sensor using silicon single crystal, National Technical Re
port.
VOl、31 、A2 、Apr、1985.pp1
了9−188に「バイポーラIC密着型イメージセンサ
」と題する記事に紹介されている。このイメージセンサ
は、ICプロセスで作製した7リコンウエ・・から28
X1.7−のチップを切断し、これらのチップ8個をア
ルミナ基板上に直線状に配列し、エポキシ系接着剤によ
り固定したものである。これによシ接続誤差を10μm
以下に抑えることができるとされている。また、ICC
ウニ・からチップを切り出す際に、チップ端に位置して
いるホトセンサの性能を低下させないように、受光窓間
の分離層を切断している。VOl, 31, A2, April, 1985. pp1
It was introduced in an article titled ``Bipolar IC contact type image sensor'' in Ryo 9-188. This image sensor is made from 7 silicones fabricated using an IC process.
Chips of X1.7- were cut, eight of these chips were arranged linearly on an alumina substrate, and fixed with an epoxy adhesive. This reduces the connection error by 10μm.
It is believed that it can be kept below. Also, ICC
When cutting chips from sea urchin, the separation layer between the light-receiving windows is cut so as not to degrade the performance of the photosensor located at the edge of the chip.
このような密着型イメージセンサは、CdS密着型セン
サや非晶質シリコン密着型センサと比べた場合、高速読
み取りが可能であること、および直線状に配列されたホ
トセンサを走査するための回路をチップ上に搭載できる
利点を有している。When compared to CdS contact sensors and amorphous silicon contact sensors, such contact image sensors are capable of high-speed reading and are equipped with a circuit for scanning linearly arranged photosensors on a chip. It has the advantage of being able to be mounted on top.
発明が解決しようとする問題点
しかしながら、シリコンICチップを直線状に配列して
密着型イメージセンサを作製する場合、接続箇所の像を
正確に読み取り、また読み取り誤差を小さくするために
は、チップの切断、接続。Problems to be Solved by the Invention However, when manufacturing a contact image sensor by arranging silicon IC chips in a straight line, it is necessary to accurately read the image of the connection point and to reduce reading errors. Disconnect, connect.
固定に極度の精度が要求され、高価なものになってしま
う問題がある。There is a problem in that it requires extreme precision for fixing, making it expensive.
このような問題は、長尺のシリコン単結晶ウェハがない
ために生ずることは明らかである。長尺のシリコンウェ
ハを、引き上げた円柱状シリコンバルクから切り出すこ
とも最近では可能になりつつあるが、このように叫て得
られるシリコンウェハは、さらに高価なものになってし
まう。It is clear that such problems arise because there are no long silicon single crystal wafers. Recently, it has become possible to cut long silicon wafers from pulled cylindrical silicon bulk, but the silicon wafers obtained in this way become even more expensive.
そこでこの発明の目的は、大面積の、シリコン単結晶薄
膜を容易に得ることができる改良されたウェハ製造方法
を提供することにある。SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide an improved wafer manufacturing method that can easily produce a large-area single-crystalline silicon thin film.
問題点を解決するための手段
この発明によるウェハ製造方法は、複数個のシリコン単
結晶ウェハを直線状に配列し、ウェハ端面を相互に接触
させ、高温下において端面に圧力を加えることにより対
向する端面を融着させ、このようにして接合されたウェ
ハ面上に気相成長法にシリコンをエピタキシャル成長さ
せる工程を含む。Means for Solving the Problems The wafer manufacturing method according to the present invention involves arranging a plurality of silicon single crystal wafers in a straight line, bringing the wafer end faces into contact with each other, and applying pressure to the end faces under high temperature to face each other. The method includes a step of fusing the end faces and epitaxially growing silicon on the bonded wafer surfaces by vapor phase growth.
作用
熱圧着されたウェハ端面の接合部は、シリコンをエピタ
キシャル成長させる過程で消滅し、結晶境界面を有さな
い大面積単結晶薄膜が得られる。The bonded portions of the wafer edges bonded by thermocompression disappear during the epitaxial growth process of silicon, resulting in a large-area single-crystal thin film having no crystal boundaries.
実施列
この発明の一実施例を第1図を参照して説明する。符号
1は、(001)面を有する長さ2cWI、幅1cM、
厚さ100μmのシリコン単結晶ウェハを示している。Embodiment An embodiment of the present invention will be described with reference to FIG. Code 1 has a (001) plane, length 2cWI, width 1cM,
A silicon single crystal wafer with a thickness of 100 μm is shown.
このような単結晶ウェハ1の(110)端面相互を水素
雰囲気中において温度1oOo′Cで熱圧着し、接合部
2を有する直線状に配列されたウェハの基板を得る。こ
のようなウェハ基板の表面に、シランガスを使用した低
圧気相成長法によシ、厚さ20μmのシリコンのエピタ
キシャル層3を形成する。このエピタキシャル層3の成
長の過程で、第2図に拡大して示すように、結晶の不連
続部(接合部)が埋め込まれて消滅し、大面積の単結晶
薄膜が得られる。このようなエピタキシャル結晶成長の
過程で、結晶表面の溝や異物が埋め込まれて連続した単
結晶表面が得られることは、例えばJ、ムppl 、P
hy!! 、 、 55 (10)。The (110) end faces of such a single crystal wafer 1 are bonded together by thermocompression at a temperature of 100o'C in a hydrogen atmosphere to obtain a substrate of linearly arranged wafers having bonded portions 2. On the surface of such a wafer substrate, a silicon epitaxial layer 3 having a thickness of 20 μm is formed by low pressure vapor phase growth using silane gas. In the process of growing the epitaxial layer 3, as shown in an enlarged view in FIG. 2, crystal discontinuities (junctions) are buried and disappear, resulting in a large-area single-crystal thin film. In the process of such epitaxial crystal growth, grooves and foreign matter on the crystal surface are buried and a continuous single crystal surface is obtained, for example, J, Mppl, P
hy! ! , , 55 (10).
15 May 1984.pp 3868−3870
において明らかにされている。15 May 1984. pp 3868-3870
It has been clarified in
次に、複数のシリコン単結晶ウェハを直線状に配列して
接合する方法について説明する。第3図は、このための
治具で、シリコンウェノ・を垂直に積み重ねて収納する
カーボン製の収納箱4と、積み重ねられたシリコンウェ
ハ・端面に一軸性の圧力を加えるためのカーボン製スラ
イダ6およびカーボン製の錘eとからなる。収納箱4内
に数枚のシリコンウェハ1を垂直に積み重ね、その上か
らスライダ6および錘6によシ圧力を加えて縦型電気炉
中に置き、水素ガス雰囲気で1000°Cまで温度を上
昇させる。収納箱4内で一軸性の圧力を加多ちれたシリ
コンウェハ1の端面ば、第4図に拡大して示すように、
その凹凸により接触部に極めて大きな圧力が加わるため
、両端面の接触部は1000’Cにおいても融解し、接
触面積が拡大して互に融着する。Next, a method for linearly arranging and bonding a plurality of silicon single crystal wafers will be described. Figure 3 shows a jig for this purpose, including a carbon storage box 4 for vertically stacking and storing silicon wafers, and a carbon slider for applying uniaxial pressure to the end faces of the stacked silicon wafers. 6 and a weight e made of carbon. Several silicon wafers 1 are stacked vertically in a storage box 4, pressure is applied from the slider 6 and weight 6 on top of the wafers, and the wafers are placed in a vertical electric furnace and the temperature is raised to 1000°C in a hydrogen gas atmosphere. let As shown in an enlarged view in FIG. 4, the end surface of the silicon wafer 1 subjected to uniaxial pressure in the storage box 4
Since extremely large pressure is applied to the contact portion due to the unevenness, the contact portions on both end faces melt even at 1000'C, the contact area expands, and they are fused together.
第5図には、端面接合方法の他の列が示されている。互
に接合されるべきシリコンウェノ・1の端面には、60
0°Cから1ooo℃程度の高温でシリコンと合金化す
る金属、例えば金、インジウム。Another series of end face bonding methods is shown in FIG. On the end surfaces of the silicone wafers 1 to be joined to each other, 60
Metals that alloy with silicon at high temperatures of about 0°C to 100°C, such as gold and indium.
錫などによる被膜7が、予め蒸着等により形成されてい
る。このようなシリコンウニ/S1を上記したような方
法で熱圧着すると、互に対向するシリコンウェハ1の端
面が金属被膜7と合金化して接合される。この場合、合
金化温度をシリコンの融点よりも低く設定すれば、前記
した接合方法よシも低い温度や圧力でシリコンウェハ・
1どうしの融着が可能になる。A coating 7 made of tin or the like is formed in advance by vapor deposition or the like. When such a silicon sea urchin/S1 is thermocompression bonded by the method described above, the end surfaces of the silicon wafers 1 facing each other are alloyed with the metal coating 7 and bonded. In this case, if the alloying temperature is set lower than the melting point of silicon, silicon wafers can be bonded at lower temperatures and pressures than the bonding method described above.
1 can be fused together.
発明の効果
以上のように、この発明によるウニノー製造方法は、複
数個のシリコン単結晶ウェハの互に対向する端面を相互
に接合し、接合したウェノ)を基板として気相成長法に
よりシリコンをエピタキシャル成長させるので、エピタ
キシャル成長の過程で結晶の不連続部が埋め込まれ、大
面積のシリコン単結晶薄膜を容易に得ることができる。Effects of the Invention As described above, the method for manufacturing Uninow according to the present invention involves bonding the opposing end surfaces of a plurality of silicon single crystal wafers to each other, and epitaxially growing silicon by vapor phase growth using the bonded wafers as a substrate. As a result, crystal discontinuities are buried during the epitaxial growth process, and a silicon single crystal thin film with a large area can be easily obtained.
そして、このようにして得られた大面積薄膜単結晶上に
ICjプロセスによりホトセンサおよび走査回路を形成
することにより、高精度の切断、接着、固定を要しない
密着型シリコン単結晶イメージセンサを得ることができ
る。また、薄膜型感熱ヘッド駆動回路等も同様な方法で
得ることができる。By forming a photosensor and a scanning circuit on the thus obtained large-area thin film single crystal using the ICj process, a contact type silicon single crystal image sensor that does not require high-precision cutting, gluing, or fixing can be obtained. I can do it. Furthermore, a thin film type thermal head drive circuit and the like can be obtained in a similar manner.
第1図は、この発明により製造されたシリコンウェハの
一列の斜視図、第2図は第1図のム部拡大断面図、第3
図はこの発明に使用されるウェハ配列治具の一例の斜視
図、第4図はこの発明の一実施例におけるウェハ端面接
合部の拡大断面図、第5図はこの発明の他の実施列にお
けるウェハ端面接合部の拡大断面図である。
1・・・・・・シリコン単結晶ウェハ、2・・・・・・
接合部、3・・・・・・シリコンエピタキシャル層、4
・・・・・・シリコンウェハ収納箱、5・・・・・・ス
ライダ、6・・・・・・錘、7・・・・・・金属被膜。
代理人の氏名 弁理士 中 尾 敏 男 ほか1名属FIG. 1 is a perspective view of a row of silicon wafers manufactured according to the present invention, FIG. 2 is an enlarged sectional view of the wafer portion of FIG.
The figure is a perspective view of an example of a wafer arrangement jig used in the present invention, FIG. 4 is an enlarged sectional view of a wafer end surface joint in an embodiment of the present invention, and FIG. FIG. 3 is an enlarged cross-sectional view of a wafer end surface joint. 1...Silicon single crystal wafer, 2...
Junction, 3...Silicon epitaxial layer, 4
... Silicon wafer storage box, 5 ... Slider, 6 ... Weight, 7 ... Metal coating. Name of agent: Patent attorney Toshio Nakao and one other person
Claims (2)
て互に対向する端面を接触させ、高温下において前記端
面に圧力を加えることにより前記対向する端面を互に融
着させ、前記互に融着された複数個のシリコン単結晶ウ
ェハ上に気相成長法によりシリコンをエピタキシャル成
長させた大面積薄膜単結晶ウェハの製造方法。(1) A plurality of silicon single crystal wafers are arranged in a straight line, their opposing end surfaces are brought into contact with each other, and the opposing end surfaces are fused together by applying pressure to the end surfaces under high temperature. A method for manufacturing a large-area thin film single crystal wafer in which silicon is epitaxially grown by vapor phase growth on multiple silicon single crystal wafers fused to a silicon wafer.
おいてシリコンと合金化する金属被膜を予め形成した特
許請求の範囲第1項記載の大面積薄膜単結晶ウェハの製
造方法。(2) A method for manufacturing a large-area thin film single crystal wafer according to claim 1, wherein a metal coating that alloys with silicon at high temperatures is formed in advance on the end faces of a plurality of silicon single crystal wafers.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18482685A JPS6246996A (en) | 1985-08-22 | 1985-08-22 | Production of thin film of single crystal having large area |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18482685A JPS6246996A (en) | 1985-08-22 | 1985-08-22 | Production of thin film of single crystal having large area |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6246996A true JPS6246996A (en) | 1987-02-28 |
Family
ID=16159969
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18482685A Pending JPS6246996A (en) | 1985-08-22 | 1985-08-22 | Production of thin film of single crystal having large area |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6246996A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0367536A2 (en) * | 1988-11-01 | 1990-05-09 | Mitsubishi Denki Kabushiki Kaisha | Rod base material for providing wafers used for electronic devices and a method of manufacturing wafers used for electronic device |
EP0416301A2 (en) * | 1989-08-09 | 1991-03-13 | Hiroaki Aoshima | Process for producing structures from bonded synthetic single crystals |
-
1985
- 1985-08-22 JP JP18482685A patent/JPS6246996A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0367536A2 (en) * | 1988-11-01 | 1990-05-09 | Mitsubishi Denki Kabushiki Kaisha | Rod base material for providing wafers used for electronic devices and a method of manufacturing wafers used for electronic device |
EP0416301A2 (en) * | 1989-08-09 | 1991-03-13 | Hiroaki Aoshima | Process for producing structures from bonded synthetic single crystals |
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