JPS6245794B2 - - Google Patents
Info
- Publication number
- JPS6245794B2 JPS6245794B2 JP55076611A JP7661180A JPS6245794B2 JP S6245794 B2 JPS6245794 B2 JP S6245794B2 JP 55076611 A JP55076611 A JP 55076611A JP 7661180 A JP7661180 A JP 7661180A JP S6245794 B2 JPS6245794 B2 JP S6245794B2
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- voltage
- semiconductor switch
- circuit
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003990 capacitor Substances 0.000 claims description 18
- 239000004065 semiconductor Substances 0.000 claims description 10
- 230000001939 inductive effect Effects 0.000 claims description 5
- 238000001514 detection method Methods 0.000 claims description 4
- 238000009499 grossing Methods 0.000 description 21
- 238000010586 diagram Methods 0.000 description 7
- 238000013459 approach Methods 0.000 description 3
- 230000002265 prevention Effects 0.000 description 3
- 230000002238 attenuated effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
- H02M1/4208—Arrangements for improving power factor of AC input
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/12—Arrangements for reducing harmonics from ac input or output
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Description
【発明の詳細な説明】
本発明は、コンデンサ平滑形整流回路に係わ
り、特に倍電圧整流回路の力率改善に関するもの
である。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a capacitor smoothing rectifier circuit, and particularly to power factor improvement of a voltage doubler rectifier circuit.
従来の倍電圧整流回路を第1図にて説明する。
1は整流ダイオード、2は平滑コンデンサ、3は
平滑リアクトル、4は負荷、5は電源である。第
1図は普通使用されている倍電圧回路の基本構成
を示している。この回路の動作を簡単に説明する
と、電源電圧の半波期間で、一方の整流ダイオー
ド1の働きにより、平滑リアクトル3を介して、
一方の平滑コンデンサ2を充電し、次の半波期間
で、他方のダイオード1の働きにより平滑リアク
トル3を介して、他方の平滑コンデンサ2を充電
する。2つの平滑コンデンサは互いに直列に接続
されているため、負荷4には、一方の平滑コンデ
ンサに充電されている電源電圧のピーク分の2倍
の直流電圧が印加されることになる。この回路の
決定的な問題点は、平滑コンデンサ2が完全に放
電しないため、直流電圧分いわゆる酸留電圧が残
り、充電電流は電源電圧がこの残留電圧より高い
期間、すなわち電源電圧のピーク部分に近い期間
しか流れないということである。このため、入力
電流には大きな3次高調波成分が発生し、力率の
低下をひき起こす。 A conventional voltage doubler rectifier circuit will be explained with reference to FIG.
1 is a rectifier diode, 2 is a smoothing capacitor, 3 is a smoothing reactor, 4 is a load, and 5 is a power supply. FIG. 1 shows the basic configuration of a commonly used voltage doubler circuit. To briefly explain the operation of this circuit, during the half-wave period of the power supply voltage, one of the rectifying diodes 1 works to generate a signal through the smoothing reactor 3.
One smoothing capacitor 2 is charged, and in the next half-wave period, the other smoothing capacitor 2 is charged via the smoothing reactor 3 by the action of the other diode 1. Since the two smoothing capacitors are connected in series with each other, a DC voltage twice as high as the peak of the power supply voltage charged in one smoothing capacitor is applied to the load 4. The decisive problem with this circuit is that since the smoothing capacitor 2 is not completely discharged, a so-called oxidation voltage remains for the DC voltage, and the charging current is limited to the period when the power supply voltage is higher than this residual voltage, that is, at the peak part of the power supply voltage. This means that it only lasts for a short period of time. Therefore, a large third harmonic component is generated in the input current, causing a decrease in the power factor.
本発明は、上記欠陥を改良するためになされた
ものである。即ち、コンデンサ2の充電電流が流
れない期間、いいかえれば電源電圧が低くなつた
期間に、平滑リアクトル3を介して電源を短絡す
ることにより電流を流し、入力電流の第3次高調
波成分を低減しようというのである。しかも、上
記短絡回路には、半導体スイツチを設け、入力電
流の波形と正弦波状の参照電圧とを比較して上記
半導体スイツチを入力電流が正弦波に近ずくよう
に制御しようとするものである。 The present invention has been made to improve the above defects. That is, during a period when the charging current of the capacitor 2 does not flow, in other words, during a period when the power supply voltage is low, current is caused to flow by short-circuiting the power supply via the smoothing reactor 3, and the third harmonic component of the input current is reduced. That's what I'm trying to do. Moreover, a semiconductor switch is provided in the short circuit, and the waveform of the input current is compared with a sinusoidal reference voltage to control the semiconductor switch so that the input current approaches a sinusoidal wave.
以下本発明を第2図、第3図に示す一実施例に
より説明する。第2図は、実施回路の基本構成
で、第3図は、電源電圧と入力電流の関係を示し
たものである。6はコンデンサ2の放電防止用ダ
イオード、7はトランジスター、8は電流検出
器、9はヒステリシス付比較回路、10はトラン
ジスター7のドライバーである。又、aは、図示
の如く正弦波状の参照電圧上限電圧(参照電圧+
ヒステリシス電圧)、bは、図示の如く正弦波状
の参照電圧下限値(参照電圧−ヒステリシス電
圧)、cは入力電流、dは電源電圧、eはトラン
ジスタ7のドライブ信号である。次に、この回路
の動作を説明する。整流方法は、従来の倍電圧整
流(第1図参照)と全く同じなので省略する。電
源短絡回路は、平滑リアクタ3、ダイオード1、
トランジスタ7、電流検出器8により構成され
る。トランジスタ7、平滑リアクター3、整流ダ
イオード1、放電防止ダイオード6、平滑コンデ
ンサ2はそれぞれ2個ずつ設けられて以下、回路
図の上側に位置するものを側の〜、下側に位置
するものを側の〜と呼ぶことにする。第3図
で、電気角0〜πの期間では、側短絡回路が、
電気角π〜2πの期間では側の短絡回路が働い
ている。波形eは、トランジスタ7のドライブ信
号であるが、側トランジスタのドライバー、
側のトランジスタのドライバーが互いに相対的に
構成されているため、単一の信号で2つのトラン
ジスタ7を制御している。即ち、ドライブ信号e
で側になつてい期間が側トランジスタのオン
の信号、側になつている期間が側トランジス
タのオンの信号になつている。またこの信号は、
比較回路9の出力信号と全く同じである。0〜π
の期間、側トランジスタは順方向電圧が印加さ
れているため、電気角0゜より側トランジスタ
7がオンする。入力電流cが参照電圧上限値に達
すると比較回路9の出力が−Vssに落ち、側ト
ランジスタがオフする。入力電流cが参照電圧下
限値まで減衰すると、側トランジスタは再びオ
ンする。このようにしてオン、オフを繰り返す
が、π/2の付近に近づくと、側トランジスタ
の充電電流が急激に増加してゆくため、側トラ
ンジスタのオフの期間が大巾に伸びる。π/2の
点を越えると、側コンデンサの充電電流が減衰
して、側トランジスタが再度、オン、オフ発振
を開始する。0〜πの期間に、側トランジスタ
のオン信号も与えられることになるが、このとき
側トランジスタには順方向電圧が印加されてい
ないため、オンすることはない。 The present invention will be explained below with reference to an embodiment shown in FIGS. 2 and 3. FIG. 2 shows the basic configuration of the implemented circuit, and FIG. 3 shows the relationship between power supply voltage and input current. 6 is a diode for preventing discharge of the capacitor 2, 7 is a transistor, 8 is a current detector, 9 is a comparison circuit with hysteresis, and 10 is a driver for the transistor 7. In addition, a is a sine wave-like reference voltage upper limit voltage (reference voltage +
hysteresis voltage), b is a sinusoidal reference voltage lower limit value (reference voltage - hysteresis voltage) as shown in the figure, c is an input current, d is a power supply voltage, and e is a drive signal for the transistor 7. Next, the operation of this circuit will be explained. The rectification method is exactly the same as the conventional voltage doubler rectification (see FIG. 1), so a description thereof will be omitted. The power supply short circuit consists of smoothing reactor 3, diode 1,
It is composed of a transistor 7 and a current detector 8. Two transistors 7, smoothing reactors 3, rectifying diodes 1, discharge prevention diodes 6, and two smoothing capacitors 2 are provided.Hereinafter, the ones located on the upper side of the circuit diagram are referred to as ~, and the ones located on the lower side are referred to as ``side''. I will call it ~. In Fig. 3, in the period of electrical angle 0 to π, the side short circuit is
During the period of electrical angle π to 2π, the side short circuit is working. Waveform e is a drive signal for transistor 7, and the driver for the side transistor,
Since the drivers of the side transistors are configured relative to each other, a single signal controls the two transistors 7. That is, the drive signal e
The period on the side is the ON signal for the side transistor, and the period on the side is the ON signal for the side transistor. Also, this signal
This is exactly the same as the output signal of the comparison circuit 9. 0~π
Since a forward voltage is applied to the side transistor during the period , the side transistor 7 is turned on from the electrical angle of 0°. When the input current c reaches the reference voltage upper limit value, the output of the comparator circuit 9 drops to -Vss, and the side transistor is turned off. When the input current c decays to the reference voltage lower limit, the side transistor is turned on again. In this way, the on and off cycles are repeated, but as the charging current of the side transistor approaches π/2, the charging current of the side transistor increases rapidly, so the off period of the side transistor is greatly extended. When the point of π/2 is exceeded, the charging current of the side capacitor is attenuated and the side transistor starts on-off oscillation again. During the period from 0 to π, an on signal is also applied to the side transistor, but since no forward voltage is applied to the side transistor at this time, it will not turn on.
以上述べたのと全く同様にして、π〜2πの期
間には側トランジスタが動作する。通電電流
は、入力電流C波形のように正弦波に近づき、電
源電圧d波形との力率も極めて向上する。実測に
よれば、第3次高調波が35%、第5次高調波が40
%に低減でき、総合力率としても、従来回路方式
による76%から92%に大巾改善できた。また、平
滑コンデンサ2の両端に発生する直流電圧のリプ
ルを押えることができることもわかつた。 In exactly the same manner as described above, the side transistor operates during the period from π to 2π. The energizing current approaches a sine wave like the input current C waveform, and the power factor with the power supply voltage d waveform is also significantly improved. According to actual measurements, the third harmonic is 35% and the fifth harmonic is 40%.
%, and the overall power factor was significantly improved from 76% with the conventional circuit system to 92%. It was also found that ripples in the DC voltage generated across the smoothing capacitor 2 can be suppressed.
他の実施例、応用例を第4図、第5図に従つて
説明する。第4図で11は相方向性チヨツパ、1
2は電流検出抵抗、13は可変抵抗器、14は参
照電圧入力端子である。第2図で放電防止用ダイ
オード6とトランジスター7の代わりに、相方向
性チヨツパ11を用いた。電流検出の方法は、微
少抵光の電圧降下を検出することにより行なつ
た。又参照電圧としては、上記実施例によれば、
電源電圧そのものを入力していたが、この例で
は、負荷4に大小に応じて、調整することができ
る。すなわち、負荷が大きくなると充電電流が大
きくなるため、正弦波電流からずれることにな
る。そこで、参照電圧レベルを上げて、短絡電流
分も充電電流分に比例して増し、正弦波状電流と
する。 Other embodiments and application examples will be described with reference to FIGS. 4 and 5. In Fig. 4, 11 is a phase direction chopper, 1
2 is a current detection resistor, 13 is a variable resistor, and 14 is a reference voltage input terminal. In FIG. 2, a phase directional chopper 11 is used instead of the discharge prevention diode 6 and the transistor 7. Current detection was carried out by detecting a voltage drop due to minute resistance. Also, as the reference voltage, according to the above embodiment,
Although the power supply voltage itself is input, in this example, it can be adjusted depending on the size of the load 4. In other words, as the load increases, the charging current increases, resulting in a deviation from the sine wave current. Therefore, the reference voltage level is raised, and the short-circuit current is also increased in proportion to the charging current, resulting in a sinusoidal current.
第5図では、平滑リアクタ3を1個にし、放電
防止用ダイオード6、平滑リアクタ3をコンデン
サ充電電流が通電しないように配置した。この回
路方式の動作原理は、第4図で示したものと殆ん
ど同じであるので、説明は省略する。第5図に示
すように部品配置することで得られる最大の長所
は、充電回路ループ内のダイオード損失、平滑リ
アクタの損失が低減でき、電源回路の効率を上げ
ることができる。効率向上の程度は、使用するリ
アクター、ダイオードの容量等に依るが、実験で
は、25%の効率向上が実現できた。 In FIG. 5, the number of smoothing reactors 3 is one, and the discharge prevention diode 6 and the smoothing reactor 3 are arranged so that the capacitor charging current does not flow therethrough. The operating principle of this circuit system is almost the same as that shown in FIG. 4, so a description thereof will be omitted. The greatest advantage obtained by arranging the components as shown in FIG. 5 is that the diode loss and smoothing reactor loss in the charging circuit loop can be reduced, and the efficiency of the power supply circuit can be increased. The degree of efficiency improvement depends on the reactor used, the capacity of the diode, etc., but in experiments, an efficiency improvement of 25% was achieved.
本発明は、単相電源を入力電源とした倍電圧整
流回路において、電源端子間を、誘導性要素と半
導体スイツチを介して短絡するような回路を設
け、コンデンサ充電期間以外の期間に、適当なタ
イミングで上記半導体スイツチをオンオフせしめ
るように構成したので、入力電流の高調波、特に
第3次、第5次高調波を大巾に低減できるととも
に、力率の向上の効果がある。又、上記半導体ス
イツチのオンオフに伴なう、上記誘導性要素のエ
ネルギーをダイオードに介して、平滑コンデンサ
に供給する様に構成したので、直流電圧のリプル
低減の効果もある。さらに、入力電流と負荷の大
小に応じてレベル調節された正弦波状の参照電圧
とを比較して半導体スイツチのオン・オフのタイ
ミング信号を出力することにより、入力電流の波
形は正弦波電流からずれることがなく正弦波状に
なり、電源電圧波形との力率が向上できる。 The present invention provides a voltage doubler rectifier circuit that uses a single-phase power source as an input power source, by providing a circuit that short-circuits the power supply terminals via an inductive element and a semiconductor switch, and during periods other than the capacitor charging period. Since the semiconductor switch is configured to be turned on and off according to the timing, harmonics of the input current, especially the third and fifth harmonics, can be greatly reduced, and the power factor can be improved. Furthermore, since the energy of the inductive element accompanying the on/off of the semiconductor switch is supplied to the smoothing capacitor via the diode, ripples in the DC voltage can be reduced. Furthermore, the waveform of the input current deviates from the sine wave current by comparing the input current with a sinusoidal reference voltage whose level is adjusted according to the size of the load and outputting the on/off timing signal for the semiconductor switch. The power factor with the power supply voltage waveform can be improved by creating a sinusoidal waveform.
第1図は従来の倍電圧整流回路図、第2図は一
実施回路の基本構成図、第3図は第2図に示す実
施例の電源電圧と入力電流の関係を示した図、第
4図は他の実施例を示す回路図、第5図は応用例
を示す回路図である。
1……整流ダイオード、2……平滑コンデン
サ、3……平滑リアクトル、4……負荷、5……
電源、6……コンデンサ2の放電防止用ダイオー
ド、7……トランジスター、8……電流検出器、
9……ヒステリシス付比較回路、10……トラン
ジスター7のドライバー、11……相方向性チヨ
ツパ、12……電流検出抵抗、13……可変抵抗
器、14……参照電圧入力端子、a……参照電圧
上限値、b……参照電圧下限値、c……入力電
流、d……電源電圧、e……トランジスタ7のド
ライブ信号、+Vcc……+制御電源、−Vss……−
制御電源。
Fig. 1 is a diagram of a conventional voltage doubler rectifier circuit, Fig. 2 is a basic configuration diagram of one implemented circuit, Fig. 3 is a diagram showing the relationship between power supply voltage and input current of the embodiment shown in Fig. 2, and Fig. 4 is a diagram showing the relationship between power supply voltage and input current of the embodiment shown in Fig. The figure is a circuit diagram showing another embodiment, and FIG. 5 is a circuit diagram showing an applied example. 1... Rectifier diode, 2... Smoothing capacitor, 3... Smoothing reactor, 4... Load, 5...
Power supply, 6... Diode for preventing discharge of capacitor 2, 7... Transistor, 8... Current detector,
9... Comparison circuit with hysteresis, 10... Driver of transistor 7, 11... Phase directional chopper, 12... Current detection resistor, 13... Variable resistor, 14... Reference voltage input terminal, a... See Voltage upper limit value, b...Reference voltage lower limit value, c...Input current, d...Power supply voltage, e...Drive signal for transistor 7, +Vcc...+Control power supply, -Vss...-
Control power supply.
Claims (1)
された電源回路において、入力側に設けられた誘
導性要素と、該誘導性要素を介して電源端子間を
短絡する半導体スイツチと、上記誘導性要素およ
び半導体スイツチを流れる短絡電流と倍電圧整流
回路に設けられたコンデンサに流れ込む充電電流
とからなる入力電流を検出する電流検出手段と、
正弦波状の参照電圧のレベルを負荷の大小に応じ
調節する調節手段と、上記検出された入力電流と
上記調節された参照電圧とを比較して上記半導体
スイツチのオン・オフのタイミング信号を出力す
る比較手段と、該比較手段の出力を入力するドラ
イバーとを備え、該ドライバーは上記半導体スイ
ツチのオン・オフを行なうドライブ信号を出力す
ることを特徴とする電源装置。1. In a power supply circuit connected to a voltage doubler rectifier using a single-phase power source as an input power source, an inductive element provided on the input side, a semiconductor switch that shorts between power supply terminals via the inductive element, and the above-mentioned inductive current detection means for detecting an input current consisting of a short circuit current flowing through the element and the semiconductor switch and a charging current flowing into a capacitor provided in the voltage doubler rectifier circuit;
An adjusting means for adjusting the level of the sinusoidal reference voltage according to the magnitude of the load, and comparing the detected input current and the adjusted reference voltage to output an on/off timing signal for the semiconductor switch. A power supply device comprising a comparison means and a driver inputting the output of the comparison means, the driver outputting a drive signal for turning on and off the semiconductor switch.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7661180A JPS573579A (en) | 1980-06-09 | 1980-06-09 | Electric-power supply device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7661180A JPS573579A (en) | 1980-06-09 | 1980-06-09 | Electric-power supply device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS573579A JPS573579A (en) | 1982-01-09 |
JPS6245794B2 true JPS6245794B2 (en) | 1987-09-29 |
Family
ID=13610130
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7661180A Granted JPS573579A (en) | 1980-06-09 | 1980-06-09 | Electric-power supply device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS573579A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012019637A (en) * | 2010-07-08 | 2012-01-26 | Fujitsu Ltd | Voltage dividing power factor improvement circuit, voltage dividing power factor improvement device, and voltage dividing power factor improvement method |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0789743B2 (en) * | 1983-04-26 | 1995-09-27 | 株式会社東芝 | Rectifier power supply circuit |
JPS60174024A (en) * | 1984-02-17 | 1985-09-07 | 株式会社東芝 | Reactive power compensator for rectifying circuit |
JPS60247720A (en) * | 1984-05-23 | 1985-12-07 | Toshiba Corp | Direct current power unit |
JPS63190562A (en) * | 1987-01-29 | 1988-08-08 | Nec Corp | Voltage multiplying rectifier |
JP2505005Y2 (en) * | 1989-06-21 | 1996-07-24 | 株式会社ユアサコーポレーション | Rectifier circuit |
IT1244798B (en) * | 1990-10-19 | 1994-09-05 | Italtel Spa | AC-DC CONVERTER |
JPH04188206A (en) * | 1990-11-22 | 1992-07-06 | Hitachi Ltd | Power unit |
US6181583B1 (en) * | 1999-01-19 | 2001-01-30 | Matsushita Electric Industrial Co., Ltd. | Power supply device and air conditioner using the same |
JP2017055544A (en) * | 2015-09-09 | 2017-03-16 | シャープ株式会社 | Power factor improvement circuit and power supply device |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5317932A (en) * | 1976-07-31 | 1978-02-18 | Hitachi Ltd | Electric current source circuit |
-
1980
- 1980-06-09 JP JP7661180A patent/JPS573579A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5317932A (en) * | 1976-07-31 | 1978-02-18 | Hitachi Ltd | Electric current source circuit |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012019637A (en) * | 2010-07-08 | 2012-01-26 | Fujitsu Ltd | Voltage dividing power factor improvement circuit, voltage dividing power factor improvement device, and voltage dividing power factor improvement method |
Also Published As
Publication number | Publication date |
---|---|
JPS573579A (en) | 1982-01-09 |
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