JPS6243872A - Magnetic recording and reproduction equalizing system - Google Patents

Magnetic recording and reproduction equalizing system

Info

Publication number
JPS6243872A
JPS6243872A JP18473685A JP18473685A JPS6243872A JP S6243872 A JPS6243872 A JP S6243872A JP 18473685 A JP18473685 A JP 18473685A JP 18473685 A JP18473685 A JP 18473685A JP S6243872 A JPS6243872 A JP S6243872A
Authority
JP
Japan
Prior art keywords
signal
reproduction
magnetic recording
bit shift
given
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18473685A
Other languages
Japanese (ja)
Other versions
JPH0654524B2 (en
Inventor
Takayuki Takeda
武田 隆幸
Morishige Aoyama
青山 森繁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP18473685A priority Critical patent/JPH0654524B2/en
Publication of JPS6243872A publication Critical patent/JPS6243872A/en
Publication of JPH0654524B2 publication Critical patent/JPH0654524B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Digital Magnetic Recording (AREA)

Abstract

PURPOSE:To apply a reproduction equalization with a small bit shift by adding inversely an original signal subjected to delay and attenuation to a differentiated reproduction signal. CONSTITUTION:The output of a reproduction amplifier is converted into a sufficiently low impedance by a buffer 1 and the result is branched into two. One signal is given to a differentiation circuit comprising a capacitor 3 and a resistor 4, the other is given to a delay element 6 via a resistor 5 and the delayed signal is attenuated by a variable resistor 7. A signal (b) obtained by differentiating the reproduction signal (a) and a signal (c) being the result of delayed and attenuated reproduction signal are given to a differential input amplifier 2, where they are added inversely to obtain a symmetrical reproduced waveform (d) and to decrease the bit shift.

Description

【発明の詳細な説明】 (産業上の利用分針) 本発明は、等方的な媒体や垂直磁気異方性の不十分な垂
直磁気記録媒体のように、長手磁化モードと垂直磁化モ
ードが混在する媒体とリング型磁気ヘッドによるディジ
タル磁気記録装置においてビットシフトを減少させる再
生等化方式に関する口(従来技術とその問題点) 等方的な媒体や垂直磁気異方性の不十分な垂直磁気記録
媒体とリング型ヘッドによる磁気記録では、立ち上りに
比べ立ち下がシのゆるい第2図talのような非対称な
再生波形となる。また、長手記録でも、配向が不十分だ
ったり、媒体厚みに比べ、ギャップの狭いヘッドで記録
すると、同様の再生波形が観劇される。
Detailed Description of the Invention (Industrial Application Minute Hand) The present invention is a device in which longitudinal magnetization mode and perpendicular magnetization mode coexist, such as in an isotropic medium or a perpendicular magnetic recording medium with insufficient perpendicular magnetic anisotropy. Reproduction equalization method for reducing bit shift in digital magnetic recording devices using media and ring-type magnetic heads (prior art and its problems) Perpendicular magnetic recording with isotropic media and insufficient perpendicular magnetic anisotropy In magnetic recording using a medium and a ring-type head, an asymmetrical reproduced waveform as shown in FIG. 2, where the fall is slower than the rise, is produced. Furthermore, even in longitudinal recording, if the orientation is insufficient or if recording is performed with a head that has a narrow gap compared to the thickness of the medium, a similar reproduced waveform will be observed.

このような非対称な再生信号を従来のような彼分−零点
検出による復調回路(第3図)にて復調すると、その微
分波形が第2図(blのように、上下非対称になり、ビ
ットシフトやエラーの増加ヲヒきおこす。
When such an asymmetrical reproduced signal is demodulated by a conventional demodulation circuit (Fig. 3) using zero-point detection, its differential waveform becomes vertically asymmetric, as shown in Fig. 2 (bl), and bit shift occurs. This may cause an increase in errors.

(発明の目的) 本発明は、上記O)点に鑑み、微分された再生信号と、
遅延減衰させた再生信号とを逆相加算することにより、
ビットシフト量の減少をはかることにある0 (発明の構成) 本発明は、微分した再生信号に遅延・減衰した原信号を
逆相加算することにより構成され、これによりビットシ
フトの小さい再生等化が行える。
(Object of the Invention) In view of the above point O), the present invention provides a differentiated reproduction signal,
By adding the delayed and attenuated reproduced signal in reverse phase,
(Structure of the Invention) The present invention is constructed by adding a delayed and attenuated original signal to a differentiated reproduced signal in reverse phase, thereby achieving reproduction equalization with a small bit shift. can be done.

(発明の概Iり 第1図は発明の構成を示すブロック図である。(Outline of the invention I FIG. 1 is a block diagram showing the configuration of the invention.

再生信号〔第2図(a)〕を微分した信号〔第2図(b
)〕に、再生信号を遅延し、減衰させた信号〔第2図(
C)〕を差動入力増幅器によシ逆相加算することにより
、対称的な再生波形〔IIjIJ2図(d)〕が得られ
ビットシフトが減少する。
A signal obtained by differentiating the reproduced signal [Fig. 2 (a)] [Fig. 2 (b)]
)], the reproduced signal is delayed and attenuated [Figure 2 (
C)] by a differential input amplifier in reverse phase, a symmetrical reproduced waveform [Fig. IIjIJ2 (d)] is obtained, and the bit shift is reduced.

(実施例) 以下、本発明の実施例について図面を参照して詳細に説
明する◎第4図は本発明の実施例の具体的々回TN1図
を示したものである。再生アンプの出力はバッファlに
よって十分低いインピーダンスに変換され、2つに分岐
される。1方は3309Pのコンデンサ3と500Ωの
抵抗4からなる微分回路に接続さ、れる。もう一方は遅
延素子6の特性インピーダンスと同じ値の抵抗5を介し
て、遅延素子6に接続葛れ、遅延素子はその特性インピ
ーダンスと同じ値のボリウム7で終熾される口遅延され
た信号は、仁の、1zリウムで減衰される。これらの2
つの信号は差動増幅器2によって逆相加算される。
(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings. ◎ Fig. 4 shows a concrete TN1 diagram of an example of the present invention. The output of the reproducing amplifier is converted into a sufficiently low impedance by the buffer l, and is branched into two. One side is connected to a differentiating circuit consisting of a 3309P capacitor 3 and a 500Ω resistor 4. The other end is connected to the delay element 6 through a resistor 5 having the same value as the characteristic impedance of the delay element 6, and the delayed signal is terminated at a volume 7 having the same value as the characteristic impedance of the delay element. , is attenuated by 1zrium. These two
The two signals are added in opposite phases by the differential amplifier 2.

1iiA図0)等化回路を、磁性層厚み1゜4μInの
Co −γFe1O,媒体と空隙長0.25μmのリン
グ型磁気ヘッドからなるディジタル記録装置に適用した
。ヘッド・媒体量相対速度は1m/sである。
1iiA Figure 0) The equalization circuit was applied to a digital recording device consisting of a Co-γFe1O medium with a magnetic layer thickness of 1°4 μIn, and a ring-shaped magnetic head with a gap length of 0.25 μm. The head/medium amount relative speed is 1 m/s.

第5図は、101101パターンにおける中央のl1部
分のビット間隔のシフト量を記録密度りに対してプロッ
トしたものである。図中に示した従来技術は第6図の回
路で測定したものである。第5図かられかるように、本
発明によってビットシフト量を低減することができ、記
録密度を上げることができる。
FIG. 5 is a graph plotting the shift amount of the bit interval in the central l1 portion in the 101101 pattern against the recording density. The prior art shown in the figure was measured using the circuit shown in FIG. As can be seen from FIG. 5, according to the present invention, the bit shift amount can be reduced and the recording density can be increased.

(発明の効果) 本発明の本式により高密度までビットシフトを低減でき
た。
(Effects of the Invention) According to the present formula of the present invention, bit shifts could be reduced to a high density.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の構成を示すブロック図、第2図は、孤
立波を入力したときの第1区名部の波形を示した図であ
る。第3図は従来例のブロック図である◎第4図は本発
明の実施例の回路図である。 第5図は本発明及び従来例での101101パターンお
ける中央の11部分のビットシフト量を記録密度に対し
てプロットした図である0第6図は従来例の回路図であ
る。 第4図において、1はバッファ、2は差動増幅器、3は
コンデンサ、4,5は抵抗、6は遅延素子、7はボリウ
ムでめる〇 第1図 第2図 &   (C)遅延・減衰波形 第3図 等価回路に相等する部分 第4図 第5図 D(kFRPI)
FIG. 1 is a block diagram showing the configuration of the present invention, and FIG. 2 is a diagram showing the waveform of the first section when a solitary wave is input. FIG. 3 is a block diagram of a conventional example. ◎FIG. 4 is a circuit diagram of an embodiment of the present invention. FIG. 5 is a diagram plotting the bit shift amount of the central 11 portions of the 101101 pattern in the present invention and the conventional example against the recording density. FIG. 6 is a circuit diagram of the conventional example. In Figure 4, 1 is a buffer, 2 is a differential amplifier, 3 is a capacitor, 4 and 5 are resistors, 6 is a delay element, and 7 is a volume. Waveform Figure 3 Part equivalent to the equivalent circuit Figure 4 Figure 5 D (kFRPI)

Claims (1)

【特許請求の範囲】[Claims] 孤立再生波形が非対称であるディジタル磁気記録におい
て微分した再生信号に、遅延した原信号を逆相加算する
ことによって、ビットシフトを減少させることを特徴と
する磁気記録再生等化方式。
A magnetic recording/reproduction equalization method characterized in that bit shift is reduced by adding a delayed original signal in reverse phase to a differentiated reproduction signal in digital magnetic recording where the isolated reproduction waveform is asymmetric.
JP18473685A 1985-08-21 1985-08-21 Magnetic recording / reproduction equalization method Expired - Lifetime JPH0654524B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18473685A JPH0654524B2 (en) 1985-08-21 1985-08-21 Magnetic recording / reproduction equalization method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18473685A JPH0654524B2 (en) 1985-08-21 1985-08-21 Magnetic recording / reproduction equalization method

Publications (2)

Publication Number Publication Date
JPS6243872A true JPS6243872A (en) 1987-02-25
JPH0654524B2 JPH0654524B2 (en) 1994-07-20

Family

ID=16158462

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18473685A Expired - Lifetime JPH0654524B2 (en) 1985-08-21 1985-08-21 Magnetic recording / reproduction equalization method

Country Status (1)

Country Link
JP (1) JPH0654524B2 (en)

Also Published As

Publication number Publication date
JPH0654524B2 (en) 1994-07-20

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