JPS595410A - Digital data detector - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention This invention relates to digital data detectors. An example of application of the present invention is to use this detector in a digital video tape recorder to reproduce recorded signals, and this application example will be described here.

[Prior art]

When reproducing digital data from magnetic tape, anomalies such as defects in the tape cause a decrease in the amplitude of the reproduced signal, resulting in errors in the data sensing process. One way to reduce the effect of this problem is to limit the reproduced signal after integrating it.
The purpose is to aid in the recovery of information from signals with reduced amplitude during such abnormalities. However, if a recorded code with DC content is used, this method does not work because the zero crossing point of the reproduced signal moves due to the integration process. This movement may cause errors in the data sensing process.

Another detection method is to use a differentiator that does not impose any restrictions. Although this method is accurate at zero crossing points, there remains the problem of anomalies that cause detection errors. Codes with DC content are desirable because they contain more information than similar codes without it.

Therefore, a data detector that reproduces codes with high accuracy is desired.

[Disclosure of the invention]

The digital data detector according to the present invention includes a differentiating means for differentiating reproduced data, an integrating means for integrating the reproduced data, and a digital data detector coupled to the differentiating means and the integrating means, according to the integrated data. The present invention is characterized by a gate means for gating the differentiated data.

[Embodiments of the invention]

FIG. 2A shows the current in a recording head (not shown) for a hypothetical digital bit stream recorded in a non-return-to-zero interleaved format. In this format, "1"
exhibits a current transition at the center of its bit cell, while a ``0'' does not exhibit this transition.

Therefore, the long-lasting rOJ has a relatively high DC content;
The low frequency content makes it difficult to detect each bit.

FIG. 1 shows a block diagram of a detector according to the invention. The magnetic reproducing head 10 comes in contact with a recorded tape (not shown) to reproduce the recorded signal, and the reproduced signal is amplified by the amplifier 12 and then passed to the equalizer 14 to determine the recording/reproducing response characteristics. Frequency and phase equalization is performed for h. Figure 2A
This equalized signal for the recorded signal is shown in FIG. 2BK. This equalized signal is transmitted to the integrator 16 having the output waveform shown in FIG.
is applied to the differentiator 18 having an output waveform shown in the second diagram.

It can be seen that the positive and negative peaks in FIG. 2B coincide with the zero crossing points of the signals in FIGS. 2C and D. The output signal of the differentiator 18 is applied to a limiter 20 having an output signal shown in FIG. This output signal has a zero crossing point that matches the original signal in Figure 2A very precisely, but when the waveform in Figure 2B is close to the zero axis, it is caused by abnormalities such as tape, head, and amplifier noise ( As shading, it contains many other pseudo-zero intersections. Therefore, unless this pseudo zero crossing point is removed, it will be mistaken as "1". To remove the false zero crossing, the signal from limiter 20 is applied to a % bit delayer 22;
The true zero crossing point occurs at the center of the gate control signal (described above). The output signal of the delay device 22 is applied to the input of the gate 24.

In order to generate a gated <= j times signal, the output of the integrator 16 is applied to a limiter 26, and the signal limited here is then applied to a single (monostable) multi-by-break 28. The multivibrator 28 is triggered by the zero crossing of the signal from the limiter 26. This single-shot multivibrator 2
The output signal of 8 has a duration of approximately one bit long, as shown in FIG. 2G, and is applied to gate 24 as a gate control signal. When the gate 24 is "open" (the 21st EI G signal is at a high level), the signal J8' at the gate power point F passes through to the gate output point H, but when the gate 24 is "closed" (the 21st EI G signal is at a high level)
When the signal in Figure G is at a low level, the output signal maintains the value before the capacitor (not shown) K in the gate. As a result, the output waveform becomes as shown in Figure 2H, and it can be seen that it does not include the abnormality shown in Figure 2F. When the waveform of FIG. 2H is compared with the original waveform AJC, it is found that they are exactly the same non-zero return interleaved waveforms except that the polarity is reversed and the length is shifted by one bit. Figure 2! The non-return-to-zero interleaved output signal of -( can be converted to the non-return-to-zero signal of FIG. 1 if necessary.

Therefore, the exact nature of the zero crossing points of the differentiated signal and the less (or no) abnormality of the integrated signal according to the present invention
It is easily understood that the properties are combined.

[Brief explanation of drawings]

It is an octahedral color. 16... Integrating means, 18... Differentiating means, 24...
gate means.

Claims (1)

[Claims] (1) Differentiating means for differentiating the reproduced data, integrating means for integrating the reproduced data, coupled to the differentiating means and the integrating means, and calculating the differentiated data according to the integrated data. and gating means for gating.