JPS6243198B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a programmable automatic performance device, and more particularly, to a programmable automatic performance device that uses a rest signal, a tie signal, and a score change signal output from a storage device that stores score information to generate a key-on signal during manual performance. This invention relates to an automatic performance device that generates the same signal to control musical tones.

Conventionally, there has been no automatic performance device that can generate rest signals and tie signals even with a simple circuit configuration. In addition, as microcomputers have been developed in recent years, multifunctional automatic performance devices using microcomputers are also being developed. There is a problem in that it is desirable not to incorporate into a microcomputer as much as possible what can be easily realized outside the microcomputer using a known general-purpose IC, etc. due to the limitations of the microcomputer.

In view of the conventional situation, the present invention provides a rest signal,
To provide a new automatic performance device in which a tie signal is executed with a simple circuit configuration.

Generally, when performing automatically while reading music score information from a storage device that stores music score information, the note length information (quarter note, quarter rest, etc.) stored at the address of the storage device is read out and the corresponding note length is adjusted. After a predetermined period of time has elapsed, the next address in the storage device is designated and the tone length information stored there is read out. Therefore, if the accompanying pitch information, information on the presence or absence of rests, etc. are stored in the storage device together with the note length information, each sheet music information will be retrieved from the storage device in the order of the sheet music during automatic performance. Output. As mentioned above, changing the address of the storage device sequentially during automatic performance indicates that the type of score changes, so it is possible to obtain a score change signal directly or indirectly from this information. can.

The present invention reads the tie signal and the rest signal directly from the storage device, and the above-mentioned musical score change signal, tie signal,
To provide an automatic performance device that uses two or three types of signals from among rest signals to generate a signal equivalent to a key-on signal during manual performance, and controls whether or not a musical sound source generates sound. It is something to do.

That is, the present invention provides an automatic performance device that stores notes and rests of a musical score as one piece of musical score information in a predetermined address of a storage device in the order in which the musical score is to be played, and reads them out in order from the storage device during automatic performance. , comprising means for extracting a musical score change signal indicating that the musical score information has changed from the musical note information read from the storage device during automatic performance, and means for extracting a rest signal or a tie signal, The musical score change signal is not output when there is a rest signal or a tie signal.

Here, the "repetition signal" and "jump symbol" used in the explanation of the following embodiments will be defined. In general, repetition symbols include jump symbols (described later) used in the present invention, but in the present invention, in order to facilitate explanation, functional names are given to repetition symbols and jump symbols, respectively, as follows. Define. In other words, the symbol 〓 means to go back (repeat) to the previous symbol 〓.

In the present invention, a symbol that commands such repetition is defined as a repetition symbol. Repeat symbols include 〓, 〓,
There are S/..., DS, DC, 〓, etc. (〓 is also considered as one symbol and is called a repetition symbol).

Also, the first parenthetical symbol 〓 should be jumped to the second parenthetical symbol 〓 after it.
It is a command symbol with a meaning such as.

In the present invention, a symbol that commands such a jump is defined as a jump symbol. Jump symbols include 〓, to, 〓, etc.

Hereinafter, the present invention will be explained based on drawings of embodiments. FIG. 1 is a diagram showing an embodiment of the present invention. In FIG. 1, 201 is a pitch input device for specifying the pitch of a musical tone and a rest;
It consists of two rows of switches each having buttons □OFF and keys _F2 ... _C5 and two sets of switches each driven by these buttons and keys. One end of each of the switches in one column is connected in common and connected to the input of the OR circuit 202. The switches in the other rows are each independently connected to a code converter 203, and are converted into codes corresponding to each pitch or rest. The first code converter 2 with a plurality of code converters 203
04.

Reference numeral 205 denotes a note length input device for specifying the length of a note, and is composed of two rows of switches each having buttons 〓, 〓, . One end of each row of switches is connected in common and connected to a write terminal of the temporary storage device 208. The switches in the other rows are each independently connected to a code converter 206, and are converted into codes corresponding to each tone length. A second code converter 20 with a plurality of code converters 206
7. The code converter 206 uses a tri-state output whose output terminal becomes high impedance when it is not selected. The output of the code converter 206 is wired ORed and connected to the input terminal of the temporary storage device 208. When one tone length button of tone length input device 205 is designated, a corresponding pair of switches are closed, thereby causing code converter 206 to generate a corresponding predetermined code signal. On the other hand, when one pulse enters the write terminal of the temporary storage device 208, the second code conversion device 2
The output code signal of 07 is stored in the temporary storage device 208. The contents of this temporary storage device 208 are as follows:
It will not change until the next time the tone length input device is operated.

209 is the stop of the song, the whole repetition (repeat), the repeat symbol (〓, 〓, 〓), the jump symbol (〓)
It is an action input device for specifying an action, and the button 〓,
It consists of two rows of switches each controlling 〓, 〓, stop, and repeat. One end of the switches in one row is connected in common and connected to the input of the OR circuit 202. The switches in the other columns are each independently connected to code converter 210. The output of the code converter 210 is converted into a predetermined code corresponding to each switch. A plurality of code converters 210 constitute a third code converter 211.

In this embodiment, each switch of the pitch input device 201, the tone length input device 205, and the motion input device 209 is
It shall be connected to +5V when ON and grounded when OFF.

The output end of the code converter 203 is tri-state type, and the outputs thereof are wired-ORed and connected to a predetermined input end of the storage device 212. Similarly, the output of the code converter 210 is wired ORed and connected to a predetermined input terminal of the storage device 212. The output end of the temporary storage device 208 is connected to the storage device 2
12 other input terminals. OR circuit 2
The output of 02 passes through a chatter prevention device 213 and is then connected to the program contact side of a program/auto changeover switch 214. switch 214
The common terminal of is connected to the input terminal of the AND circuit 215. Reference numeral 216 denotes an address counter (using a presettable counter), which also serves as an address register for storing the address of the storage device 112 in the present invention. A counter output signal (binary code) of the address counter 216 is connected to an address terminal of the storage device 212. The common terminal of switch 214 is also
It is connected to the read/write controller 217. The read/write controller 217 includes a switch 218 that interlocks with the program/auto changeover switch 214.
is connected. When switches 214 and 218 are connected to the program mode side, each time there is an input signal from the common terminal of switch 214, a write command signal is sent to storage device 212, and switch 218 is connected to auto mode. When it is lying on its side, it is configured to send a read signal to the storage device 212 regardless of the input signal.

The case where the switches 214 and 218 are connected to the program mode side will now be described in detail. It is assumed that the contents of the address counter 216 are initially cleared to zero, and the zero address is specified in the storage device 212. As shown in Figure 2,
Consider the case of programming an explanatory musical score.

This note contains repeat marks (〓, 〓) and jump marks (〓), and the playing order is A→B→C→
B → D. From the note length input device 5, number 101
Specify and input the note length ♪. As explained above, this tone length information is code-converted and stored in the temporary storage device 208. Next, pitch input device 201
Specifies the pitch of C ₃ . The pitch of C ₃ is code converted by the first code conversion device 204, and
Since the operation signal of the pitch input device 201 is input to the OR circuit 202, the output becomes High (+5V). OR
The output signal of the circuit 202 is transmitted to the anti-chatter device 21.
3 and is applied to the read/write controller 217 via the switch 214. Therefore, the read/write controller 217 sends a write signal to the storage device 212, and the output signals of the temporary storage device 208 and the first code conversion device 204 are as follows.
Each is stored in a predetermined bit position at address zero of the storage device 212.

In this way, by turning on the pitch input device, the note information of number 101 is transferred to the storage device 211.
is stored at address zero. Here, in the program mode, the output terminal of the storage device 212 is set to high impedance. Therefore, one input of the AND circuit 215 connected to the output end of the storage device 212 is connected to +5V (High) via a resistor, so a High signal is being input.

Next, when the pitch input device is turned off, AND circuit 2
Since the signal from the common terminal of switch 214 is input to switch 15, its output changes from High to Low.
(OV). Due to this change, the address counter 216 advances by one, and the storage device 212
has been assigned address 1 and is waiting for the next information.

When inputting the note number 102, the same operation can be performed. In this case, fortunately, the note length is a quarter note, which is the same as the note number 101, so the note length information remains in the temporary storage device 208.

Therefore, there is no need to re-input the note length information, and it is sufficient to simply specify the note pitch _D3 . In this way, the note information of number 102 is stored in the storage device 212.
is stored at address 1.

Note number 103 is a half note, number 10
Since it is different from the note number 101, first, from the note length input device 205,
, and then input E ₃ from the pitch input device 201. Similarly, with these steps, number 10
Assume that 4,105 notes have been input.

Next to the note numbered 105 is a repetition sign 〓. This is input from the motion input device 209. The functions of each part at this time can be said to be exactly the same as when inputting from a pitch input device. That is, when 〓 is input from the motion input device 209, the code-converted signal is stored in address 6 of the motion storage area of the storage device 212. At this time, note length information number 105 remains in the temporary storage device 208, and is written to a predetermined bit position at address 6 in the note length storage area. Further, pitch information is also written to the pitch storage area of the storage device 212.

The input of note information for numbers 106, 107, and 108 is also the same as described above, so the explanation will be omitted. number 1
The jump mark next to the note 08 is also stored by operating 1 of the motion input device 209 in the order of the musical score. Note information of numbers 109 and 110 can also be stored in the same way as the other notes mentioned above. Similarly, the next repetition symbol 〓 of number 110 can be stored by inputting 〓 from the operation input device 209.
Notes numbered 111, 112, and 113 can be input in the same way as other notes. Number 114 is a quarter rest, but since it has the same length as the quarter note number 113, there is no need to specify the note length again, and you can simply enter the □ rest ( rest). Finally, information indicating the end of the song (〓) is input, and in this embodiment, either stop or repeat can be input from the motion input device 9. During automatic playback, if you set stop, the song will stop there, and if you set repeat, it will return to address zero, and the programmed song will be repeated indefinitely.

So far, we have explained the parts related to the program. Next, parts related to automatic performance will be explained. Switches 214 and 218 are connected to auto mode. As described above, the storage device 212 stores musical score information. When these programmed musical scores are automatically played, addresses are sequentially designated by the binary code output of the address counter 216, and musical score information is output from the output end of the storage device 212 in accordance with the addresses. In the storage device 212, a is a stop signal, b is a repeat signal, c is a repetition symbol 〓, 〓, or 〓 signal, d is a jump symbol 〓 signal, and e is operation information (stop, repeat, repetition).
f is a pitch signal, g is a rest signal, h is a tone length signal, and i is an output terminal for outputting a tie signal. A pitch signal (code signal) at terminal f of the storage device 212 is connected to a musical tone generator 220 . The musical tone generator 220 is composed of a code converter, a programmable counter programmed with its output code, and an oscillator. , configured to generate a musical tone signal. The output of terminal g is Low when there is rest information.
(low potential). The output of terminal i is low when there is tie information. The output of the terminal e is an operation information discrimination signal and is a low output when there is no operation command, and is applied to one input of the OR circuit 221. Furthermore, tone length information is also applied to other inputs of the OR circuit 221. Therefore, when the tone length information discrimination signal terminal e is High, the output of the OR circuit 221 is High regardless of the tone length signal h, while when the operation information discrimination signal terminal e is Low, the tone length signal h is OR. Presettable counter 22 via circuit 221
Added to 2. The presettable counter counts the pulses of the tempo oscillator 223 according to the tone length signal at the terminal h, and outputs a carry output. The carry output is High (high potential). The carry output of the presettable counter 222 is input to the NAND circuit 224, and at the same time it is input to the inverter 22.
8 to the auto mode side terminal of the switch 214. A tie signal from terminal i of the storage device 212 is input to the other input of the NAND circuit 224. The output of the NAND circuit 224 and the rest information of the terminal g of the storage device 212 are input to the AND circuit 225 , and the output of the AND circuit 225 is connected to the input of the NAND gate 226 .
The other input of the NAND gate 226 is connected to the output signal of the musical tone generator 220. 231 is a reset switch, which connects the +5V power supply to the OR circuit 230.
The reset terminal of the address counter 216 is connected to the reset terminal of the address counter 216 via the address counter 216.

Here, an outline of the simplest automatic performance will be explained. Switches 214 and 218 are turned to auto mode. When the presettable counter 222 counts the length of one note, it outputs a carry output (positive pulse). This carry output is connected to a clock input of an address counter 216 via a switch 214 and an AND circuit 215 (assuming that the other inputs of the AND circuit receive a High signal). Since address counter 216 counts on the leading edge of this signal, the count increases by one and therefore the designated address in storage device 212 advances by one. Further, the above-mentioned carry output is applied to the set input of the presettable counter 222, so that this setting operation is performed at the trailing edge of the above-mentioned carry signal. In this way,
When a carry signal is output from the presettable counter 222, the address of the storage device 212 is incremented by one, and the note information next to the note that has been played so far is output, among which the note length information of the terminal h. but,
It is set in the presettable counter 222.
The presettable counter 222 outputs a carry output again after the time corresponding to the set tone length, thereby performing the same operation as described above.
The tone length information at the next address in the storage device 212 is newly set in the presettable counter 222.

In this way, the programmed note information in the storage device 222 is read out sequentially at time intervals of the programmed note length information.

The output signal of the presettable counter 222 is
This can be thought of as a musical score change signal indicating that a note has changed. The read scale information of the terminal f is converted into a musical tone by the musical tone generator 220, so that the melody of the song is automatically played according to the musical score. In addition, when there is a rest signal at terminal g (Low when it is a rest), the output of the AND circuit 225 also becomes Low,
The output musical tone signal of the musical tone converter 220 is blocked by the NAND circuit 226, and no musical tone is produced only during the length of the rest. If there is no tie signal at terminal i, the presettable counter 222
The carry output (note change signal) is NAND circuit 2
24, the output of the AND circuit 225 is a negative pulse. Therefore, when automatically playing a musical note without a tie, the output musical tone signal of the musical tone converter 226 is temporarily stopped by the NAND circuit 226 every time the note changes, so the musical tone is temporarily stopped every time the note changes. Interrupted. however,
When there is a tie signal at terminal i (Low during tie signal), the output of the NAND circuit 224 is always High, and the output of the NAND circuit 224 has no relation to the musical score change signal of the presettable counter 222, and the output of the NAND circuit 224 is a musical note. Even if the musical tone generator 220 changes, the output musical tone signal of the musical tone generating device 220 continues to produce sound without interruption. In this way, the score change signal, the rest signal, and the tie signal are extracted from the score information in the storage device 222, and when there is a tie signal, the score change signal is blocked, and the logical output signal is changed to the rest signal. When there is a tie signal, it is blocked, and the logic output signal also controls the sounding of the musical tone signal, and when there is a tie signal, the musical tone is not cut off even if the note changes (when playing by hand, there is no tie). (For example, it works the same as playing while holding down a key), and when there is a rest, it can suppress the sound from being produced. If this control method is used, rests and tie signals can be easily controlled.

Next, the repetition symbol and other operation information are stored in the storage device 2.
12, and the case where they are automatically played will be explained. The stop signal (Low at stop) of the storage device 212 terminal a is sent to the AND circuit 2.
15, and blocks the musical score change signal coming from the presettable counter 222 when stopped. Therefore, if a stop signal is received in the storage device 212, the address in the storage device 212 will no longer advance, and the automatic performance of the song will be stopped. Furthermore, the repeat signal (high during repeat) at terminal b of the storage device 212 is transmitted to the OR circuit 23.
0 to the reset terminal of address counter 216. Therefore, when the repeat signal is issued, the contents of the address counter 216 are cleared, so the specified address of the storage device 212 becomes 0.
The address will be displayed and the song will be played from the beginning. In other words, if a repeat signal is programmed at the end of a song, the automatic performance will be repeated an infinite number of times (time). The operation information discrimination signal of the terminal e of the storage device 212 is output when there is an operation signal such as the stop, repeat, repetition, jump symbol 〓, 〓, 〓 mentioned in this embodiment, and is outputted via the OR circuit 221. Enter the preset input of the presettable counter 222. This signal is used to minimize the execution time of the address when the above operation signal is input, that is, to set the presettable counter 222 to a value that makes it a full count, to immediately output a carry signal, and to output the operation information. The execution time of the entered address should ideally be reduced to zero. This is because if it takes time to execute the repeat signal or repeat code, it will cause an error in the length of the notes being played, which will disrupt the tempo of the music, which is not a good thing. The repetition symbols 〓, 〓, 〓 on terminal c are applied to a first counting device 240 which produces a predetermined signal, and the number of times it appears is counted. The output terminal j of the first counting device is connected to the write terminal of the first register 241,
Output when the number of repeated codes is 1st, output terminal j
Each time a signal is output to the address counter 216, the contents of the address counter 216 plus 1 are transferred to the first register and stored (the circuit that adds 1 is omitted to avoid complexity, but a known adder can be used. Good luck).
The first counting device 240 is a presettable counter, and when it counts the number of times set by the number setting device 242, it is cleared to the original state. The output terminal K of this first counting device 240 is connected to the number setting device 24.
A signal is output to this terminal for the number of times N (N=1, 2, 3...) set in 2, the number of times the repetition symbol appears is from 2 to N times. When the N+1st repetition symbol arrives, no output appears at terminals J and K of the first counting device 240, and the contents are cleared (initialized). When a signal is output to the output K of the first counting device 240, that signal is applied to the write terminal of the first register 241, and the contents of the address counter 216 plus 1 are added to the second counter.
is transferred to and stored in the register 243 (the circuit that adds 1 is not shown). The jump symbol signal 〓 at terminal d is applied to the second counting device 245 . The second counting device 245 does not output anything when the first jump signal 〓 comes, and outputs an output signal when the second jump signal 〓 comes, and at the same time clears the inside (initial setting). Second counting device 2
The output signal of 45 is applied to the write terminal of the address counter 216 (or the parallel input enable terminal PE when a counter capable of parallel presetting is used as the address counter 216) via the OR circuit 244. The contents of the second register 243 are transferred to the address counter 2 by the signal.
Transfer to 16.

Consider the case where a piece of music programmed with the musical score shown in FIG. 2 is automatically played in the above configuration. N of the number setting device 242 is set to 2. Play the notes sequentially from address 0 as described above, and then
When the signal is output, an output signal appears at the terminal J of the first counting device 240, and the address counter 21
The 6th address obtained by adding 1 to the 5th address of 6 is stored in the first register 241. The performance continues sequentially from number 6 onwards, and then the jump signal at number 9
When , nothing appears in the output of the second counting device 245, and only the history remains as internal information. Continuing to play, repeat symbol at number 12
When , a signal appears at the output terminal k of the second counting device 245, and address 13, which is the output value 12 of the address counter 216 plus 1, is assigned to the second register 24.
3. At the same time, the content value 6 of the first counting device 240 is transferred to the address counter 216.
will be moved to Therefore, since address 6 is specified in the storage device 212, the address counter 216 returns to address 6 and is executed. Next, when the jump signal 〓 of address 9 appears, an output appears on the second counting device 245, and the contents 13 of the second register 243 are transferred to the address counter 216. Therefore, the automatic performance jumps from address 8 to address 13. In this way, the playing order is A→B→C→B→D
become that way.

Also, as shown in Fig. 3, if a certain part of a song is surrounded by 〓 and 〓, and the setting value of the number setting device 242 is set to N, the 〓 signal at address a will be played automatically and the 〓 signal at address a will be output first. When the first register 24
1 stores a+1, and then when the 〓 signal of address b comes out (second time), the address counter 216
The content a+1 of the first register 241 is transferred to. As a result, the memory device 212 is repeatedly automatically played starting from address a+1. Then, when the 〓 signal of address b comes out again (third time), the same operation as the second time is performed. When the Nth repetition code 〓 appears, the first
The content a+1 of the register 241 is transferred to the address counter 216 while being saved. Automatic performance continues on memory device 2.
12 is executed repeatedly from address a+1, and the repetition symbol 〓 (N+1st time) at address b appears. Here, the contents of the first and second counting circuits 240 and 245 are cleared and initialized. Then, the automatic performance continues to execute the songs starting from address b+1 in the storage device 212 (in this embodiment, 〓 and 〓 have the same function). Like this, the repetition symbol (〓 or 〓)
By using the number setting device 242, it is possible to perform the desired number of times between arbitrary addresses.

It should be noted that in the above embodiments, the explanation of parts that are not directly related to the gist of the present invention has been simplified to make the overall explanation concise.

Next, another embodiment of the present invention using a microcomputer will be described.

FIG. 4 is a system block diagram of the microcomputer MN1400 used in this embodiment (see FIG. 5).

Microcomputer MN1400 is composed of seven functional blocks.

(1) Arithmetic logic unit section (ALU, 4-bit A and B buses, ACC, temporary registers, flags) (2) Data memory section (RAM, X register, Y register) (3) Program counter section (program counter, ROM, subroutine stack) (4) Instruction decoder section (instruction register, instruction
PLA) (5) Counter section (SNSO, SNSI sense input, 8
(6) Input/output section (A, B input ports, C, D, E output ports) (7) Clock generation section (oscillator, timing signal) As is well known, a microcomputer is a It is a type of microcomputer, and because the signal exchange is controlled by a program using microinstructions, it is difficult to make a clear one-to-one correspondence between each functional block in FIG. 1 and each part of the microcomputer.

However, the concept of the present invention itself remains the same even when a microcomputer is used. For example, code converters 203, 2 in FIG.
Each code of 06 and 210 is stored in the ROM shown in FIG. However, in this microcomputer MN-1400, as soon as the power is turned on, the contents of the ROM are transferred to the RAM, and code conversion is performed in the RAM area. The storage area of the temporary storage device 208 in FIG. 1 is also set at a predetermined address in the RAM. The storage areas of the address counter 216, first register 241, and second register 243 are also set at predetermined locations in the RAM. In the first embodiment shown in FIG. 1, a presettable counter is used as the address counter 216. Within a microcomputer, this counter function is controlled by the communication between the arithmetic unit (ALU), macromulator (ACC), and RAM (controlled by a program).
This can be achieved with The first counting device 240 and the second
The counting device 245 is similarly set by integrating the counting results in the RAM area shown in FIG. The presettable counter 222 uses a counter built into a microcomputer.

FIG. 5 is a diagram showing an embodiment of the present invention using a microcomputer MN1400. Switches for the pitch input device, tone length input device, and motion input device are arranged at each intersection of the matrix. These matrices are searched by time/minute search pulses from output ports COφ~ _CO6 , and the interpolation results are sent to the microcomputer MN-1400 from output ports Aiφ~3 and Biφ~3 and searched.
This determines which key was pressed. One pitch switch is provided for each pitch, and in the case of FIG. 5, a total of 36 pitches can be input. In order to reduce the number of switches, the note length input device is provided with independent ties (〓) and dots.
Therefore, for example, ♪. To input the tone length signal, press the ♪ switch and the switch, and the tone length signal will be input to the microcomputer MN-1400. The switch output for switching between auto mode (A) and program mode (P) is also taken into the microcomputer and discriminated. Repeat symbol (〓, 〓, 〓)
One button for setting the number of times N is placed at the matrix intersection of Co6 and Ai3. The switch is 1
Therefore, the setting of the number of times N is specified by, for example, the number of times this switch is pressed. Since the microcomputer MN1400 is a 4-bit microcomputer, a 256×4-bit RAM is used as the musical note storage device 212. The 8-bit address signal of the storage device 212 is output in two parts of 4 bits each from the output ports EOφ to EO3 of the microcomputer, and is stored in 4 bits each in a latch 301 using two 4-bit latches. The latch signal is applied to latch 301 from the D07 output. The RAM 302 of the storage device 212 stores note length information (〓, 〓, ♪, 〓, 〓, 〓, 〓, 〓, 〓, 〓, ♪.
〓． , ) 12 types and repeat, stop, jump 1,
A total of 16 kinds of operation signals of 4 kinds of repetition 〓, 〓, and 〓 are stored. One bit of the RAM 302 stores the presence or absence of a rest, another one bit stores the presence or absence of a tie, and the remaining two bits store pitch octave information. RAM304
stores note information (12 types). Each RAM3
Writing/reading to and from 02, 303, and 304 is controlled by chip select signals of output ports CO9, CO10, and CO11 and an R/W signal (read/write control signal) of CO8. RAM3
The 6 bits of pitch information of 03 and 304 are converted into a musical tone signal by the musical tone generator 220. this is,
It is the same as that in FIG. Also RAM303
The rest signal and tie signal are also output from the NAND circuit 224 and the AND circuit 22, as in the case of FIG.
5. Processed by the NAND circuit 226. RAM
The output of the tone length signal and operation signal 302 is taken into the microcomputer from the Bi port of the microcomputer MN1400. When it is note length information, a note change signal corresponding to the carry output signal of the presettable counter 222 in FIG. 1 is output from the output port CO7. This signal is
It is connected to the input of the NAND circuit 224 and processed in the same manner as in FIG. In addition, when the output signal of the RAM 302 is an operation signal, the microcomputer determines whether it is a repeat, stop, repeat (〓, 〓, 〓) jump (〓), and sets the address of the storage device 212 to EOφ. ~Output from the output port of EO ₃ and latch it to latch 301. 22 in Figure 5
3 is a tempo oscillator, which is the same as that in FIG. This oscillation signal is taken into the microcomputer from the input terminal SNSI as a counter input signal within the microcomputer.

6a, b, and c summarize the operations of the embodiment shown in FIG. 5 in the form of a flowchart.

As mentioned above, in the embodiment using a microcomputer, it is very difficult to explain which part of the internal RAM corresponds to which code conversion device in the embodiment shown in FIG.
Since addresses are assigned in advance inside the RAM, functions are clearly divided. Therefore, although the embodiment of FIG. 5 has a slight difference in circuit configuration, it is substantially the same as the embodiment of FIG. 1 in terms of function and configuration.

Musical tone change signal (output from CO7), tie signal, rest signal (1 bit each output from RAM303)
The processing is exactly the same as the embodiment shown in FIG. In the embodiment of FIG. 5, the microcomputer is a 4-bit one, and therefore the RAM used for the external storage device 212 is also a 4-bit one. During automatic performance, only the RAM 302 is loaded into the microcomputer. Of course, if you also import the rest signal and tie signal into the microcomputer, you can directly obtain a signal from CO7 that is equivalent to the key-on signal when playing by hand.
To do this, it is necessary to import the RAM 303 into the microcomputer, and the circuit, control,
And calculations inside the computer become complicated.

As described above, according to the present invention, musical score information for rests and ties can be easily and inexpensively processed in various automatic performance devices.

In the embodiments shown in FIGS. 1 and 5, a case has been described in which both a rest signal and a tie signal are present, but in a popular type automatic performance apparatus, there may be no tie signal. In that case, the NAND circuit shown in FIGS. 1 and 5 may be used as an inverter that simply inverts the musical score change signal output from the presettable counter 222. (If the polarity of the score change signal is considered from the beginning, the NAND circuit 224 is unnecessary).

As described above, according to the present invention, when there is no tie signal or rest signal, by preventing the score change signal from being output, the signal corresponding to the key-on signal during manual performance (in the embodiment, the AND circuit 225 from)
Obtainable.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a diagram explaining an input method for the automatic performance device of the present invention, and FIG. 3 is a diagram for playing the part surrounded by repeat symbols a predetermined number of times. 4 is a system block diagram of the microcomputer MN1400 used in another embodiment shown in FIG. 5. FIG. 5 is a diagram showing another embodiment of the present invention. FIG. 6 is a diagram for explaining the method. a,
b and c are diagrams for explaining the operation of the embodiment of FIG. 5; 216... Address register (presettable counter), 212... Storage device, 217... Read/write controller, 222... Presettable counter, 223... Tempo oscillator, 224, 2
26...NAND gate, 225...AND gate, 220...musical tone conversion device, MN1400...
microcomputer.

Claims (1)

[Claims] 1. In an automatic performance device that stores notes and rests of a musical score as one piece of musical score information in the order in which the musical score is to be played in a predetermined address of a storage device, and reads them out in order and automatically performs them during automatic performance, means for extracting a musical score change signal indicating that the musical score information has changed from the read note information; a rest signal extracting means for extracting a rest signal; a tie signal extracting means for extracting a tie signal; Tie signal time score change signal blocking means for blocking a score change signal; rest signal time score change signal blocking means for blocking an output signal of the tie signal time score change signal blocking means when a rest signal is present; and a rest signal time score change signal blocking means. Musical sound generation control that controls the sounding of a musical sound signal using the output signal of the musical score change signal blocking means so that the musical sound does not cut off even if a note changes when there is a tie signal, and does not generate a musical sound when there is a rest. An automatic performance device characterized by comprising means.