JPS6240427Y2 - - Google Patents
Info
- Publication number
- JPS6240427Y2 JPS6240427Y2 JP14518281U JP14518281U JPS6240427Y2 JP S6240427 Y2 JPS6240427 Y2 JP S6240427Y2 JP 14518281 U JP14518281 U JP 14518281U JP 14518281 U JP14518281 U JP 14518281U JP S6240427 Y2 JPS6240427 Y2 JP S6240427Y2
- Authority
- JP
- Japan
- Prior art keywords
- electrodes
- sheet
- extraction
- stacked
- capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003990 capacitor Substances 0.000 claims description 8
- 239000002390 adhesive tape Substances 0.000 claims description 4
- 239000000919 ceramic Substances 0.000 description 8
- 238000000605 extraction Methods 0.000 description 8
- 229910000679 solder Inorganic materials 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 4
- 239000004642 Polyimide Substances 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 230000003139 buffering effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000003985 ceramic capacitor Substances 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920000515 polycarbonate Polymers 0.000 description 1
- 239000004417 polycarbonate Substances 0.000 description 1
- 230000003014 reinforcing effect Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Ceramic Capacitors (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Description
【考案の詳細な説明】
この考案は、信頼性を向上させたコンデンサ、
特に、小形低電圧大容量半導体コンデンサに関す
る。[Detailed explanation of the invention] This invention is a capacitor with improved reliability.
In particular, it relates to small, low voltage, large capacity semiconductor capacitors.
従来、完成したセラミツク板に、対向電極を付
与したものを単に複数個積み重ね、一方側電極同
士をリード線にはんだづけするとともに他方側電
極同士をいま一つのリード線にはんだづけしたも
のがある。積み重ねたときに対向する電極間はは
んだが充てんされることになる。 Conventionally, there has been a method in which a plurality of completed ceramic plates with opposing electrodes are simply stacked, the electrodes on one side are soldered to a lead wire, and the electrodes on the other side are soldered to another lead wire. When stacked, the space between opposing electrodes is filled with solder.
しかしこの構造だと、はんだ収縮によるストレ
スがセラミツク板に加わり、破壊電圧(BVD)
の低下、信頼性の低下をもたらせていた。また、
積み重ねたときに対向する電極間を完全にはんだ
で充てんすることはむつかしく、電極間に空隙が
介在することはさけられない欠点を有し、湿中負
荷試験、湿中放置試験や実使用時において水滴の
たまり場となり、信頼性を低下させている。 However, with this structure, stress due to solder shrinkage is applied to the ceramic board, increasing the breakdown voltage (BVD).
This resulted in a decline in reliability and reliability. Also,
It is difficult to completely fill the space between opposing electrodes with solder when stacked, and the presence of voids between the electrodes has the unavoidable drawback, which is difficult to avoid during humid load tests, humid storage tests, and actual use. It becomes a place where water droplets accumulate, reducing reliability.
したがつて、焼成されたセラミツク板を積み重
ねて積層コンデンサを製造する方法は非常にむつ
かしいとされ実現にいたつていない。 Therefore, the method of manufacturing a multilayer capacitor by stacking fired ceramic plates is extremely difficult and has not yet been realized.
この考案では、電極を付与したセラミツクなど
の誘電体シートを交互に積み重ねるさい、誘電体
シート同士の接合は機械的に緩衝効果を有する粘
着性の両面テープで行ない、そのままテープを介
して対向する電極同士を電気的に連結することに
より、はんだなどの接合材収縮によるストレスが
セラミツクなどの誘電体シートに加わらないよう
にするとともに、隣接する電極間に空隙が生じな
いようにしようとする。 In this idea, when dielectric sheets such as ceramics with electrodes are stacked alternately, the dielectric sheets are joined with adhesive double-sided tape that has a mechanical buffering effect, and the opposite electrodes are connected via the tape. By electrically connecting them, stress due to shrinkage of the bonding material such as solder is not applied to the dielectric sheet such as ceramic, and voids are also prevented from forming between adjacent electrodes.
以下にこの考案の実施例を図面を参照しながら
説明する。 Examples of this invention will be described below with reference to the drawings.
一定長の焼結した半導体セラミツクシート2の
主平面で電極を形成しない部分にレジストインキ
を塗布した上で電極をメツキする。すると、シー
ト2の対向主平面に部分電極3,4と、それぞれ
これらと一体的に連らなつてシート2の側面側に
引出電極5,6が設けられる。 Resist ink is applied to the main plane of a sintered semiconductor ceramic sheet 2 of a certain length where electrodes are not to be formed, and then electrodes are plated. Then, partial electrodes 3 and 4 are provided on the opposing main planes of the sheet 2, and extraction electrodes 5 and 6 are provided on the side surfaces of the sheet 2 integrally connected thereto.
このようなコンデンサユニツト1は第2図に示
すように耐熱性のある10〜20(μ)程度のポリイ
ミド製両面接着テープ7で積み重ね固定されてい
る。この場合、各シート2の引出電極5はたとえ
ば図面の左側、引出電極6は右側といつたように
同一側面側に同一番号の引出電極が位置される。
次に必要容量値に従つて切断する。 As shown in FIG. 2, such capacitor units 1 are stacked and fixed with heat-resistant double-sided polyimide adhesive tape 7 having a thickness of about 10 to 20 (μ). In this case, the extraction electrodes 5 and 6 of each sheet 2 are located on the same side surface with the same number, such as the extraction electrode 5 on the left side of the drawing and the extraction electrode 6 on the right side.
Then cut according to the required capacitance value.
そして第3図に示すように、各シート2の引出
電極5同士は引出リード8で、引出電極6同士は
引出リード9でハンダを用いて接続される。外装
樹脂がきれないように、各シート2を積み重ねて
一体化した六面体の八つの隅が必要に応じカツト
された上で、デツプ塗装がなされる。 As shown in FIG. 3, the extraction electrodes 5 of each sheet 2 are connected to each other by an extraction lead 8, and the extraction electrodes 6 are connected to each other by an extraction lead 9 using solder. In order not to run out of exterior resin, the eight corners of the hexahedron formed by stacking each sheet 2 are cut off as necessary, and then the depth coating is applied.
第4図は変形例を示し、補強用金属製コ字形電
極10,11を引出電極5,6にそれぞれ接触さ
せた上で、電極10,11に設けた窓12を通し
てはんだづけする。このような構造だとチツプコ
ンデンサとして実用できる。 4 shows a modified example in which reinforcing metal U-shaped electrodes 10, 11 are brought into contact with the lead electrodes 5, 6, respectively, and soldered through windows 12 provided in the electrodes 10, 11. With this structure, it can be used practically as a chip capacitor.
セラミツク材料は前記した半導体セラミツクに
限定されない。 Ceramic materials are not limited to the semiconductor ceramics described above.
はんだづけ時に溶融、軟化しないだけの耐熱性
があればポリイミドテープに限定されず、たとえ
ばポリカーボネートテープでもよい。 The tape is not limited to polyimide tape as long as it has enough heat resistance to not melt or soften during soldering, and for example, polycarbonate tape may be used.
コンデンサ電極、引出電極はメツキ以外の方法
で形成してもよい。 The capacitor electrode and the lead electrode may be formed by a method other than plating.
以上の実施例からもあきらかなように、この考
案によると、電極を付与した誘電体シートを積み
重ねるときに粘着性の両面接着テープを用いて相
互の機械的な固定を達成した上で電気的な接続を
行なつたもので、誘電体シート間にはんだや空隙
がまつたく介在しないことになり、良品率、
BVD、信頼性の向上が達成でき、たとえば1
(μF)12(V)、5(μF)6(V)、10(μ
F)3(V)といつた小形低電圧大容量の半導体
セラミツクコンデンサが実現できた。 As is clear from the above examples, according to this invention, when stacking dielectric sheets provided with electrodes, adhesive double-sided adhesive tape is used to achieve mutual mechanical fixation, and then electrical Since the connection is made, there is no solder or void between the dielectric sheets, resulting in a lower yield rate.
BVD, improved reliability can be achieved, e.g.
(μF) 12 (V), 5 (μF) 6 (V), 10 (μF)
A small, low-voltage, large-capacity semiconductor ceramic capacitor of F) 3 (V) was realized.
第1図は、本考案一実施例における斜視図、第
2図は、同、側面図、第3図は、同、斜視図、第
4図は、同、斜視図である。
1……コンデンサユニツト、2……セラミツク
シート、3,4……対向電極、5,6……引出電
極、7……両面接着テープ、8,9……引出リー
ド、10,11……コ字形電極。
FIG. 1 is a perspective view of an embodiment of the present invention, FIG. 2 is a side view, FIG. 3 is a perspective view, and FIG. 4 is a perspective view. DESCRIPTION OF SYMBOLS 1... Capacitor unit, 2... Ceramic sheet, 3, 4... Counter electrode, 5, 6... Outgoing electrode, 7... Double-sided adhesive tape, 8, 9... Outgoing lead, 10, 11... U-shape electrode.
Claims (1)
ープを介在させて積み重ね、一方側電極同士を電
気的に接続するとともに他方側電極同士を電気的
に接続したことを特徴とする積層形コンデンサ。 A multilayer capacitor characterized in that a plurality of dielectric sheets provided with electrodes are stacked with double-sided adhesive tape interposed, and the electrodes on one side are electrically connected to each other, and the electrodes on the other side are electrically connected to each other.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14518281U JPS5849429U (en) | 1981-09-29 | 1981-09-29 | multilayer capacitor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14518281U JPS5849429U (en) | 1981-09-29 | 1981-09-29 | multilayer capacitor |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5849429U JPS5849429U (en) | 1983-04-04 |
JPS6240427Y2 true JPS6240427Y2 (en) | 1987-10-16 |
Family
ID=29938123
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14518281U Granted JPS5849429U (en) | 1981-09-29 | 1981-09-29 | multilayer capacitor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5849429U (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
RU2558893C1 (en) * | 2014-05-12 | 2015-08-10 | Игорь Феликсович Шлегель | Granulator |
JP6984287B2 (en) * | 2017-09-29 | 2021-12-17 | Tdk株式会社 | Ceramic electronic components |
JP7004151B2 (en) * | 2017-12-28 | 2022-01-21 | Tdk株式会社 | Electronic components |
-
1981
- 1981-09-29 JP JP14518281U patent/JPS5849429U/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5849429U (en) | 1983-04-04 |
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