JPS623970Y2 - - Google Patents

Info

Publication number
JPS623970Y2
JPS623970Y2 JP1978123374U JP12337478U JPS623970Y2 JP S623970 Y2 JPS623970 Y2 JP S623970Y2 JP 1978123374 U JP1978123374 U JP 1978123374U JP 12337478 U JP12337478 U JP 12337478U JP S623970 Y2 JPS623970 Y2 JP S623970Y2
Authority
JP
Japan
Prior art keywords
brightness
circuit
resistor
transistor
contrast
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1978123374U
Other languages
Japanese (ja)
Other versions
JPS5539792U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1978123374U priority Critical patent/JPS623970Y2/ja
Publication of JPS5539792U publication Critical patent/JPS5539792U/ja
Application granted granted Critical
Publication of JPS623970Y2 publication Critical patent/JPS623970Y2/ja
Expired legal-status Critical Current

Links

Landscapes

  • Television Receiver Circuits (AREA)
  • Television Systems (AREA)

Description

【考案の詳細な説明】 本考案は、テレテキスト等の如き文字放送を受
信し、映像信号に合成して再生し得る文字放送受
信機における輝度等の制限回路に係り、特に文字
信号を映像信号に混合、或は合成して受像する場
合におけるいわゆるブルーミングを防止し、文字
信号を明瞭に読取り得べくすることを目的とす
る。 テレテキストシステム等によつて送信される文
字信号と、一般のTV映像信号を混合或は合成し
て受像機の画面上で再生表示する場合、文字の背
景としての映像信号が高輝度でハイコントラスト
であると、その部分でいわゆるブルーミングを生
じ、文字の判別、判読が不可能となるため、映像
信号の輝度及びコントラストを制限する必要が生
ずる。 第1図及び第2図は、斯る目的を達成するため
の従来例を表わすものである。 以下暫く、第1図及び第2図について説明す
る。 図番T1は、基本的にエミツタ接地型増巾回路
として作動すべく接続されるNPN型の第1トラ
ンジスタを示し、該エミツタ抵抗R1はコントラ
スト調整回路を形成する交流側路回路(抵抗
R2、コンデンサC及びコントラスト調整ボリユ
ームRv1)で橋絡されており、コントラストの制
限は、文字、映像混合表示モードスイツチ若しく
は制御回路の動作に連動する第1スイツチS1
開放によつて直列に挿入される抵抗R3によつて
行なわれる。T2は、基本的にエミツタフオロワ
型増巾回路として作動すべく接続されるPNP型の
第2トランジスタを示し、そのベースは前記第1
トランジスタT1のコレクタに直結されている。
抵抗R4,R5及び輝度調整用ボリユームRv2の直列
回路で構成される分圧回路3及び該分圧点Aと前
記第2トランジスタT2のベースの間に接続され
る抵抗R6は、輝度調整回路を形成し、輝度の
制限は、前記混合表示モード若しくは制御回路
の動作に連動するスイツチS2の開放によつて前記
分圧回路3に直列に挿入される抵抗R7によつて
達成される。 しかし乍らこのような構成であれば、輝度調整
用ボリユームRv2のセツト位置にかかわりなく抵
抗R7挿入の効果が生じ、輝度を下げてしまうた
めに、低輝度でTVを見ている状態で文字、映像
表示モードとすると、輝度が下り過ぎ、映像が消
えてしまうという欠点を歪めない。斯る点を防止
するために、第2図図示の如く、輝度調整ボリユ
ームRv2と並列にスイツチS3を介して抵抗R8を追
加し、前記ボリユームRv2のセツト位置にかかわ
らず一定輝度に保つ構成を採ることが出来るが、
3個のスイツチと3個の抵抗を不可欠としコスト
アツプと信頼性の原因となるを免れ得ない。 本考案は、斯る点に鑑み、基本的に1個のスイ
ツチと一対の抵抗を追加することで低コストで信
頼性のある輝度、コントラスト制限を達成し得る
新規な文字放送受信機等における輝度制限回路を
提供するものである。 以下、本考案の詳細を、第3図の基本回路、第
4図の実施回路例及び第5図の動作波形説明図を
参照しつつ説明する。 第3図に表わす本考案の基本回路において、第
1図の従来例と異なる点は、抵抗R3,R7及び対
応する並列スイツチS1、S2を欠いている点と、第
1トランジスタT1のコレクタ抵抗R9と、抵抗
R6,R4及びR5に比して低い値の抵抗R10,R11
形成される分圧回路の分圧点Bを前記第2トラ
ンジスタT2のベースに、文字、映像混合表示モ
ードで閉路されるスイツチS4を介して接続すべく
構成している点で、従来例と本質的に相異なき素
子には同じ図番を付して説明を省略する。このよ
うな構成において、文字、映像混合表示モード以
外のモードにおいてスイツチS4がオフとなつてい
る状態では、通常の単なるビデオ増巾回路として
機能する。次に文字、映像混合表示モードにおい
て、制御回路の出力によつて電子スイツチを可
とするスイツチS4がオンすると、上記抵抗R9
R6に並列的に抵抗R10,R11が入つた形となり、
上記第1トランジスタT1の交流負荷抵抗が等価
的に小さくなる。 一般的に、エミツタ接地型式のトランジスタ増
巾回路の電圧増巾度Avは、 Av=−aRL/re+rb(1−a) 但し、a:トランジスタの電流増巾率 re:等価エミツタ抵抗 Rb:等価ベース抵抗 RL:交流負荷抵抗 で表わされるから、交流負荷抵抗RLが等価的
に小さくなると、当該増巾回路の電圧増巾度が下
ることが判る。而して、前記分圧抵抗R10,R11
値を抵抗R9,R6,R4及びR5に比して小さく選ん
でおけば、第2トランジスタT2のベース電圧
は、分圧点Bの電圧、VB=E・R11/R10+R
11
に略固定さ れ、輝度調整用ボリユームの値によつて輝度の変
化は殆んど無視し得、その時の輝度は略抵抗
R10,R11の分割比によつて決定される。 上記抵抗の値の例は後述の如くであるが、その
値が小さ過ぎると第1トランジスタT1の増巾度
が小さくなり、コントラストがつかなくなるとい
う欠点が生じるので、コントラスト及び輝度調整
用ボリユームの変化範囲を十分考慮して選定しな
ければならない。 第4図のより実用的実施例と第3図の基本回路
との相違点は、第1、第2トランジスタT1,T2
の直結路中にピーキングコイルL1と抵抗R12の並
列回路が直列に挿入されている点と、抵抗R4
が、抵抗R41とサーミスタTHの並列回路と抵抗
R42の直列接続で形成される点、分圧回路3がボ
リユームを介して抵抗R6に接続されている点、
及び本質的に、文字、映像混合表示モード制御回
の出力に依つて開路(オフ)しB点の地絡を
解除するスイツチS5及びB点と上記第2トランジ
スタT2のベースとの間に接続される逆流阻止用
のダイオードD1が図示の如く接続されている点
に存する。この第4図においても、第1、第3図
と共通の部品、素子には同じ図番を付しておき、
その説明を割愛する。 文字、映像混合表示モード以外の場合には、前
記スイツチS5は閉路されダイオードD1はオフと
なりビデオ増巾回路は通常の動作を行う。第5図
イは、斯る場合の映像階段波出力を示すもので、
Hは水平同期信号、aは黒レベルを示す。 文字、映像混合表示モードにおいて、制御回路
の出力により電子スイツチS5が開路すると、ダ
イオードD1は、上記第2トランジスタT2のベー
ス電圧がB点の電位よりも低くなつた場合にのみ
オンする。B点の電位は、丁度ブラウン管のカツ
トオフレベルである黒レベルに設定してあるの
で、上記ダイオードD1がオンの状態では、第1
トランジスタT1の等価的な負荷抵抗が小さくな
るに伴つて電圧増巾度が低下し、コントラストが
制限され且つ輝度調整用ボリユームRv2によつて
輝度を上げてもその変化を映像信号レベルの全域
に亘つて第5図ロの如く歪なく抑制する。 前記B点の電位が黒レベルより下り、例えばb
レベルに設定されてしまうと、第2トランジスタ
T2のベース入力波形は、第5図ハの如くなり、
映像信号の階調が歪むことになるので、前記分圧
回路を形成する抵抗R11の一部をボリユーム
Rv6で構成し、B点の電位を正確に黒レベルに設
定する。 試みに、主な抵抗の一実施例における値を示
す。 抵抗R9=2.7KΩ 抵抗R5=680Ω 抵抗R6=1.0KΩ 抵抗R10=680Ω 抵抗R41=2.2KΩ 抵抗R11=330Ω 抵抗R42=1.5KΩ 抵抗Rv3=500Ω 本考案は上述の如き構成であるから、簡単な回
路構成によつて、低輝度において輝度が下がり過
ぎ、映像が消えてしまうことを防止し、高輝度に
おいてはブルーミング現象を防止する信頼性の高
い文字放送受信機等における輝度制限回路を実現
し得るものである。
[Detailed Description of the Invention] The present invention relates to a circuit for limiting brightness, etc. in a teletext receiver that can receive teletext such as teletext, synthesize it with a video signal, and reproduce it. The object of the present invention is to prevent so-called blooming when an image is received by mixing or compositing the characters, and to enable character signals to be read clearly. When a character signal transmitted by a teletext system, etc. and a general TV video signal are mixed or combined and reproduced and displayed on the screen of a receiver, the video signal as the background of the characters is high brightness and high contrast. If so, so-called blooming occurs in that part, making it impossible to distinguish and read characters, and it becomes necessary to limit the brightness and contrast of the video signal. 1 and 2 represent a conventional example for achieving this purpose. Below, FIG. 1 and FIG. 2 will be explained for a while. The drawing number T 1 indicates a first transistor of the NPN type which is basically connected to operate as a grounded emitter amplifier circuit, the emitter resistor R 1 being an AC bypass circuit (resistor) forming the contrast adjustment circuit 2 .
R 2 , capacitor C, and contrast adjustment volume Rv 1 ), and the contrast is limited by opening the first switch S 1 that is linked to the operation of the text/video mixed display mode switch or the control circuit 1 . This is done by a resistor R 3 inserted in series. T 2 designates a second transistor of the PNP type connected to basically operate as an emitter follower type amplifier circuit, the base of which is connected to the first transistor.
It is directly connected to the collector of transistor T1 .
A voltage dividing circuit 3 consisting of a series circuit of resistors R 4 , R 5 and a brightness adjustment volume Rv 2 and a resistor R 6 connected between the voltage dividing point A and the base of the second transistor T 2 are as follows: A brightness adjustment circuit 4 is formed, and the brightness is limited in the mixed display mode or the control circuit 1.
This is achieved by the resistor R 7 inserted in series with the voltage divider circuit 3 by opening the switch S 2 in conjunction with the operation of the voltage divider circuit 3 . However, with this configuration, the effect of inserting resistor R7 will occur regardless of the setting position of brightness adjustment volume Rv2 , and the brightness will be lowered, making it difficult to watch TV at low brightness. In text and video display mode, the brightness is too low and the video disappears, which is a drawback. In order to prevent this, as shown in Figure 2, a resistor R8 is added in parallel with the brightness adjustment volume Rv2 via a switch S3 , so that the brightness remains constant regardless of the set position of the volume Rv2 . Although it is possible to adopt a configuration that maintains
Three switches and three resistors are essential, which inevitably increases cost and reliability. In view of this, the present invention has been developed to improve brightness in a new teletext receiver, etc., which can achieve reliable brightness and contrast limitations at low cost by basically adding one switch and a pair of resistors. It provides a limiting circuit. The details of the present invention will be described below with reference to the basic circuit shown in FIG. 3, the example circuit shown in FIG. 4, and the operational waveform diagram shown in FIG. The basic circuit of the present invention shown in FIG. 3 differs from the conventional example shown in FIG. 1 in that it lacks the resistors R 3 and R 7 and the corresponding parallel switches S 1 and S 2 , and that the first transistor T 1 collector resistance R 9 and resistor
Mixed character and video display using the voltage dividing point B of the voltage dividing circuit 5 formed by the resistors R 10 and R 11 whose values are lower than those of R 6 , R 4 and R 5 as the base of the second transistor T 2 Elements that are essentially the same as those of the conventional example in that they are configured to be connected via the switch S4 which is closed in the mode are given the same figure numbers and explanations thereof will be omitted. In such a configuration, when the switch S4 is turned off in a mode other than the text/video mixed display mode, it functions as a simple ordinary video amplification circuit. Next, in the text/video mixed display mode, when the switch S4 that enables the electronic switch is turned on by the output of the control circuit 1 , the resistors R9 ,
Resistors R 10 and R 11 are connected in parallel to R 6 ,
The AC load resistance of the first transistor T1 is equivalently reduced. Generally, the voltage amplification degree Av of an emitter grounded type transistor amplification circuit is Av=-aRL/re+rb (1-a) where a: Current amplification rate of the transistor re: Equivalent emitter resistance Rb: Equivalent base Since the resistance RL is expressed as AC load resistance, it can be seen that when the AC load resistance RL becomes equivalently smaller, the voltage amplification degree of the amplification circuit decreases. Therefore, if the values of the voltage dividing resistors R 10 and R 11 are selected to be smaller than those of the resistors R 9 , R 6 , R 4 and R 5 , the base voltage of the second transistor T 2 will be Voltage at point B, V B = E 0 · R 11 /R 10 +R
11
, and changes in brightness can be ignored depending on the value of the brightness adjustment volume, and the brightness at that time is approximately equal to the resistance.
It is determined by the division ratio of R 10 and R 11 . An example of the value of the above-mentioned resistor is as described later, but if the value is too small, the amplification degree of the first transistor T1 will be small and there will be a disadvantage that contrast will not be obtained. The range of change must be carefully considered when selecting. The difference between the more practical embodiment of FIG. 4 and the basic circuit of FIG. 3 is that the first and second transistors T 1 and T 2
A parallel circuit of peaking coil L 1 and resistor R 12 is inserted in series in the direct connection path of , and resistor R 4
is the parallel circuit of resistor R 41 and thermistor T H and the resistor
The point formed by the series connection of R 42 , the point that the voltage divider circuit 3 is connected to the resistor R 6 via the volume,
and essentially, a switch S5 which is opened (off) depending on the output of the character/video mixed display mode control circuit 1 to release the ground fault at point B, and between the point B and the base of the second transistor T2. The diode D1 for backflow blocking is connected as shown in the figure. In this Fig. 4 as well, parts and elements common to Figs. 1 and 3 are given the same figure numbers.
I will omit that explanation. In cases other than the text/video mixed display mode, the switch S5 is closed, the diode D1 is turned off, and the video amplification circuit operates normally. Figure 5A shows the video staircase wave output in such a case.
H indicates a horizontal synchronizing signal, and a indicates a black level. In the text and video mixed display mode, the control circuit
When the electronic switch S5 is opened by the output of the second transistor T2, the diode D1 is turned on only when the base voltage of the second transistor T2 becomes lower than the potential at the point B. The potential at point B is set to the black level, which is the cut-off level of the cathode ray tube, so when the diode D1 is on, the first
As the equivalent load resistance of the transistor T1 becomes smaller, the voltage amplification degree decreases, and the contrast is limited, and even if the brightness is increased by the brightness adjustment volume Rv2 , the change will not be affected over the entire video signal level. is suppressed without distortion as shown in Figure 5B. The potential at the point B is lower than the black level, for example, b
Once set to level, the second transistor
The base input waveform of T 2 is as shown in Figure 5 (c),
Since the gradation of the video signal will be distorted, a part of the resistor R11 forming the voltage dividing circuit 5 is
Configure Rv 6 and set the potential at point B accurately to the black level. As an attempt, the values of the main resistances in one embodiment are shown. Resistor R 9 = 2.7KΩ Resistor R 5 = 680Ω Resistor R 6 = 1.0KΩ Resistor R 10 = 680Ω Resistor R 41 = 2.2KΩ Resistor R 11 = 330Ω Resistor R 42 = 1.5KΩ Resistor Rv 3 = 500Ω The present invention is as described above. Because of its simple circuit configuration, it can be used in highly reliable teletext receivers, etc., to prevent the brightness from dropping too much at low brightness and the image disappearing, and to prevent the blooming phenomenon at high brightness. This makes it possible to realize a brightness limiting circuit.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図及び第2図は従来例に係り、第1図は全
体の回路図、第2図は要部回路図である。第3図
乃至第5図は本考案に係り、第3図は基本回路
図、第4図は実施回路図、第5図は動作波形図で
ある。 T1……第1トランジスタ、T2……第2トラン
ジスタ、……コントラスト調整回路、……輝
度調整回路、S5……スイツチ、D1……ダイオー
ド、……制御回路。
1 and 2 relate to a conventional example, with FIG. 1 being an overall circuit diagram and FIG. 2 being a main part circuit diagram. 3 to 5 relate to the present invention; FIG. 3 is a basic circuit diagram, FIG. 4 is an implementation circuit diagram, and FIG. 5 is an operating waveform diagram. T1 ...First transistor, T2 ...Second transistor, 2 ...Contrast adjustment circuit, 4 ...Brightness adjustment circuit, S5 ...Switch, D1 ...Diode, 1 ...Control circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] コントラスト調整回路を備える第1増巾回路
と、輝度調整用ボリユームを具備する輝度調整回
路を備える第2増巾回路との接続点を文字映像両
信号混合受像時の電位を表示ブラウン管のカツト
オフレベルに設定した分圧回路の分圧点にスイツ
チング手段を介して接続し、文字映像両信号混合
受像時において前記スイツチング手段が閉路とな
り、前記輝度調整用ボリユームのセツト位置にか
かわらず前記文字信号の背景となる映像信号の輝
度(或は輝度とコントラスト)を一定値に保ち、
ブルーミングを防止すべく構成した文字放送受信
機等における輝度制限回路。
The connection point between the first amplification circuit equipped with a contrast adjustment circuit and the second amplification circuit equipped with a brightness adjustment circuit equipped with a brightness adjustment volume is used to display the potential at the time of mixed reception of both text and video signals.The cut-off level of the cathode ray tube. is connected via a switching means to the voltage dividing point of a voltage dividing circuit set to By keeping the brightness (or brightness and contrast) of the video signal constant,
A brightness limiting circuit in a teletext receiver, etc. configured to prevent blooming.
JP1978123374U 1978-09-06 1978-09-06 Expired JPS623970Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1978123374U JPS623970Y2 (en) 1978-09-06 1978-09-06

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1978123374U JPS623970Y2 (en) 1978-09-06 1978-09-06

Publications (2)

Publication Number Publication Date
JPS5539792U JPS5539792U (en) 1980-03-14
JPS623970Y2 true JPS623970Y2 (en) 1987-01-29

Family

ID=29082405

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1978123374U Expired JPS623970Y2 (en) 1978-09-06 1978-09-06

Country Status (1)

Country Link
JP (1) JPS623970Y2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5293229A (en) * 1976-02-02 1977-08-05 Mitsubishi Electric Corp Reproducing device for multiple information
JPS5293230A (en) * 1976-02-02 1977-08-05 Mitsubishi Electric Corp Reproducing device for multiple information

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5293229A (en) * 1976-02-02 1977-08-05 Mitsubishi Electric Corp Reproducing device for multiple information
JPS5293230A (en) * 1976-02-02 1977-08-05 Mitsubishi Electric Corp Reproducing device for multiple information

Also Published As

Publication number Publication date
JPS5539792U (en) 1980-03-14

Similar Documents

Publication Publication Date Title
US4903129A (en) Audio signal section apparatus
EP0004197A2 (en) Television display of data or graphics
JP2929053B2 (en) Video signal processing device
JPH0352395A (en) On-screen hue automatic converting circuit of image plane
JPS623970Y2 (en)
US5343249A (en) Apparatus for preventing the simultaneous and overlapping display of characters on a television receiver monitor
EP0074081B1 (en) Signal processing unit
US4356410A (en) Pulse transmission and repetition circuit
US5448188A (en) Signal processing device for providing a signal corresponding to an input signal and for providing a signal which does not correspond to the input signal
JPH0556365A (en) On-screen display circuit
JP2815935B2 (en) Color signal output circuit
KR920005314B1 (en) Video signal switching circuit
JPH0215424Y2 (en)
JPS6181097A (en) Video signal processing circuit
KR970006132Y1 (en) On screen display apparatus
JP2759709B2 (en) Signal switching device
JPS6352515B2 (en)
JPS6027422Y2 (en) color character enhancer
JPH039425Y2 (en)
JPH0419750B2 (en)
JP3244346B2 (en) Switch circuit
JPS5957587A (en) Device for superimposing character and graph signal
KR960006653A (en) TV's geomagnetic field correction device and control method
JPH0326955B2 (en)
JPH06109781A (en) Power reset circuit and display error prevention device using the circuit