JPS6239353U - - Google Patents

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Publication number
JPS6239353U
JPS6239353U JP13182885U JP13182885U JPS6239353U JP S6239353 U JPS6239353 U JP S6239353U JP 13182885 U JP13182885 U JP 13182885U JP 13182885 U JP13182885 U JP 13182885U JP S6239353 U JPS6239353 U JP S6239353U
Authority
JP
Japan
Prior art keywords
signal
pair
address
switch circuit
diode bridge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13182885U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13182885U priority Critical patent/JPS6239353U/ja
Publication of JPS6239353U publication Critical patent/JPS6239353U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Arrangements For Transmission Of Measured Signals (AREA)
  • Small-Scale Networks (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例の返信信号発生回
路の回路図、第2図はその各部のタイムチヤート
、第3図は第5図の従来の構成を改良したこの考
案の要部ブロツク図、第4図は遠隔多重伝送装置
の構成を示すブロツク図、第5図は従来の遠隔多
重伝送装置の親器と端末器の詳細なブロツク図、
第6図は従来の返信信号発生回路の回路図である
。 P……親器、1〜N……端末器、……第1の
スイツチ回路、……制御回路、……第2のス
イツチ回路。
Fig. 1 is a circuit diagram of a reply signal generation circuit according to an embodiment of this invention, Fig. 2 is a time chart of each part thereof, and Fig. 3 is a block diagram of the main part of this invention which is an improvement over the conventional configuration shown in Fig. 5. , FIG. 4 is a block diagram showing the configuration of the remote multiplex transmission device, and FIG. 5 is a detailed block diagram of the parent device and terminal device of the conventional remote multiplex transmission device.
FIG. 6 is a circuit diagram of a conventional reply signal generation circuit. P... Parent device, 1 to N... Terminal device,... First switch circuit,... Control circuit,... Second switch circuit.

Claims (1)

【実用新案登録請求の範囲】 親器と各々異なる固有アドレスが設定された複
数の端末器とを一対の信号線で接続し、 前記親器がアドレス信号を含む送信信号を電圧
信号として前記一対の信号線に送り出すとともに
この送信信号の送出後の返信信号期間に前記一対
の信号線間に電圧を印加するように構成し、 かつ前記端末器が前記一対の信号線を通して親
器から伝送された前記送信信号を受信し前記送信
信号中のアドレス信号と自己の固有アドレスとの
一致に応答して返信信号を電流信号として前記一
対の信号線に送り出すように構成した遠隔多重伝
送装置において、前記端末器内に設置される返信
信号発生回路であつて、 前記一対の信号線に一対の交流端をそれぞれ接
続したダイオードブリツジと、このダイオードブ
リツジの一対の直流端間に接続した第1のスイツ
チ回路と、前記ダイオードブリツジの直流端より
給電され前記返信信号に応答してOFFとなり前
記第1のスイツチ回路をONとするスイツチ素子
を有する制御回路と、前記ダイオードブリツジの
直流端と前記制御回路との間に直列介挿され前記
アドレス信号に応じて入力されるアドレス一致信
号に応答してONとなる第2のスイツチ回路とを
備えた返信信号発生回路。
[Claims for Utility Model Registration] A parent device and a plurality of terminal devices each having a different unique address are connected by a pair of signal lines, and the parent device converts a transmission signal including an address signal into a voltage signal to the pair of terminal devices. A voltage is applied between the pair of signal lines during a reply signal period after sending the transmission signal to the signal line, and the terminal unit transmits the signal transmitted from the parent unit through the pair of signal lines. In the remote multiplex transmission device configured to receive a transmission signal and send a reply signal as a current signal to the pair of signal lines in response to a match between an address signal in the transmission signal and its own unique address, the terminal device A return signal generating circuit installed in the circuit, comprising a diode bridge having a pair of AC ends connected to the pair of signal lines, and a first switch circuit connected between the pair of DC ends of the diode bridge. a control circuit having a switch element that is supplied with power from the DC end of the diode bridge and turns OFF in response to the reply signal to turn ON the first switch circuit; the DC end of the diode bridge and the control circuit; and a second switch circuit inserted in series between the second switch circuit and the second switch circuit, which is turned on in response to an address match signal input in accordance with the address signal.
JP13182885U 1985-08-27 1985-08-27 Pending JPS6239353U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13182885U JPS6239353U (en) 1985-08-27 1985-08-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13182885U JPS6239353U (en) 1985-08-27 1985-08-27

Publications (1)

Publication Number Publication Date
JPS6239353U true JPS6239353U (en) 1987-03-09

Family

ID=31030641

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13182885U Pending JPS6239353U (en) 1985-08-27 1985-08-27

Country Status (1)

Country Link
JP (1) JPS6239353U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62117589U (en) * 1986-01-20 1987-07-25

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62117589U (en) * 1986-01-20 1987-07-25
JPH0412475Y2 (en) * 1986-01-20 1992-03-25

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