JPS6239056A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To easily obtain a small-sized or high-resolution solid state image pickup device with a limited narrow channel effect, by providing buried channels for vertical and horizontal transfer sections, respectively, with their forming conditions such as channel depth and impurity concentration controlled independently of each other. CONSTITUTION:The junction of a buried channel 21 in a vertical transfer section is provided with a depth smaller than that of the junction of a buried channel 22 in a horizontal transfer section, while the impurity concentration of the buried channel 21 in the vertical transfer section is higher than that of the N-type diffused layer 22 in the horizontal transfer section. In this way, namely, by providing the junction of the N-type diffused layer 21 in the vertical transfer section subjected to a higher narrow channel effect with a depth smaller than that of the junction of the N-type diffused layer 22 in the horizontal transfer section, the narrow channel effect can be inhibited. Further, since the junction of the N-type diffused layer 22 in the horizontal transfer section is formed deep, the decrease in transfer efficiency, which might be caused if the N-type diffused layer 22 were formed shallow together with the layer 21, can be effectively prevented.

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention relates to a solid w in which photoelectric conversion elements are two-dimensionally arranged.
This invention relates to improving the transfer efficiency of an i-image device.

[Prior art] Figure 2 shows a conventional interline CCD type solid state! FIG. 2 is a diagram showing a schematic configuration of an FI image device. Figure 2 - C
1 solid state Ifi image device includes light receiving elements 6 arranged vertically and horizontally and converting a given optical signal into a 1i direction signal.
, a selection switch 7 for reading out the signal charge 1i from the light receiving element 6, a vertical transfer section 8 for vertically transferring the signal charge read out from the light receiving element 6 via the selection switch 7, The signal @charge transferred from the transfer unit 8 is 1
From the horizontal transfer unit 9 that serially transfers and reads out each horizontal line! Tfied. Next, the operation will be explained.

For example, the light receiving element 6 composed of a pn diode converts incident light into signal charges and temporarily stores them. During the retrace period of vertical scanning, the switch 7 is electrically opened to transfer signal charges to the vertical transfer section 8 .

By vertically shifting the signal by 1 line by 1 horizontal line during the retrace period of horizontal scanning, the signal for one line is transferred to the horizontal transfer section 9, and then the signal of the horizontal transfer section 9 is shifted in the horizontal direction. An output signal is obtained as a series charge signal train. In most cases, the vertical transfer section and the horizontal transfer section are constructed using a buried channel COD in order to improve the transfer efficiency of signal charges.

FIG. 3 is a cross-sectional view showing the structure of a buried channel type transfer element, and is a cross-sectional view 4ai^ of the photoelectric conversion region in FIG. In FIG. 3, an n-type diffusion layer 2 serving as a buried channel is formed on a p-type semiconductor substrate 1. On the n-type diffusion layer 2, there is a gate oxide layer 1!1131.32 which becomes an insulator.
, a first goo 1-'i pole 41 for applying a voltage to suppress charge transfer, and a signal l! A second gate 42 is provided for applying a voltage for not reading out the signal from the light receiving element 6. Further, a bias II pole 5 is provided for applying an appropriate voltage to the n-type diffusion layer 2 to form a buried channel.

In this buried channel type COD, a bias lE[t
When the voltage applied to the 1L gate electrodes 41 and 42 is selected within an appropriate range, the potential distribution in the depth direction inside the semiconductor substrate 1 has a maximum point inside the n-type diffusion N2. When signal charges are injected in this state, the signal charges are stored near the voltage maximum point, so the transfer efficiency is less affected by the si-sro□ interface (the interface between the semiconductor substrate and the gate oxide film), and the transfer efficiency is lower than that of the surface channel type. Improved than the case.

[Thinning 1 to be Solved by the Invention In the conventional solid-state image transfer device, the horizontal transfer unit 9 and the vertical transfer 1! S8 and each buried channel C forming
The conditions for forming OD are the same.

By the way, in order to improve the WIew in the horizontal direction and to make the @Yaku smaller, it is necessary to reduce the horizontal pixel pitch, and for this purpose, it is necessary to reduce the width of the vertical transfer section as much as possible. On the other hand, the horizontal transfer section does not need to be made so small in order to ensure the maximum amount of charge transfer. This means that the channel widths of the horizontal transfer section and vertical transfer section are different.
In addition, the channel width of the vertical transfer section is set to 2 μm or less.

When the width of the vertical rotation 32Ii portion is narrowed in this way, for example, as described in the Technical Report TE8S69-6 of the Television Society of Japan. E
As shown in D558, the potential of the vertical transfer section becomes low due to the narrow channel width effect. In particular, COD
This effect becomes remarkable when the width of 2μ++ or less.

The cause of this narrow channel width effect is mainly due to the lateral diffusion of impurities from the high 11 degree impurity diffusion region for channel cut formed under the isolation oxide film. This is thought to be due to the decrease in

FIG. 4 is a diagram showing a cross section mi taken along line II[G, 7 in FIG. 2. In FIG. 4, an n-type diffusion layer 2 serving as a buried channel is formed on a p-type semiconductor substrate 1. A gate oxide film 31 is formed on the n-type diffusion 112. Gate l! l141 is formed.

In order to electrically separate the adjacent elements, an n-type diffusion 11
Isolation oxide film 10 and p+ diffusion 11 sandwiching N2
11 is formed. The p+ diffusion layer 11 is oxidized v110 for isolation.
In order to prevent an n-type inversion layer from being formed at the interface between p-type semiconductor substrate 1 and p-type semiconductor substrate 1, it is formed in a self-aligned manner using, for example, an ion implantation method before forming isolation oxide film 10. Thereafter, in order to form the separating oxide film 10, for example 950
Oxidize in a steam atmosphere at ℃ for about 400 minutes. At this time, ρ"diffusion l!111 also causes diffusion in the lateral direction. After this,
The n-type diffusion layer 2 is also formed in a self-aligned manner using the isolation oxide film 108, but the n-type impurity 1 degree near the boundary with the isolation oxide film 10 is compensated for by lateral diffusion from the p+ diffusion so-called 11. and decreases. In particular, when the channel width of the COD is narrow, the entire n-type diffusion calendar 2 decreases by 1 degree, resulting in a decrease in potential.

Therefore, optimal operation will not be achieved unless adjustments are made such as changing the voltage levels of the clock signal for controlling the transfer operation of the horizontal transfer section and the clock signal for controlling the transfer operation of the vertical transfer section. This method is difficult and requires high-speed, high-voltage clock pulses, which poses the problem that the device cannot be manufactured at low cost.

Therefore, an object of the present invention is to solve the above-mentioned problems, and to provide a solid-state Wi image with a small difference in potential between the horizontal transfer section and the vertical transfer section even in a miniaturized solid-state imaging device, and with which the clock level can be easily adjusted. The purpose is to provide equipment.

[Means for Solving the Problems] In the solid-state imaging device of the present invention, the conditions for forming the buried channel are different between the vertical transfer section and the horizontal transfer section.

Preferably, the buried channel of the vertical transfer section is shallower than the depth of the buried channel of the horizontal transfer section. Further, the impurity concentration of the buried channel of the vertical transfer section is made higher than that of the horizontal transfer section.

Since the depth (junction depth) of the n-type diffusion layer that becomes the buried channel of the vertical transfer section is shallower than that of the horizontal transfer section, the narrow channel width effect is suppressed in the vertical transfer section.
It is possible to compensate for a decrease in electric potential.

Embodiment of the Invention FIG. 1 is a diagram showing the cross-sectional structure of a vertical transfer section and a horizontal transfer section of a solid-state imaging device which is an embodiment of the invention. Figure 1(a) shows the cross-sectional structure of the vertical transfer section.
)) shows the cross-sectional structure of the horizontal transfer section. Figure 1 (a), (
In b), both the vertical transfer section and the horizontal transfer section are provided with oxidized It! for element isolation on the p-type semiconductor substrate 1F. 110 and p+ diffusion layer 11 are formed, and n-type diffusions @21 and 22, which become buried channels, are formed in the semiconductor plate head region between them, respectively. On each of the 0-type diffusions @21 and 22, a gate oxide 31 serving as an insulator and a gate electrode 41 for applying a voltage to control the transfer operation are provided.
is provided.

As seen from FIGS. 1(a) and 1(b), the feature of the present invention is that the junction depth of the buried channel in the vertical transfer section is 6 shallower than the junction depth of the buried channel 22 in the horizontal transfer section, and The impurity concentration of the buried channel 21 in the horizontal transfer section is made higher than that of the 11-type diffusion layer 22 in the horizontal transfer section.

For example, arsenic is used as the impurity source for the n-type diffusion @21 in the horizontal transfer section, phosphorus is used as the impurity source for the 1) type diffusion layer 22 in the horizontal transfer section, and for the formation of each n-type diffusion layer 21,22. This can be easily realized by separately providing photoresist masks for ion implantation and patterning them exclusively (separately).

As mentioned above, the vertical transfer section has a large narrow channel width effect.
The junction depth of the type expansion 121 is changed to the n-type diffusion layer 22 of the horizontal transfer section.
By making the bonding depth shallower than the bonding depth of the previous) Hobe Television Society Technical Report EBS69-6. As also disclosed in ED558, narrow channel width effects can be suppressed.

On the other hand, the junction depth of the n-type K111 layer 22 in the horizontal transfer section is deep (formed as in the conventional case). Decrease in efficiency can also be prevented.

In the above embodiment, only the n-type diffusion layer of the vertical transfer section was made shallow by changing the impurity diffusion source and using the difference in diffusion coefficient.1. ! ! ! l processing time for the n-type diffusion layer for the horizontal transfer section and f! The same effect as in the above embodiment can be obtained by changing the n-type diffusion layer for the direct delivery section.

Furthermore, in the above two embodiments, by making the depth of the buried channel of the vertical transfer section shallower than the 1ψ buried channel of the horizontal transfer section, the narrow channel V channel width effect is suppressed and the potential potential is reduced. Compensate for the decline and transfer to i3! However, if only to prevent the fall channel width effect from lowering the f-Yarnel voltage level, it is necessary to reduce the impurity level of the type 0 diffusion layer in the vertical transfer section to reduce the channel potential. It is also possible to prevent the potential from decreasing by increasing the potential to a level that compensates for it.

rfi! Advantageous Effect 1 As described above, according to the present invention, the depth and depth of the embedded chitnels in the vertical transfer section and the horizontal transfer section can be adjusted. Since each buried channel was formed by setting the formation conditions such as Il'aJ concentration independently, the narrow channel width effect was suppressed.
), and the implementation can easily be performed using a small solid-state device.

4. Explanation of the inside of the drawing Figure 1 is a sectional view of the transfer section of a solid-state 1III imager, which is one embodiment of the present invention. 2 shows a 1gi plane view of the horizontal transfer section. Fig. 2 shows the construction of a conventional interline ICCD. Fig. 3 schematically shows the cross-sectional area ii!i of the embedded channel and channel CCD. It is a diagram.

Figure 4 (also shows the cross-sectional structure taken along line I-II in Figure 2)
-Illustration.

In the figure, 1 is a 1) type semiconductor substrate, 2 is an oxide film for isolation, 11 is a p+ type expansion 1aii! for isolation between elements, 21 is a buried channel of a vertical transfer section, 2
2 is a buried channel of the horizontal transfer section, 6 is a light receiving element, and 7 is a buried channel of the horizontal transfer section.
Reference numeral 8 indicates a light receiving element selection switch, 8 indicates a vertical transfer section, and 9 indicates a horizontal transfer section.

In addition, in FIG. 1, the same reference numerals indicate the same or corresponding parts.

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Claims (4)

[Claims] (1) A plurality of photoelectric conversion elements arranged two-dimensionally in the vertical and horizontal directions, and a charge signal provided for each of the plurality of photoelectric conversion elements to selectively convert charge signals from the photoelectric conversion elements. a vertical transfer means for transferring a signal from the switch means in the vertical direction; and a horizontal transfer means for transferring a signal from the vertical transfer means in the horizontal direction. The solid-state imaging device is characterized in that the vertical transfer means and the horizontal transfer means are both composed of buried channel type charge transfer elements, and the buried channels of the vertical transfer means and the buried channels of the horizontal transfer means are different from each other. A solid-state imaging device, characterized in that it is created under forming conditions. (2) The solid-state imaging device according to claim 1, wherein the depth of the buried channel of the vertical transfer means is shallower than the depth of the buried channel of the horizontal transfer means. (3) The impurity concentration of the buried channel of the vertical transfer means is higher than the impurity concentration of the buried channel of the horizontal transfer means.
The solid-state imaging device according to item 1 or 2. (4) The solid-state imaging device performs an operation of reading out signals only from a photoelectric conversion element corresponding to one selected horizontal line to the vertical transfer means and transferring the signals to the horizontal transfer means. The solid-state imaging device described.